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From: Enric Balletbo i Serra <enric.balletbo@collabora.com>
To: architt@codeaurora.org, inki.dae@samsung.com,
	thierry.reding@gmail.com, hjc@rock-chips.com,
	seanpaul@chromium.org, airlied@linux.ie, tfiga@chromium.org,
	heiko@sntech.de
Cc: dri-devel@lists.freedesktop.org, dianders@chromium.org,
	a.hajda@samsung.com, ykk@rock-chips.com, kernel@collabora.com,
	m.szyprowski@samsung.com, linux-samsung-soc@vger.kernel.org,
	jy0922.shim@samsung.com, rydberg@bitmath.org, krzk@kernel.org,
	linux-rockchip@lists.infradead.org, kgene@kernel.org,
	linux-input@vger.kernel.org, orjan.eide@arm.com,
	wxt@rock-chips.com, jeffy.chen@rock-chips.com,
	linux-arm-kernel@lists.infradead.org, mark.yao@rock-chips.com,
	wzz@rock-chips.com, hl@rock-chips.com, jingoohan1@gmail.com,
	sw0312.kim@samsung.com, linux-kernel@vger.kernel.org,
	kyungmin.park@samsung.com, Laurent.pinchart@ideasonboard.com,
	kuankuan.y@gmail.com, hshi@chromium.org,
	Enric Balletbo i Serra <enric.balletbo@collabora.com>
Subject: [PATCH v6 21/30] drm/rockchip: pre dither down when output bpc is 8bit
Date: Thu,  5 Apr 2018 11:49:51 +0200	[thread overview]
Message-ID: <20180405095000.9756-22-enric.balletbo@collabora.com> (raw)
In-Reply-To: <20180405095000.9756-1-enric.balletbo@collabora.com>

From: Mark Yao <mark.yao@rock-chips.com>

Some encoder have a crc verification check, crc check fail if
input and output data is not equal.

That means encoder input and output need use same color depth,
vop can output 10bit data to encoder, but some panel only support
8bit depth, that would make crc check die.

So pre dither down vop data to 8bit if panel's bpc is 8.

Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
[seanpaul resolved conflict in rockchip_drm_vop.c]
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Thierry Escande <thierry.escande@collabora.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Archit Taneja <architt@codeaurora.org>
---

 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 2 ++
 drivers/gpu/drm/rockchip/rockchip_drm_drv.h     | 1 +
 drivers/gpu/drm/rockchip/rockchip_drm_vop.c     | 6 ++++++
 drivers/gpu/drm/rockchip/rockchip_drm_vop.h     | 1 +
 drivers/gpu/drm/rockchip/rockchip_vop_reg.c     | 1 +
 5 files changed, 11 insertions(+)

diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
index 8c884f9ce713..b3f46ed24cdc 100644
--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -218,6 +218,7 @@ rockchip_dp_drm_encoder_atomic_check(struct drm_encoder *encoder,
 				      struct drm_connector_state *conn_state)
 {
 	struct rockchip_crtc_state *s = to_rockchip_crtc_state(crtc_state);
+	struct drm_display_info *di = &conn_state->connector->display_info;
 
 	/*
 	 * The hardware IC designed that VOP must output the RGB10 video
@@ -229,6 +230,7 @@ rockchip_dp_drm_encoder_atomic_check(struct drm_encoder *encoder,
 
 	s->output_mode = ROCKCHIP_OUT_MODE_AAAA;
 	s->output_type = DRM_MODE_CONNECTOR_eDP;
+	s->output_bpc = di->bpc;
 
 	return 0;
 }
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
index 9c064a40458b..3a6ebfc26036 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
@@ -36,6 +36,7 @@ struct rockchip_crtc_state {
 	struct drm_crtc_state base;
 	int output_type;
 	int output_mode;
+	int output_bpc;
 };
 #define to_rockchip_crtc_state(s) \
 		container_of(s, struct rockchip_crtc_state, base)
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index 53d4afe15278..00f7f3441cf6 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -925,6 +925,12 @@ static void vop_crtc_atomic_enable(struct drm_crtc *crtc,
 	if (s->output_mode == ROCKCHIP_OUT_MODE_AAAA &&
 	    !(vop_data->feature & VOP_FEATURE_OUTPUT_RGB10))
 		s->output_mode = ROCKCHIP_OUT_MODE_P888;
+
+	if (s->output_mode == ROCKCHIP_OUT_MODE_AAAA && s->output_bpc == 8)
+		VOP_REG_SET(vop, common, pre_dither_down, 1);
+	else
+		VOP_REG_SET(vop, common, pre_dither_down, 0);
+
 	VOP_REG_SET(vop, common, out_mode, s->output_mode);
 
 	VOP_REG_SET(vop, modeset, htotal_pw, (htotal << 16) | hsync_len);
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
index 56bbd2e2a8ef..084acdd0019a 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
@@ -67,6 +67,7 @@ struct vop_common {
 	struct vop_reg cfg_done;
 	struct vop_reg dsp_blank;
 	struct vop_reg data_blank;
+	struct vop_reg pre_dither_down;
 	struct vop_reg dither_down;
 	struct vop_reg dither_up;
 	struct vop_reg gate_en;
diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
index 2e4eea3459fe..08023d3ecb76 100644
--- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
+++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
@@ -264,6 +264,7 @@ static const struct vop_common rk3288_common = {
 	.standby = VOP_REG_SYNC(RK3288_SYS_CTRL, 0x1, 22),
 	.gate_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 23),
 	.mmu_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 20),
+	.pre_dither_down = VOP_REG(RK3288_DSP_CTRL1, 0x1, 1),
 	.dither_down = VOP_REG(RK3288_DSP_CTRL1, 0xf, 1),
 	.dither_up = VOP_REG(RK3288_DSP_CTRL1, 0x1, 6),
 	.data_blank = VOP_REG(RK3288_DSP_CTRL0, 0x1, 19),
-- 
2.16.3

WARNING: multiple messages have this Message-ID
From: enric.balletbo@collabora.com (Enric Balletbo i Serra)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v6 21/30] drm/rockchip: pre dither down when output bpc is 8bit
Date: Thu,  5 Apr 2018 11:49:51 +0200	[thread overview]
Message-ID: <20180405095000.9756-22-enric.balletbo@collabora.com> (raw)
In-Reply-To: <20180405095000.9756-1-enric.balletbo@collabora.com>

From: Mark Yao <mark.yao@rock-chips.com>

Some encoder have a crc verification check, crc check fail if
input and output data is not equal.

That means encoder input and output need use same color depth,
vop can output 10bit data to encoder, but some panel only support
8bit depth, that would make crc check die.

So pre dither down vop data to 8bit if panel's bpc is 8.

Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
[seanpaul resolved conflict in rockchip_drm_vop.c]
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Thierry Escande <thierry.escande@collabora.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Archit Taneja <architt@codeaurora.org>
---

 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 2 ++
 drivers/gpu/drm/rockchip/rockchip_drm_drv.h     | 1 +
 drivers/gpu/drm/rockchip/rockchip_drm_vop.c     | 6 ++++++
 drivers/gpu/drm/rockchip/rockchip_drm_vop.h     | 1 +
 drivers/gpu/drm/rockchip/rockchip_vop_reg.c     | 1 +
 5 files changed, 11 insertions(+)

diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
index 8c884f9ce713..b3f46ed24cdc 100644
--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -218,6 +218,7 @@ rockchip_dp_drm_encoder_atomic_check(struct drm_encoder *encoder,
 				      struct drm_connector_state *conn_state)
 {
 	struct rockchip_crtc_state *s = to_rockchip_crtc_state(crtc_state);
+	struct drm_display_info *di = &conn_state->connector->display_info;
 
 	/*
 	 * The hardware IC designed that VOP must output the RGB10 video
@@ -229,6 +230,7 @@ rockchip_dp_drm_encoder_atomic_check(struct drm_encoder *encoder,
 
 	s->output_mode = ROCKCHIP_OUT_MODE_AAAA;
 	s->output_type = DRM_MODE_CONNECTOR_eDP;
+	s->output_bpc = di->bpc;
 
 	return 0;
 }
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
index 9c064a40458b..3a6ebfc26036 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
@@ -36,6 +36,7 @@ struct rockchip_crtc_state {
 	struct drm_crtc_state base;
 	int output_type;
 	int output_mode;
+	int output_bpc;
 };
 #define to_rockchip_crtc_state(s) \
 		container_of(s, struct rockchip_crtc_state, base)
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index 53d4afe15278..00f7f3441cf6 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -925,6 +925,12 @@ static void vop_crtc_atomic_enable(struct drm_crtc *crtc,
 	if (s->output_mode == ROCKCHIP_OUT_MODE_AAAA &&
 	    !(vop_data->feature & VOP_FEATURE_OUTPUT_RGB10))
 		s->output_mode = ROCKCHIP_OUT_MODE_P888;
+
+	if (s->output_mode == ROCKCHIP_OUT_MODE_AAAA && s->output_bpc == 8)
+		VOP_REG_SET(vop, common, pre_dither_down, 1);
+	else
+		VOP_REG_SET(vop, common, pre_dither_down, 0);
+
 	VOP_REG_SET(vop, common, out_mode, s->output_mode);
 
 	VOP_REG_SET(vop, modeset, htotal_pw, (htotal << 16) | hsync_len);
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
index 56bbd2e2a8ef..084acdd0019a 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
@@ -67,6 +67,7 @@ struct vop_common {
 	struct vop_reg cfg_done;
 	struct vop_reg dsp_blank;
 	struct vop_reg data_blank;
+	struct vop_reg pre_dither_down;
 	struct vop_reg dither_down;
 	struct vop_reg dither_up;
 	struct vop_reg gate_en;
diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
index 2e4eea3459fe..08023d3ecb76 100644
--- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
+++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
@@ -264,6 +264,7 @@ static const struct vop_common rk3288_common = {
 	.standby = VOP_REG_SYNC(RK3288_SYS_CTRL, 0x1, 22),
 	.gate_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 23),
 	.mmu_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 20),
+	.pre_dither_down = VOP_REG(RK3288_DSP_CTRL1, 0x1, 1),
 	.dither_down = VOP_REG(RK3288_DSP_CTRL1, 0xf, 1),
 	.dither_up = VOP_REG(RK3288_DSP_CTRL1, 0x1, 6),
 	.data_blank = VOP_REG(RK3288_DSP_CTRL0, 0x1, 19),
-- 
2.16.3

  parent reply	other threads:[~2018-04-05  9:57 UTC|newest]

Thread overview: 123+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-04-05  9:49 [PATCH v6 00/30] DRM Rockchip rk3399 (Kevin) Enric Balletbo i Serra
2018-04-05  9:49 ` Enric Balletbo i Serra
2018-04-05  9:49 ` [PATCH v6 01/30] drm/bridge: analogix_dp: Move enable video into config_video() Enric Balletbo i Serra
2018-04-05  9:49   ` Enric Balletbo i Serra
2018-04-05  9:49   ` Enric Balletbo i Serra
2018-04-09  3:37   ` Sasha Levin
2018-04-05  9:49 ` [PATCH v6 02/30] drm/bridge: analogix_dp: Check AUX_EN status when doing AUX transfer Enric Balletbo i Serra
2018-04-05  9:49   ` Enric Balletbo i Serra
2018-04-05  9:49 ` [PATCH v6 03/30] drm/bridge: analogix_dp: Don't use fast link training when panel just powered up Enric Balletbo i Serra
2018-04-05  9:49   ` Enric Balletbo i Serra
2018-04-05  9:49 ` [PATCH v6 04/30] drm/bridge: analogix_dp: Retry bridge enable when it failed Enric Balletbo i Serra
2018-04-05  9:49   ` Enric Balletbo i Serra
2018-04-05  9:49   ` Enric Balletbo i Serra
2018-04-05  9:49 ` [PATCH v6 05/30] drm/bridge: analogix_dp: Wait for HPD signal before configuring link Enric Balletbo i Serra
2018-04-05  9:49   ` Enric Balletbo i Serra
2018-04-05  9:49   ` Enric Balletbo i Serra
2018-04-09  3:37   ` Sasha Levin
2018-04-09  3:37     ` Sasha Levin
2018-04-05  9:49 ` [PATCH v6 06/30] drm/bridge: analogix_dp: Set PD_INC_BG first when powering up edp phy Enric Balletbo i Serra
2018-04-05  9:49   ` Enric Balletbo i Serra
2018-04-05  9:49   ` Enric Balletbo i Serra
2018-04-09  3:36   ` Sasha Levin
2018-04-09  3:36     ` Sasha Levin
2018-04-05  9:49 ` [PATCH v6 07/30] drm/bridge: analogix_dp: Ensure edp is disabled when shutting down the panel Enric Balletbo i Serra
2018-04-05  9:49   ` Enric Balletbo i Serra
2018-04-09  3:36   ` Sasha Levin
2018-04-09  3:36     ` Sasha Levin
2018-04-05  9:49 ` [PATCH v6 08/30] drm/bridge: analogix_dp: Extend hpd check time to 100ms Enric Balletbo i Serra
2018-04-05  9:49   ` Enric Balletbo i Serra
2018-04-05  9:49 ` [PATCH v6 09/30] drm/bridge: analogix_dp: Fix incorrect usage of enhanced mode Enric Balletbo i Serra
2018-04-05  9:49   ` Enric Balletbo i Serra
2018-04-05  9:49 ` [PATCH v6 10/30] drm/bridge: analogix_dp: Check dpcd write/read status Enric Balletbo i Serra
2018-04-05  9:49   ` Enric Balletbo i Serra
2018-04-05  9:49   ` Enric Balletbo i Serra
2018-04-05  9:49 ` [PATCH v6 11/30] drm/bridge: analogix_dp: Fix AUX_PD bit for Rockchip Enric Balletbo i Serra
2018-04-05  9:49   ` Enric Balletbo i Serra
2018-04-05  9:49   ` Enric Balletbo i Serra
2018-04-05  9:49 ` [PATCH v6 12/30] drm/bridge: analogix_dp: Reset aux channel if an error occurred Enric Balletbo i Serra
2018-04-05  9:49   ` Enric Balletbo i Serra
2018-04-05  9:49 ` [PATCH v6 13/30] drm/rockchip: Restore psr->state when enable/disable psr failed Enric Balletbo i Serra
2018-04-05  9:49   ` Enric Balletbo i Serra
2018-04-05  9:49 ` [PATCH v6 14/30] drm/bridge: analogix_dp: Don't use ANALOGIX_DP_PLL_CTL to control pll Enric Balletbo i Serra
2018-04-05  9:49   ` Enric Balletbo i Serra
2018-04-05  9:49 ` [PATCH v6 15/30] drm/bridge: analogix_dp: Fix timeout of video streamclk config Enric Balletbo i Serra
2018-04-05  9:49   ` Enric Balletbo i Serra
2018-04-09  3:36   ` Sasha Levin
2018-04-09  3:36     ` Sasha Levin
2018-04-05  9:49 ` [PATCH v6 16/30] drm/bridge: analogix_dp: Fix incorrect operations with register ANALOGIX_DP_FUNC_EN_1 Enric Balletbo i Serra
2018-04-05  9:49   ` Enric Balletbo i Serra
2018-04-09  3:36   ` Sasha Levin
2018-04-09  3:36     ` Sasha Levin
2018-04-05  9:49 ` [PATCH v6 17/30] drm/bridge: analogix_dp: Move fast link training detect to set_bridge Enric Balletbo i Serra
2018-04-05  9:49   ` Enric Balletbo i Serra
2018-04-05  9:49 ` [PATCH v6 18/30] drm/bridge: analogix_dp: Reorder plat_data->power_off to happen sooner Enric Balletbo i Serra
2018-04-05  9:49   ` Enric Balletbo i Serra
2018-04-09  3:36   ` Sasha Levin
2018-04-05  9:49 ` [PATCH v6 19/30] drm/bridge: analogix_dp: Properly log AUX CH errors Enric Balletbo i Serra
2018-04-05  9:49   ` Enric Balletbo i Serra
2018-04-05  9:49 ` [PATCH v6 20/30] drm/bridge: analogix_dp: Properly disable aux chan retries on rockchip Enric Balletbo i Serra
2018-04-05  9:49   ` Enric Balletbo i Serra
2018-04-05  9:49 ` Enric Balletbo i Serra [this message]
2018-04-05  9:49   ` [PATCH v6 21/30] drm/rockchip: pre dither down when output bpc is 8bit Enric Balletbo i Serra
2018-04-09  3:36   ` Sasha Levin
2018-04-09  3:36     ` Sasha Levin
2018-04-05  9:49 ` [PATCH v6 22/30] drm/bridge: analogix_dp: Split the platform-specific poweron in two parts Enric Balletbo i Serra
2018-04-05  9:49   ` Enric Balletbo i Serra
2018-04-05  9:49 ` [PATCH v6 23/30] drm/rockchip: analogix_dp: Do not call Analogix code before bind Enric Balletbo i Serra
2018-04-05  9:49   ` Enric Balletbo i Serra
2018-04-09  3:36   ` Sasha Levin
2018-04-09  3:36     ` Sasha Levin
2018-04-12  9:54   ` Andrzej Hajda
2018-04-12  9:54     ` Andrzej Hajda
2018-04-12  9:54     ` Andrzej Hajda
2018-04-05  9:49 ` [PATCH v6 24/30] drm/rockchip: Disable PSR on input events Enric Balletbo i Serra
2018-04-05  9:49   ` Enric Balletbo i Serra
2018-04-16  7:19   ` Andrzej Hajda
2018-04-16  7:19     ` Andrzej Hajda
2018-04-16  7:19     ` Andrzej Hajda
2018-04-16 17:41     ` Dmitry Torokhov
2018-04-16 17:41       ` Dmitry Torokhov
2018-04-16 17:41       ` Dmitry Torokhov
2018-04-16 19:42   ` Ezequiel Garcia
2018-04-16 19:42     ` Ezequiel Garcia
2018-04-20 13:47   ` Andrzej Hajda
2018-04-20 13:47     ` Andrzej Hajda
2018-04-20 13:51     ` Enric Balletbo i Serra
2018-04-20 13:51       ` Enric Balletbo i Serra
2018-04-05  9:49 ` [PATCH v6 25/30] drm/rockchip: Cancel PSR enable work before changing the state Enric Balletbo i Serra
2018-04-05  9:49   ` Enric Balletbo i Serra
2018-04-16  8:55   ` Andrzej Hajda
2018-04-16  8:55     ` Andrzej Hajda
2018-04-16  8:55     ` Andrzej Hajda
2018-04-05  9:49 ` [PATCH v6 26/30] drm/rockchip: psr: Avoid redundant calls to .set() callback Enric Balletbo i Serra
2018-04-05  9:49   ` Enric Balletbo i Serra
2018-04-16  9:06   ` Andrzej Hajda
2018-04-16  9:06     ` Andrzej Hajda
2018-04-16  9:06     ` Andrzej Hajda
2018-04-05  9:49 ` [PATCH v6 27/30] drm/rockchip: psr: Sanitize semantics of allow/disallow API Enric Balletbo i Serra
2018-04-05  9:49   ` Enric Balletbo i Serra
2018-04-16  9:26   ` Andrzej Hajda
2018-04-16  9:26     ` Andrzej Hajda
2018-04-16  9:26     ` Andrzej Hajda
2018-04-05  9:49 ` [PATCH v6 28/30] drm/rockchip: Disable PSR from reboot notifier Enric Balletbo i Serra
2018-04-05  9:49   ` Enric Balletbo i Serra
2018-04-16  9:57   ` Andrzej Hajda
2018-04-16  9:57     ` Andrzej Hajda
2018-04-16  9:57     ` Andrzej Hajda
2018-04-16 13:12     ` Tomasz Figa
2018-04-16 13:12       ` Tomasz Figa
2018-04-16 13:12       ` Tomasz Figa
2018-04-18  9:18       ` Enric Balletbo Serra
2018-04-18  9:18         ` Enric Balletbo Serra
2018-04-18  9:18         ` Enric Balletbo Serra
2018-04-05  9:49 ` [PATCH v6 29/30] drm/rockchip: Disallow PSR for the whole atomic commit Enric Balletbo i Serra
2018-04-05  9:49   ` Enric Balletbo i Serra
2018-04-16  9:51   ` Andrzej Hajda
2018-04-16  9:51     ` Andrzej Hajda
2018-04-16  9:51     ` Andrzej Hajda
2018-04-05  9:50 ` [PATCH v6 30/30] drm/rockchip: psr: Remove flush by CRTC Enric Balletbo i Serra
2018-04-05  9:50   ` Enric Balletbo i Serra
2018-04-16  9:53   ` Andrzej Hajda
2018-04-16  9:53     ` Andrzej Hajda
2018-04-16  9:53     ` Andrzej Hajda

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