[PATCH] drm/i915: set minimum CD clock to twice the BCLK.

[PATCH] drm/i915: set minimum CD clock to twice the BCLK.

[abhay.kumar]

From: Abhay Kumar <abhay.kumar@intel.com>

In glk when device boots with only 1366x768 panel, HDA codec doesn't comeup.
This result in no audio forever as cdclk is < 96Mhz.
This chagne will ensure CD clock to be twice of  BCLK.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102937
Signed-off-by: Abhay Kumar <abhay.kumar@intel.com>
---
 drivers/gpu/drm/i915/intel_cdclk.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_cdclk.c b/drivers/gpu/drm/i915/intel_cdclk.c
index e8884c2ade98..185a70f0921c 100644
--- a/drivers/gpu/drm/i915/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/intel_cdclk.c
@@ -1920,7 +1920,7 @@ int intel_crtc_compute_min_cdclk(const struct intel_crtc_state *crtc_state)
 	/* According to BSpec, "The CD clock frequency must be at least twice
 	 * the frequency of the Azalia BCLK." and BCLK is 96 MHz by default.
 	 */
-	if (crtc_state->has_audio && INTEL_GEN(dev_priv) >= 9)
+	if (INTEL_GEN(dev_priv) >= 9)
 		min_cdclk = max(2 * 96000, min_cdclk);
 
 	if (min_cdclk > dev_priv->max_cdclk_freq) {
-- 
2.7.4

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✗ Fi.CI.BAT: warning for drm/i915: set minimum CD clock to twice the BCLK.

[Patchwork]

== Series Details ==

Series: drm/i915: set minimum CD clock to twice the BCLK.
URL   : https://patchwork.freedesktop.org/series/32657/
State : warning

== Summary ==

Series 32657v1 drm/i915: set minimum CD clock to twice the BCLK.
https://patchwork.freedesktop.org/api/1.0/series/32657/revisions/1/mbox/

Test drv_module_reload:
        Subgroup basic-reload-inject:
                pass       -> DMESG-WARN (fi-bsw-n3050)

fi-bdw-5557u     total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  time:442s
fi-bdw-gvtdvm    total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  time:450s
fi-blb-e6850     total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  time:373s
fi-bsw-n3050     total:289  pass:242  dwarn:1   dfail:0   fail:0   skip:46  time:528s
fi-bwr-2160      total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 time:263s
fi-bxt-dsi       total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  time:499s
fi-bxt-j4205     total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:497s
fi-byt-j1900     total:289  pass:253  dwarn:1   dfail:0   fail:0   skip:35  time:492s
fi-byt-n2820     total:289  pass:249  dwarn:1   dfail:0   fail:0   skip:39  time:473s
fi-cfl-s         total:289  pass:253  dwarn:4   dfail:0   fail:0   skip:32  time:554s
fi-cnl-y         total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:624s
fi-elk-e7500     total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  time:416s
fi-gdg-551       total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 time:249s
fi-glk-1         total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  time:572s
fi-glk-dsi       total:289  pass:258  dwarn:0   dfail:0   fail:1   skip:30  time:485s
fi-hsw-4770      total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:429s
fi-hsw-4770r     total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:424s
fi-ilk-650       total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  time:432s
fi-ivb-3520m     total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:495s
fi-ivb-3770      total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:465s
fi-kbl-7500u     total:289  pass:264  dwarn:1   dfail:0   fail:0   skip:24  time:488s
fi-kbl-7560u     total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  time:570s
fi-kbl-7567u     total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:475s
fi-kbl-r         total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:586s
fi-pnv-d510      total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  time:543s
fi-skl-6260u     total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:449s
fi-skl-6600u     total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:590s
fi-skl-6700hq    total:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  time:648s
fi-skl-6700k     total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  time:519s
fi-skl-6770hq    total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:497s
fi-skl-gvtdvm    total:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  time:455s
fi-snb-2520m     total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  time:563s
fi-snb-2600      total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  time:411s

2ea0b3d47030274c97624258e09fc7d1ffd0e0f2 drm-tip: 2017y-10m-25d-18h-42m-20s UTC integration manifest
3dd31516e8bc drm/i915: set minimum CD clock to twice the BCLK.

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_6195/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH] drm/i915: set minimum CD clock to twice the BCLK.

[Dhinakaran Pandiyan]

On Wednesday, October 25, 2017 3:02:12 PM PDT abhay.kumar@intel.com wrote:
> From: Abhay Kumar <abhay.kumar@intel.com>
> 
> In glk when device boots with only 1366x768 panel, HDA codec doesn't comeup.
> This result in no audio forever as cdclk is < 96Mhz.
> This chagne will ensure CD clock to be twice of  BCLK.
> 
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102937
> Signed-off-by: Abhay Kumar <abhay.kumar@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_cdclk.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_cdclk.c
> b/drivers/gpu/drm/i915/intel_cdclk.c index e8884c2ade98..185a70f0921c
> 100644
> --- a/drivers/gpu/drm/i915/intel_cdclk.c
> +++ b/drivers/gpu/drm/i915/intel_cdclk.c
> @@ -1920,7 +1920,7 @@ int intel_crtc_compute_min_cdclk(const struct
> intel_crtc_state *crtc_state) /* According to BSpec, "The CD clock
> frequency must be at least twice * the frequency of the Azalia BCLK." and
> BCLK is 96 MHz by default. */
> -	if (crtc_state->has_audio && INTEL_GEN(dev_priv) >= 9)
> +	if (INTEL_GEN(dev_priv) >= 9)

Why should cdclk be increased when audio is not being enabled?

>  		min_cdclk = max(2 * 96000, min_cdclk);
> 
>  	if (min_cdclk > dev_priv->max_cdclk_freq) {


_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH] drm/i915: set minimum CD clock to twice the BCLK.

[Jani Nikula]

On Wed, 25 Oct 2017, Dhinakaran Pandiyan <dhinakaran.pandiyan@gmail.com> wrote:
> On Wednesday, October 25, 2017 3:02:12 PM PDT abhay.kumar@intel.com wrote:
>> From: Abhay Kumar <abhay.kumar@intel.com>
>> 
>> In glk when device boots with only 1366x768 panel, HDA codec doesn't comeup.
>> This result in no audio forever as cdclk is < 96Mhz.

Forever... or until next modeset with audio enabled?

>> This chagne will ensure CD clock to be twice of  BCLK.
>> 
>> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102937
>> Signed-off-by: Abhay Kumar <abhay.kumar@intel.com>
>> ---
>>  drivers/gpu/drm/i915/intel_cdclk.c | 2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>> 
>> diff --git a/drivers/gpu/drm/i915/intel_cdclk.c
>> b/drivers/gpu/drm/i915/intel_cdclk.c index e8884c2ade98..185a70f0921c
>> 100644
>> --- a/drivers/gpu/drm/i915/intel_cdclk.c
>> +++ b/drivers/gpu/drm/i915/intel_cdclk.c
>> @@ -1920,7 +1920,7 @@ int intel_crtc_compute_min_cdclk(const struct
>> intel_crtc_state *crtc_state) /* According to BSpec, "The CD clock
>> frequency must be at least twice * the frequency of the Azalia BCLK." and
>> BCLK is 96 MHz by default. */
>> -	if (crtc_state->has_audio && INTEL_GEN(dev_priv) >= 9)
>> +	if (INTEL_GEN(dev_priv) >= 9)
>
> Why should cdclk be increased when audio is not being enabled?

Indeed. I can easily imagine a counter-bug reporting excessive cdclk
when audio is not enabled.

BR,
Jani.

>
>>  		min_cdclk = max(2 * 96000, min_cdclk);
>> 
>>  	if (min_cdclk > dev_priv->max_cdclk_freq) {
>
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH] drm/i915: set minimum CD clock to twice the BCLK.

[Kumar, Abhay]

On 10/26/2017 1:45 AM, Jani Nikula wrote:
> On Wed, 25 Oct 2017, Dhinakaran Pandiyan <dhinakaran.pandiyan@gmail.com> wrote:
>> On Wednesday, October 25, 2017 3:02:12 PM PDT abhay.kumar@intel.com wrote:
>>> From: Abhay Kumar <abhay.kumar@intel.com>
>>>
>>> In glk when device boots with only 1366x768 panel, HDA codec doesn't comeup.
>>> This result in no audio forever as cdclk is < 96Mhz.
> Forever... or until next modeset with audio enabled?
Soundcard probing/detection and creation happens only during bootup.  So 
even though we do modeset later there is no soundcard driver to handle 
the event.
>
>>> This chagne will ensure CD clock to be twice of  BCLK.
>>>
>>> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102937
>>> Signed-off-by: Abhay Kumar <abhay.kumar@intel.com>
>>> ---
>>>   drivers/gpu/drm/i915/intel_cdclk.c | 2 +-
>>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/intel_cdclk.c
>>> b/drivers/gpu/drm/i915/intel_cdclk.c index e8884c2ade98..185a70f0921c
>>> 100644
>>> --- a/drivers/gpu/drm/i915/intel_cdclk.c
>>> +++ b/drivers/gpu/drm/i915/intel_cdclk.c
>>> @@ -1920,7 +1920,7 @@ int intel_crtc_compute_min_cdclk(const struct
>>> intel_crtc_state *crtc_state) /* According to BSpec, "The CD clock
>>> frequency must be at least twice * the frequency of the Azalia BCLK." and
>>> BCLK is 96 MHz by default. */
>>> -	if (crtc_state->has_audio && INTEL_GEN(dev_priv) >= 9)
>>> +	if (INTEL_GEN(dev_priv) >= 9)
>> Why should cdclk be increased when audio is not being enabled?
> Indeed. I can easily imagine a counter-bug reporting excessive cdclk
> when audio is not enabled.
During bootup time audio driver is trying to acquire HDA audio power 
well inside i915 and then it will send HDA verb commands.
since cdclk is lower than 96Mhz  HDA will not comeup resulting in 
timeout.  This was working fine  before SKL/APL since there was no 2 PPC .

Is it ok to bump  up cdclk while bootup of system/HDA and then reduce to 
needed CDCLK?
wondering if this approach can cause any issue to subsequent HDA verb 
commands ..


>
> BR,
> Jani.
>
>>>   		min_cdclk = max(2 * 96000, min_cdclk);
>>>
>>>   	if (min_cdclk > dev_priv->max_cdclk_freq) {
>>
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH] drm/i915: set minimum CD clock to twice the BCLK.

[Kumar, Abhay]

+ Subhransu

-----Original Message-----
From: Intel-gfx [mailto:intel-gfx-bounces@lists.freedesktop.org] On Behalf Of Kumar, Abhay
Sent: Thursday, October 26, 2017 12:10 PM
To: Jani Nikula <jani.nikula@linux.intel.com>; Dhinakaran Pandiyan <dhinakaran.pandiyan@gmail.com>; subransu.s.prusty@intel.com
Cc: intel-gfx@lists.freedesktop.org; Nujella, Sathyanarayana <sathyanarayana.nujella@intel.com>
Subject: Re: [Intel-gfx] [PATCH] drm/i915: set minimum CD clock to twice the BCLK.



On 10/26/2017 1:45 AM, Jani Nikula wrote:
> On Wed, 25 Oct 2017, Dhinakaran Pandiyan <dhinakaran.pandiyan@gmail.com> wrote:
>> On Wednesday, October 25, 2017 3:02:12 PM PDT abhay.kumar@intel.com wrote:
>>> From: Abhay Kumar <abhay.kumar@intel.com>
>>>
>>> In glk when device boots with only 1366x768 panel, HDA codec doesn't comeup.
>>> This result in no audio forever as cdclk is < 96Mhz.
> Forever... or until next modeset with audio enabled?

Soundcard probing/detection and creation happens only during bootup.  So even though we do modeset later there is no soundcard driver to handle the event.
>
>>> This chagne will ensure CD clock to be twice of  BCLK.
>>>
>>> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102937
>>> Signed-off-by: Abhay Kumar <abhay.kumar@intel.com>
>>> ---
>>>   drivers/gpu/drm/i915/intel_cdclk.c | 2 +-
>>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/intel_cdclk.c
>>> b/drivers/gpu/drm/i915/intel_cdclk.c index 
>>> e8884c2ade98..185a70f0921c
>>> 100644
>>> --- a/drivers/gpu/drm/i915/intel_cdclk.c
>>> +++ b/drivers/gpu/drm/i915/intel_cdclk.c
>>> @@ -1920,7 +1920,7 @@ int intel_crtc_compute_min_cdclk(const struct 
>>> intel_crtc_state *crtc_state) /* According to BSpec, "The CD clock 
>>> frequency must be at least twice * the frequency of the Azalia 
>>> BCLK." and BCLK is 96 MHz by default. */
>>> -	if (crtc_state->has_audio && INTEL_GEN(dev_priv) >= 9)
>>> +	if (INTEL_GEN(dev_priv) >= 9)
>> Why should cdclk be increased when audio is not being enabled?
> Indeed. I can easily imagine a counter-bug reporting excessive cdclk 
> when audio is not enabled.
During bootup time audio driver is trying to acquire HDA audio power well inside i915 and then it will send HDA verb commands.
since cdclk is lower than 96Mhz  HDA will not comeup resulting in timeout.  This was working fine  before SKL/APL since there was no 2 PPC .

Is it ok to bump  up cdclk while bootup of system/HDA and then reduce to needed CDCLK?
wondering if this approach can cause any issue to subsequent HDA verb commands ..


>
> BR,
> Jani.
>
>>>   		min_cdclk = max(2 * 96000, min_cdclk);
>>>
>>>   	if (min_cdclk > dev_priv->max_cdclk_freq) {
>>
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH] drm/i915: set minimum CD clock to twice the BCLK.

[Pandiyan, Dhinakaran]

On Sun, 2017-10-29 at 03:04 +0000, Kumar, Abhay wrote:
> + Subhransu
> 
> -----Original Message-----
> From: Intel-gfx [mailto:intel-gfx-bounces@lists.freedesktop.org] On Behalf Of Kumar, Abhay
> Sent: Thursday, October 26, 2017 12:10 PM
> To: Jani Nikula <jani.nikula@linux.intel.com>; Dhinakaran Pandiyan <dhinakaran.pandiyan@gmail.com>; subransu.s.prusty@intel.com
> Cc: intel-gfx@lists.freedesktop.org; Nujella, Sathyanarayana <sathyanarayana.nujella@intel.com>
> Subject: Re: [Intel-gfx] [PATCH] drm/i915: set minimum CD clock to twice the BCLK.
> 
> 
> 
> On 10/26/2017 1:45 AM, Jani Nikula wrote:
> > On Wed, 25 Oct 2017, Dhinakaran Pandiyan <dhinakaran.pandiyan@gmail.com> wrote:
> >> On Wednesday, October 25, 2017 3:02:12 PM PDT abhay.kumar@intel.com wrote:
> >>> From: Abhay Kumar <abhay.kumar@intel.com>
> >>>
> >>> In glk when device boots with only 1366x768 panel, HDA codec doesn't comeup.
> >>> This result in no audio forever as cdclk is < 96Mhz.
> > Forever... or until next modeset with audio enabled?
> 
> Soundcard probing/detection and creation happens only during bootup.  So even though we do modeset later there is no soundcard driver to handle the event.
> >
> >>> This chagne will ensure CD clock to be twice of  BCLK.
> >>>
> >>> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102937
> >>> Signed-off-by: Abhay Kumar <abhay.kumar@intel.com>
> >>> ---
> >>>   drivers/gpu/drm/i915/intel_cdclk.c | 2 +-
> >>>   1 file changed, 1 insertion(+), 1 deletion(-)
> >>>
> >>> diff --git a/drivers/gpu/drm/i915/intel_cdclk.c
> >>> b/drivers/gpu/drm/i915/intel_cdclk.c index 
> >>> e8884c2ade98..185a70f0921c
> >>> 100644
> >>> --- a/drivers/gpu/drm/i915/intel_cdclk.c
> >>> +++ b/drivers/gpu/drm/i915/intel_cdclk.c
> >>> @@ -1920,7 +1920,7 @@ int intel_crtc_compute_min_cdclk(const struct 
> >>> intel_crtc_state *crtc_state) /* According to BSpec, "The CD clock 
> >>> frequency must be at least twice * the frequency of the Azalia 
> >>> BCLK." and BCLK is 96 MHz by default. */
> >>> -	if (crtc_state->has_audio && INTEL_GEN(dev_priv) >= 9)
> >>> +	if (INTEL_GEN(dev_priv) >= 9)
> >> Why should cdclk be increased when audio is not being enabled?
> > Indeed. I can easily imagine a counter-bug reporting excessive cdclk 
> > when audio is not enabled.
> During bootup time audio driver is trying to acquire HDA audio power well inside i915 and then it will send HDA verb commands.
> since cdclk is lower than 96Mhz  HDA will not comeup resulting in timeout.  This was working fine  before SKL/APL since there was no 2 PPC .
> 
> Is it ok to bump  up cdclk while bootup of system/HDA and then reduce to needed CDCLK?

I think it is worth exploring, do you have code to test whether it
solves this particular issue?

> wondering if this approach can cause any issue to subsequent HDA verb commands ..
> 
> 
> >
> > BR,
> > Jani.
> >
> >>>   		min_cdclk = max(2 * 96000, min_cdclk);
> >>>
> >>>   	if (min_cdclk > dev_priv->max_cdclk_freq) {
> >>
> >> _______________________________________________
> >> Intel-gfx mailing list
> >> Intel-gfx@lists.freedesktop.org
> >> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH] drm/i915: set minimum CD clock to twice the BCLK.

[Kumar, Abhay]

On 10/30/2017 5:21 PM, Pandiyan, Dhinakaran wrote:
> On Sun, 2017-10-29 at 03:04 +0000, Kumar, Abhay wrote:
>> + Subhransu
>>
>> -----Original Message-----
>> From: Intel-gfx [mailto:intel-gfx-bounces@lists.freedesktop.org] On Behalf Of Kumar, Abhay
>> Sent: Thursday, October 26, 2017 12:10 PM
>> To: Jani Nikula <jani.nikula@linux.intel.com>; Dhinakaran Pandiyan <dhinakaran.pandiyan@gmail.com>; subransu.s.prusty@intel.com
>> Cc: intel-gfx@lists.freedesktop.org; Nujella, Sathyanarayana <sathyanarayana.nujella@intel.com>
>> Subject: Re: [Intel-gfx] [PATCH] drm/i915: set minimum CD clock to twice the BCLK.
>>
>>
>>
>> On 10/26/2017 1:45 AM, Jani Nikula wrote:
>>> On Wed, 25 Oct 2017, Dhinakaran Pandiyan <dhinakaran.pandiyan@gmail.com> wrote:
>>>> On Wednesday, October 25, 2017 3:02:12 PM PDT abhay.kumar@intel.com wrote:
>>>>> From: Abhay Kumar <abhay.kumar@intel.com>
>>>>>
>>>>> In glk when device boots with only 1366x768 panel, HDA codec doesn't comeup.
>>>>> This result in no audio forever as cdclk is < 96Mhz.
>>> Forever... or until next modeset with audio enabled?
>> Soundcard probing/detection and creation happens only during bootup.  So even though we do modeset later there is no soundcard driver to handle the event.
>>>>> This chagne will ensure CD clock to be twice of  BCLK.
>>>>>
>>>>> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102937
>>>>> Signed-off-by: Abhay Kumar <abhay.kumar@intel.com>
>>>>> ---
>>>>>    drivers/gpu/drm/i915/intel_cdclk.c | 2 +-
>>>>>    1 file changed, 1 insertion(+), 1 deletion(-)
>>>>>
>>>>> diff --git a/drivers/gpu/drm/i915/intel_cdclk.c
>>>>> b/drivers/gpu/drm/i915/intel_cdclk.c index
>>>>> e8884c2ade98..185a70f0921c
>>>>> 100644
>>>>> --- a/drivers/gpu/drm/i915/intel_cdclk.c
>>>>> +++ b/drivers/gpu/drm/i915/intel_cdclk.c
>>>>> @@ -1920,7 +1920,7 @@ int intel_crtc_compute_min_cdclk(const struct
>>>>> intel_crtc_state *crtc_state) /* According to BSpec, "The CD clock
>>>>> frequency must be at least twice * the frequency of the Azalia
>>>>> BCLK." and BCLK is 96 MHz by default. */
>>>>> -	if (crtc_state->has_audio && INTEL_GEN(dev_priv) >= 9)
>>>>> +	if (INTEL_GEN(dev_priv) >= 9)
>>>> Why should cdclk be increased when audio is not being enabled?
>>> Indeed. I can easily imagine a counter-bug reporting excessive cdclk
>>> when audio is not enabled.
>> During bootup time audio driver is trying to acquire HDA audio power well inside i915 and then it will send HDA verb commands.
>> since cdclk is lower than 96Mhz  HDA will not comeup resulting in timeout.  This was working fine  before SKL/APL since there was no 2 PPC .
>>
>> Is it ok to bump  up cdclk while bootup of system/HDA and then reduce to needed CDCLK?
> I think it is worth exploring, do you have code to test whether it
> solves this particular issue?
No i don't have test code for this but what i learned from other OS that 
glk run at 148000 and cnl 96000*2 due to this limitation all the time.

@Shubhransu : can you please answer this doubt which we all have. This 
we should be able to get from HDA specs.

>
>> wondering if this approach can cause any issue to subsequent HDA verb commands ..
>>
>>
>>> BR,
>>> Jani.
>>>
>>>>>    		min_cdclk = max(2 * 96000, min_cdclk);
>>>>>
>>>>>    	if (min_cdclk > dev_priv->max_cdclk_freq) {
>>>> _______________________________________________
>>>> Intel-gfx mailing list
>>>> Intel-gfx@lists.freedesktop.org
>>>> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH] drm/i915: set minimum CD clock to twice the BCLK.

[Jani Nikula]

On Tue, 31 Oct 2017, "Kumar, Abhay" <abhay.kumar@intel.com> wrote:
> On 10/30/2017 5:21 PM, Pandiyan, Dhinakaran wrote:
>> On Sun, 2017-10-29 at 03:04 +0000, Kumar, Abhay wrote:
>>> + Subhransu
>>>
>>> -----Original Message-----
>>> From: Intel-gfx [mailto:intel-gfx-bounces@lists.freedesktop.org] On Behalf Of Kumar, Abhay
>>> Sent: Thursday, October 26, 2017 12:10 PM
>>> To: Jani Nikula <jani.nikula@linux.intel.com>; Dhinakaran Pandiyan <dhinakaran.pandiyan@gmail.com>; subransu.s.prusty@intel.com
>>> Cc: intel-gfx@lists.freedesktop.org; Nujella, Sathyanarayana <sathyanarayana.nujella@intel.com>
>>> Subject: Re: [Intel-gfx] [PATCH] drm/i915: set minimum CD clock to twice the BCLK.
>>>
>>>
>>>
>>> On 10/26/2017 1:45 AM, Jani Nikula wrote:
>>>> On Wed, 25 Oct 2017, Dhinakaran Pandiyan <dhinakaran.pandiyan@gmail.com> wrote:
>>>>> On Wednesday, October 25, 2017 3:02:12 PM PDT abhay.kumar@intel.com wrote:
>>>>>> From: Abhay Kumar <abhay.kumar@intel.com>
>>>>>>
>>>>>> In glk when device boots with only 1366x768 panel, HDA codec doesn't comeup.
>>>>>> This result in no audio forever as cdclk is < 96Mhz.
>>>> Forever... or until next modeset with audio enabled?
>>> Soundcard probing/detection and creation happens only during bootup.  So even though we do modeset later there is no soundcard driver to handle the event.
>>>>>> This chagne will ensure CD clock to be twice of  BCLK.
>>>>>>
>>>>>> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102937
>>>>>> Signed-off-by: Abhay Kumar <abhay.kumar@intel.com>
>>>>>> ---
>>>>>>    drivers/gpu/drm/i915/intel_cdclk.c | 2 +-
>>>>>>    1 file changed, 1 insertion(+), 1 deletion(-)
>>>>>>
>>>>>> diff --git a/drivers/gpu/drm/i915/intel_cdclk.c
>>>>>> b/drivers/gpu/drm/i915/intel_cdclk.c index
>>>>>> e8884c2ade98..185a70f0921c
>>>>>> 100644
>>>>>> --- a/drivers/gpu/drm/i915/intel_cdclk.c
>>>>>> +++ b/drivers/gpu/drm/i915/intel_cdclk.c
>>>>>> @@ -1920,7 +1920,7 @@ int intel_crtc_compute_min_cdclk(const struct
>>>>>> intel_crtc_state *crtc_state) /* According to BSpec, "The CD clock
>>>>>> frequency must be at least twice * the frequency of the Azalia
>>>>>> BCLK." and BCLK is 96 MHz by default. */
>>>>>> -	if (crtc_state->has_audio && INTEL_GEN(dev_priv) >= 9)
>>>>>> +	if (INTEL_GEN(dev_priv) >= 9)
>>>>> Why should cdclk be increased when audio is not being enabled?
>>>> Indeed. I can easily imagine a counter-bug reporting excessive cdclk
>>>> when audio is not enabled.
>>> During bootup time audio driver is trying to acquire HDA audio power well inside i915 and then it will send HDA verb commands.
>>> since cdclk is lower than 96Mhz  HDA will not comeup resulting in timeout.  This was working fine  before SKL/APL since there was no 2 PPC .
>>>
>>> Is it ok to bump  up cdclk while bootup of system/HDA and then reduce to needed CDCLK?
>> I think it is worth exploring, do you have code to test whether it
>> solves this particular issue?
> No i don't have test code for this but what i learned from other OS that 
> glk run at 148000 and cnl 96000*2 due to this limitation all the time.

Is there an HSD for this? It's a bit surprising you can't even probe the
driver without a higher cdclk.

BR,
Jani.

>
> @Shubhransu : can you please answer this doubt which we all have. This 
> we should be able to get from HDA specs.
>
>>
>>> wondering if this approach can cause any issue to subsequent HDA verb commands ..
>>>
>>>
>>>> BR,
>>>> Jani.
>>>>
>>>>>>    		min_cdclk = max(2 * 96000, min_cdclk);
>>>>>>
>>>>>>    	if (min_cdclk > dev_priv->max_cdclk_freq) {
>>>>> _______________________________________________
>>>>> Intel-gfx mailing list
>>>>> Intel-gfx@lists.freedesktop.org
>>>>> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
>>> _______________________________________________
>>> Intel-gfx mailing list
>>> Intel-gfx@lists.freedesktop.org
>>> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
>

-- 
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH] drm/i915: set minimum CD clock to twice the BCLK.

[Prusty, Subhransu S]

> >>>>>> b/drivers/gpu/drm/i915/intel_cdclk.c index
> >>>>>> e8884c2ade98..185a70f0921c
> >>>>>> 100644
> >>>>>> --- a/drivers/gpu/drm/i915/intel_cdclk.c
> >>>>>> +++ b/drivers/gpu/drm/i915/intel_cdclk.c
> >>>>>> @@ -1920,7 +1920,7 @@ int intel_crtc_compute_min_cdclk(const struct
> >>>>>> intel_crtc_state *crtc_state) /* According to BSpec, "The CD clock
> >>>>>> frequency must be at least twice * the frequency of the Azalia
> >>>>>> BCLK." and BCLK is 96 MHz by default. */
> >>>>>> -	if (crtc_state->has_audio && INTEL_GEN(dev_priv) >= 9)
> >>>>>> +	if (INTEL_GEN(dev_priv) >= 9)
> >>>>> Why should cdclk be increased when audio is not being enabled?
> >>>> Indeed. I can easily imagine a counter-bug reporting excessive cdclk
> >>>> when audio is not enabled.
> >>> During bootup time audio driver is trying to acquire HDA audio power well
> inside i915 and then it will send HDA verb commands.
> >>> since cdclk is lower than 96Mhz  HDA will not comeup resulting in timeout.
> This was working fine  before SKL/APL since there was no 2 PPC .
> >>>
> >>> Is it ok to bump  up cdclk while bootup of system/HDA and then reduce to
> needed CDCLK?
> >> I think it is worth exploring, do you have code to test whether it
> >> solves this particular issue?
> > No i don't have test code for this but what i learned from other OS that
> > glk run at 148000 and cnl 96000*2 due to this limitation all the time.
> 
> Is there an HSD for this? It's a bit surprising you can't even probe the
> driver without a higher cdclk.

Hi Jani,

The driver probe happens based on vendor id and revision id read from the codec, and
the vendor/revision are read from the codec over HDA bus. 

Since codecs are enumerable, without successful match of vendor/revision id  the driver
probe will not happen.

Regards,
Subhransu

> 
> BR,
> Jani.
> 
> >
> > @Shubhransu : can you please answer this doubt which we all have. This
> > we should be able to get from HDA specs.
> >
> >>
> >>> wondering if this approach can cause any issue to subsequent HDA verb
> commands ..
> >>>
> >>>
> >>>> BR,
> >>>> Jani.
> >>>>
> >>>>>>    		min_cdclk = max(2 * 96000, min_cdclk);
> >>>>>>
> >>>>>>    	if (min_cdclk > dev_priv->max_cdclk_freq) {
> >>>>> _______________________________________________
> >>>>> Intel-gfx mailing list
> >>>>> Intel-gfx@lists.freedesktop.org
> >>>>> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> >>> _______________________________________________
> >>> Intel-gfx mailing list
> >>> Intel-gfx@lists.freedesktop.org
> >>> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> >
> 
> --
> Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH] drm/i915: set minimum CD clock to twice the BCLK.

[Prusty, Subhransu S]

> 
> On 10/30/2017 5:21 PM, Pandiyan, Dhinakaran wrote:
> > On Sun, 2017-10-29 at 03:04 +0000, Kumar, Abhay wrote:
> >> + Subhransu
> >>
> >> -----Original Message-----
> >> From: Intel-gfx [mailto:intel-gfx-bounces@lists.freedesktop.org] On Behalf Of
> Kumar, Abhay
> >> Sent: Thursday, October 26, 2017 12:10 PM
> >> To: Jani Nikula <jani.nikula@linux.intel.com>; Dhinakaran Pandiyan
> <dhinakaran.pandiyan@gmail.com>; subransu.s.prusty@intel.com
> >> Cc: intel-gfx@lists.freedesktop.org; Nujella, Sathyanarayana
> <sathyanarayana.nujella@intel.com>
> >> Subject: Re: [Intel-gfx] [PATCH] drm/i915: set minimum CD clock to twice the
> BCLK.
> >>
> >>
> >>
> >> On 10/26/2017 1:45 AM, Jani Nikula wrote:
> >>> On Wed, 25 Oct 2017, Dhinakaran Pandiyan
> <dhinakaran.pandiyan@gmail.com> wrote:
> >>>> On Wednesday, October 25, 2017 3:02:12 PM PDT abhay.kumar@intel.com
> wrote:
> >>>>> From: Abhay Kumar <abhay.kumar@intel.com>
> >>>>>
> >>>>> In glk when device boots with only 1366x768 panel, HDA codec doesn't
> comeup.
> >>>>> This result in no audio forever as cdclk is < 96Mhz.
> >>> Forever... or until next modeset with audio enabled?
> >> Soundcard probing/detection and creation happens only during bootup.  So
> even though we do modeset later there is no soundcard driver to handle the
> event.
> >>>>> This chagne will ensure CD clock to be twice of  BCLK.
> >>>>>
> >>>>> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102937
> >>>>> Signed-off-by: Abhay Kumar <abhay.kumar@intel.com>
> >>>>> ---
> >>>>>    drivers/gpu/drm/i915/intel_cdclk.c | 2 +-
> >>>>>    1 file changed, 1 insertion(+), 1 deletion(-)
> >>>>>
> >>>>> diff --git a/drivers/gpu/drm/i915/intel_cdclk.c
> >>>>> b/drivers/gpu/drm/i915/intel_cdclk.c index
> >>>>> e8884c2ade98..185a70f0921c
> >>>>> 100644
> >>>>> --- a/drivers/gpu/drm/i915/intel_cdclk.c
> >>>>> +++ b/drivers/gpu/drm/i915/intel_cdclk.c
> >>>>> @@ -1920,7 +1920,7 @@ int intel_crtc_compute_min_cdclk(const struct
> >>>>> intel_crtc_state *crtc_state) /* According to BSpec, "The CD clock
> >>>>> frequency must be at least twice * the frequency of the Azalia
> >>>>> BCLK." and BCLK is 96 MHz by default. */
> >>>>> -	if (crtc_state->has_audio && INTEL_GEN(dev_priv) >= 9)
> >>>>> +	if (INTEL_GEN(dev_priv) >= 9)
> >>>> Why should cdclk be increased when audio is not being enabled?
> >>> Indeed. I can easily imagine a counter-bug reporting excessive cdclk
> >>> when audio is not enabled.
> >> During bootup time audio driver is trying to acquire HDA audio power well
> inside i915 and then it will send HDA verb commands.
> >> since cdclk is lower than 96Mhz  HDA will not comeup resulting in timeout.
> This was working fine  before SKL/APL since there was no 2 PPC .
> >>
> >> Is it ok to bump  up cdclk while bootup of system/HDA and then reduce to
> needed CDCLK?
> > I think it is worth exploring, do you have code to test whether it
> > solves this particular issue?
> No i don't have test code for this but what i learned from other OS that
> glk run at 148000 and cnl 96000*2 due to this limitation all the time.
> 
> @Shubhransu : can you please answer this doubt which we all have. This
> we should be able to get from HDA specs.

This clock setting is specific to idisp codec and HDA spec may not have details on this.
Yes we can test the changes with skylake audio driver. I believe Sathya has already
tested with the changes.

Regards,
Subhransu

> 
> >
> >> wondering if this approach can cause any issue to subsequent HDA verb
> commands ..
> >>
> >>
> >>> BR,
> >>> Jani.
> >>>
> >>>>>    		min_cdclk = max(2 * 96000, min_cdclk);
> >>>>>
> >>>>>    	if (min_cdclk > dev_priv->max_cdclk_freq) {
> >>>> _______________________________________________
> >>>> Intel-gfx mailing list
> >>>> Intel-gfx@lists.freedesktop.org
> >>>> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> >> _______________________________________________
> >> Intel-gfx mailing list
> >> Intel-gfx@lists.freedesktop.org
> >> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH] drm/i915: set minimum CD clock to twice the BCLK.

[Jani Nikula]

On Wed, 25 Oct 2017, abhay.kumar@intel.com wrote:
> From: Abhay Kumar <abhay.kumar@intel.com>
>
> In glk when device boots with only 1366x768 panel, HDA codec doesn't comeup.
> This result in no audio forever as cdclk is < 96Mhz.
> This chagne will ensure CD clock to be twice of  BCLK.

So this issue was never resolved was it?

Summing up, I think the ideas for solution were in order of preference:

1) Tie higher cdclk requirement to audio component get/put power
   callbacks, and bump up cdclk when audio requests power

2) Bump up cdclk during i915 probe, after that require higher cdclk only
   when has_audio is true

3) Require higher cdclk whenever there are display outputs that are
   capable of hda

4) Always require higher cdclk (this patch)

BR,
Jani.


>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102937
> Signed-off-by: Abhay Kumar <abhay.kumar@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_cdclk.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_cdclk.c b/drivers/gpu/drm/i915/intel_cdclk.c
> index e8884c2ade98..185a70f0921c 100644
> --- a/drivers/gpu/drm/i915/intel_cdclk.c
> +++ b/drivers/gpu/drm/i915/intel_cdclk.c
> @@ -1920,7 +1920,7 @@ int intel_crtc_compute_min_cdclk(const struct intel_crtc_state *crtc_state)
>  	/* According to BSpec, "The CD clock frequency must be at least twice
>  	 * the frequency of the Azalia BCLK." and BCLK is 96 MHz by default.
>  	 */
> -	if (crtc_state->has_audio && INTEL_GEN(dev_priv) >= 9)
> +	if (INTEL_GEN(dev_priv) >= 9)
>  		min_cdclk = max(2 * 96000, min_cdclk);
>  
>  	if (min_cdclk > dev_priv->max_cdclk_freq) {

-- 
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: FW: [PATCH] drm/i915: set minimum CD clock to twice the BCLK.

[Kumar, Abhay]

On 3/23/2018 12:21 PM, Kumar, Abhay wrote:
>
> -----Original Message-----
> From: Jani Nikula [mailto:jani.nikula@linux.intel.com]
> Sent: Wednesday, February 14, 2018 10:00 AM
> To: Kumar, Abhay <abhay.kumar@intel.com>; Intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH] drm/i915: set minimum CD clock to twice the BCLK.
>
> On Wed, 25 Oct 2017, abhay.kumar@intel.com wrote:
>> From: Abhay Kumar <abhay.kumar@intel.com>
>>
>> In glk when device boots with only 1366x768 panel, HDA codec doesn't comeup.
>> This result in no audio forever as cdclk is < 96Mhz.
>> This chagne will ensure CD clock to be twice of  BCLK.
> So this issue was never resolved was it?
>
> Summing up, I think the ideas for solution were in order of preference:
>
> 1) Tie higher cdclk requirement to audio component get/put power
>     callbacks, and bump up cdclk when audio requests power
>
> 2) Bump up cdclk during i915 probe, after that require higher cdclk only
>     when has_audio is true
>
> 3) Require higher cdclk whenever there are display outputs that are
>     capable of hda
>
> 4) Always require higher cdclk (this patch)
>
> BR,
> Jani.

First of all sorry for addressing this patch late as i got tied up in 
something else.

Yes this bug is still there and never resolved.

we can also honour VBT field which says enable or disable Dynamic cdclk 
and control this from BIOS.

Let me figure out best way and comeup with patch.
>
>> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102937
>> Signed-off-by: Abhay Kumar <abhay.kumar@intel.com>
>> ---
>>   drivers/gpu/drm/i915/intel_cdclk.c | 2 +-
>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_cdclk.c b/drivers/gpu/drm/i915/intel_cdclk.c
>> index e8884c2ade98..185a70f0921c 100644
>> --- a/drivers/gpu/drm/i915/intel_cdclk.c
>> +++ b/drivers/gpu/drm/i915/intel_cdclk.c
>> @@ -1920,7 +1920,7 @@ int intel_crtc_compute_min_cdclk(const struct intel_crtc_state *crtc_state)
>>   	/* According to BSpec, "The CD clock frequency must be at least twice
>>   	 * the frequency of the Azalia BCLK." and BCLK is 96 MHz by default.
>>   	 */
>> -	if (crtc_state->has_audio && INTEL_GEN(dev_priv) >= 9)
>> +	if (INTEL_GEN(dev_priv) >= 9)
>>   		min_cdclk = max(2 * 96000, min_cdclk);
>>   
>>   	if (min_cdclk > dev_priv->max_cdclk_freq) {

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[PATCH v2] drm/i915: set minimum CD clock to twice the BCLK.

[Abhay Kumar]

In glk when device boots with 1366x768 panel, HDA codec doesn't comeup.
This result in no audio forever as cdclk is < 96Mhz.
This chagne will ensure CD clock to be twice of  BCLK.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102937
Signed-off-by: Abhay Kumar <abhay.kumar@intel.com>
---
 drivers/gpu/drm/i915/intel_audio.c | 34 +++++++++++++++++++++++-----------
 drivers/gpu/drm/i915/intel_cdclk.c | 21 +++++++++++++++++++++
 drivers/gpu/drm/i915/intel_drv.h   |  1 +
 3 files changed, 45 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_audio.c b/drivers/gpu/drm/i915/intel_audio.c
index 709d6ca68074..ca9859a69eb2 100644
--- a/drivers/gpu/drm/i915/intel_audio.c
+++ b/drivers/gpu/drm/i915/intel_audio.c
@@ -723,15 +723,38 @@ static void i915_audio_component_put_power(struct device *kdev)
 	intel_display_power_put(kdev_to_i915(kdev), POWER_DOMAIN_AUDIO);
 }
 
+/* Get CDCLK in kHz  */
+static int i915_audio_component_get_cdclk_freq(struct device *kdev)
+{
+        struct drm_i915_private *dev_priv = kdev_to_i915(kdev);
+
+        if (WARN_ON_ONCE(!HAS_DDI(dev_priv)))
+                return -ENODEV;
+
+        return dev_priv->cdclk.hw.cdclk;
+}
+
 static void i915_audio_component_codec_wake_override(struct device *kdev,
 						     bool enable)
 {
 	struct drm_i915_private *dev_priv = kdev_to_i915(kdev);
 	u32 tmp;
+	int current_cdclk, min_cdclk;
 
 	if (!IS_GEN9_BC(dev_priv))
 		return;
 
+	current_cdclk = i915_audio_component_get_cdclk_freq(kdev);
+
+	/*
+	 * Before probing for HDA Codec we need to make sure
+	 * "The CD clock frequency must be at least twice
+         * the frequency of the Azalia BCLK."
+	 */
+	if (INTEL_GEN(dev_priv) >= 9 && current_cdclk <= 192000) {
+		intel_cdclk_bump(dev_priv);
+	}
+
 	i915_audio_component_get_power(kdev);
 
 	/*
@@ -753,17 +776,6 @@ static void i915_audio_component_codec_wake_override(struct device *kdev,
 	i915_audio_component_put_power(kdev);
 }
 
-/* Get CDCLK in kHz  */
-static int i915_audio_component_get_cdclk_freq(struct device *kdev)
-{
-	struct drm_i915_private *dev_priv = kdev_to_i915(kdev);
-
-	if (WARN_ON_ONCE(!HAS_DDI(dev_priv)))
-		return -ENODEV;
-
-	return dev_priv->cdclk.hw.cdclk;
-}
-
 /*
  * get the intel_encoder according to the parameter port and pipe
  * intel_encoder is saved by the index of pipe
diff --git a/drivers/gpu/drm/i915/intel_cdclk.c b/drivers/gpu/drm/i915/intel_cdclk.c
index dc7db8a2caf8..9426e1b7badc 100644
--- a/drivers/gpu/drm/i915/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/intel_cdclk.c
@@ -1516,6 +1516,27 @@ void bxt_init_cdclk(struct drm_i915_private *dev_priv)
 }
 
 /**
+ * intel_cdclk_bump - Increase cdclk to 2* BCLK
+ * @dev_priv: i915 device
+ *
+ * Increase CDCLK for GKL and CNL. This is done only
+ * during HDA codec probe.
+ */
+void intel_cdclk_bump(struct drm_i915_private *dev_priv)
+{
+	struct intel_cdclk_state cdclk_state;
+
+	cdclk_state = dev_priv->cdclk.hw;
+
+	if (IS_GEMINILAKE(dev_priv)) {
+		cdclk_state.cdclk = glk_calc_cdclk((2*96000));
+		cdclk_state.vco = glk_de_pll_vco(dev_priv, cdclk_state.cdclk);
+		cdclk_state.voltage_level = bxt_calc_voltage_level(cdclk_state.cdclk);
+		bxt_set_cdclk(dev_priv, &cdclk_state);
+	}
+}
+
+/**
  * bxt_uninit_cdclk - Uninitialize CDCLK on BXT
  * @dev_priv: i915 device
  *
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index d1452fd2a58d..5192753df3dc 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1417,6 +1417,7 @@ void skl_uninit_cdclk(struct drm_i915_private *dev_priv);
 void cnl_init_cdclk(struct drm_i915_private *dev_priv);
 void cnl_uninit_cdclk(struct drm_i915_private *dev_priv);
 void bxt_init_cdclk(struct drm_i915_private *dev_priv);
+void intel_cdclk_bump(struct drm_i915_private *dev_priv);
 void bxt_uninit_cdclk(struct drm_i915_private *dev_priv);
 void icl_init_cdclk(struct drm_i915_private *dev_priv);
 void icl_uninit_cdclk(struct drm_i915_private *dev_priv);
-- 
2.7.4

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✗ Fi.CI.BAT: failure for drm/i915: set minimum CD clock to twice the BCLK. (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915: set minimum CD clock to twice the BCLK. (rev2)
URL   : https://patchwork.freedesktop.org/series/32657/
State : failure

== Summary ==

CHK     include/config/kernel.release
  CHK     include/generated/uapi/linux/version.h
  CHK     include/generated/utsrelease.h
  CHK     include/generated/bounds.h
  CHK     include/generated/timeconst.h
  CHK     include/generated/asm-offsets.h
  CALL    scripts/checksyscalls.sh
  DESCEND  objtool
  CHK     scripts/mod/devicetable-offsets.h
  CHK     include/generated/compile.h
  CHK     kernel/config_data.h
  CC [M]  drivers/gpu/drm/i915/intel_audio.o
drivers/gpu/drm/i915/intel_audio.c: In function ‘i915_audio_component_codec_wake_override’:
drivers/gpu/drm/i915/intel_audio.c:742:21: error: unused variable ‘min_cdclk’ [-Werror=unused-variable]
  int current_cdclk, min_cdclk;
                     ^~~~~~~~~
cc1: all warnings being treated as errors
scripts/Makefile.build:324: recipe for target 'drivers/gpu/drm/i915/intel_audio.o' failed
make[4]: *** [drivers/gpu/drm/i915/intel_audio.o] Error 1
scripts/Makefile.build:583: recipe for target 'drivers/gpu/drm/i915' failed
make[3]: *** [drivers/gpu/drm/i915] Error 2
scripts/Makefile.build:583: recipe for target 'drivers/gpu/drm' failed
make[2]: *** [drivers/gpu/drm] Error 2
scripts/Makefile.build:583: recipe for target 'drivers/gpu' failed
make[1]: *** [drivers/gpu] Error 2
Makefile:1060: recipe for target 'drivers' failed
make: *** [drivers] Error 2

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[PATCH v2] drm/i915: set minimum CD clock to twice the BCLK.

[Abhay Kumar]

In glk when device boots with 1366x768 panel, HDA codec doesn't comeup.
This result in no audio forever as cdclk is < 96Mhz.
This chagne will ensure CD clock to be twice of  BCLK.

v2:
    - Address comment (Jani)
    - New design approach

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102937
Signed-off-by: Abhay Kumar <abhay.kumar@intel.com>
---
 drivers/gpu/drm/i915/intel_audio.c | 33 ++++++++++++++++++++++-----------
 drivers/gpu/drm/i915/intel_cdclk.c | 21 +++++++++++++++++++++
 drivers/gpu/drm/i915/intel_drv.h   |  1 +
 3 files changed, 44 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_audio.c b/drivers/gpu/drm/i915/intel_audio.c
index 709d6ca68074..f7dd3d532e93 100644
--- a/drivers/gpu/drm/i915/intel_audio.c
+++ b/drivers/gpu/drm/i915/intel_audio.c
@@ -723,15 +723,37 @@ static void i915_audio_component_put_power(struct device *kdev)
 	intel_display_power_put(kdev_to_i915(kdev), POWER_DOMAIN_AUDIO);
 }
 
+/* Get CDCLK in kHz  */
+static int i915_audio_component_get_cdclk_freq(struct device *kdev)
+{
+	struct drm_i915_private *dev_priv = kdev_to_i915(kdev);
+
+	if (WARN_ON_ONCE(!HAS_DDI(dev_priv)))
+		return -ENODEV;
+
+	return dev_priv->cdclk.hw.cdclk;
+}
+
 static void i915_audio_component_codec_wake_override(struct device *kdev,
 						     bool enable)
 {
 	struct drm_i915_private *dev_priv = kdev_to_i915(kdev);
 	u32 tmp;
+	int current_cdclk;
 
 	if (!IS_GEN9_BC(dev_priv))
 		return;
 
+	current_cdclk = i915_audio_component_get_cdclk_freq(kdev);
+
+	/*
+	 * Before probing for HDA Codec we need to make sure
+	 * "The CD clock frequency must be at least twice
+	 * the frequency of the Azalia BCLK."
+	 */
+	if (INTEL_GEN(dev_priv) >= 9 && current_cdclk <= 192000)
+		intel_cdclk_bump(dev_priv);
+
 	i915_audio_component_get_power(kdev);
 
 	/*
@@ -753,17 +775,6 @@ static void i915_audio_component_codec_wake_override(struct device *kdev,
 	i915_audio_component_put_power(kdev);
 }
 
-/* Get CDCLK in kHz  */
-static int i915_audio_component_get_cdclk_freq(struct device *kdev)
-{
-	struct drm_i915_private *dev_priv = kdev_to_i915(kdev);
-
-	if (WARN_ON_ONCE(!HAS_DDI(dev_priv)))
-		return -ENODEV;
-
-	return dev_priv->cdclk.hw.cdclk;
-}
-
 /*
  * get the intel_encoder according to the parameter port and pipe
  * intel_encoder is saved by the index of pipe
diff --git a/drivers/gpu/drm/i915/intel_cdclk.c b/drivers/gpu/drm/i915/intel_cdclk.c
index dc7db8a2caf8..9426e1b7badc 100644
--- a/drivers/gpu/drm/i915/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/intel_cdclk.c
@@ -1516,6 +1516,27 @@ void bxt_init_cdclk(struct drm_i915_private *dev_priv)
 }
 
 /**
+ * intel_cdclk_bump - Increase cdclk to 2* BCLK
+ * @dev_priv: i915 device
+ *
+ * Increase CDCLK for GKL and CNL. This is done only
+ * during HDA codec probe.
+ */
+void intel_cdclk_bump(struct drm_i915_private *dev_priv)
+{
+	struct intel_cdclk_state cdclk_state;
+
+	cdclk_state = dev_priv->cdclk.hw;
+
+	if (IS_GEMINILAKE(dev_priv)) {
+		cdclk_state.cdclk = glk_calc_cdclk((2*96000));
+		cdclk_state.vco = glk_de_pll_vco(dev_priv, cdclk_state.cdclk);
+		cdclk_state.voltage_level = bxt_calc_voltage_level(cdclk_state.cdclk);
+		bxt_set_cdclk(dev_priv, &cdclk_state);
+	}
+}
+
+/**
  * bxt_uninit_cdclk - Uninitialize CDCLK on BXT
  * @dev_priv: i915 device
  *
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index d1452fd2a58d..5192753df3dc 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1417,6 +1417,7 @@ void skl_uninit_cdclk(struct drm_i915_private *dev_priv);
 void cnl_init_cdclk(struct drm_i915_private *dev_priv);
 void cnl_uninit_cdclk(struct drm_i915_private *dev_priv);
 void bxt_init_cdclk(struct drm_i915_private *dev_priv);
+void intel_cdclk_bump(struct drm_i915_private *dev_priv);
 void bxt_uninit_cdclk(struct drm_i915_private *dev_priv);
 void icl_init_cdclk(struct drm_i915_private *dev_priv);
 void icl_uninit_cdclk(struct drm_i915_private *dev_priv);
-- 
2.7.4

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✗ Fi.CI.CHECKPATCH: warning for drm/i915: set minimum CD clock to twice the BCLK. (rev3)

[Patchwork]

== Series Details ==

Series: drm/i915: set minimum CD clock to twice the BCLK. (rev3)
URL   : https://patchwork.freedesktop.org/series/32657/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
8183ab2bd26b drm/i915: set minimum CD clock to twice the BCLK.
-:98: CHECK:SPACING: spaces preferred around that '*' (ctx:VxV)
#98: FILE: drivers/gpu/drm/i915/intel_cdclk.c:1532:
+		cdclk_state.cdclk = glk_calc_cdclk((2*96000));
 		                                     ^

total: 0 errors, 0 warnings, 1 checks, 88 lines checked

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✓ Fi.CI.BAT: success for drm/i915: set minimum CD clock to twice the BCLK. (rev3)

[Patchwork]

== Series Details ==

Series: drm/i915: set minimum CD clock to twice the BCLK. (rev3)
URL   : https://patchwork.freedesktop.org/series/32657/
State : success

== Summary ==

Series 32657v3 drm/i915: set minimum CD clock to twice the BCLK.
https://patchwork.freedesktop.org/api/1.0/series/32657/revisions/3/mbox/

---- Known issues:

Test debugfs_test:
        Subgroup read_all_entries:
                pass       -> INCOMPLETE (fi-snb-2520m) fdo#103713
Test gem_mmap_gtt:
        Subgroup basic-small-bo-tiledx:
                pass       -> FAIL       (fi-gdg-551) fdo#102575
Test kms_pipe_crc_basic:
        Subgroup suspend-read-crc-pipe-a:
                dmesg-warn -> PASS       (fi-cnl-y3) fdo#104951
                pass       -> FAIL       (fi-ivb-3520m) k.org#198519 +2
        Subgroup suspend-read-crc-pipe-c:
                pass       -> DMESG-WARN (fi-glk-j4005) fdo#105644
Test prime_vgem:
        Subgroup basic-fence-flip:
                fail       -> PASS       (fi-ilk-650) fdo#104008

fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713
fdo#102575 https://bugs.freedesktop.org/show_bug.cgi?id=102575
fdo#104951 https://bugs.freedesktop.org/show_bug.cgi?id=104951
k.org#198519 https://bugzilla.kernel.org/show_bug.cgi?id=198519
fdo#105644 https://bugs.freedesktop.org/show_bug.cgi?id=105644
fdo#104008 https://bugs.freedesktop.org/show_bug.cgi?id=104008

fi-bdw-5557u     total:285  pass:264  dwarn:0   dfail:0   fail:0   skip:21  time:429s
fi-bdw-gvtdvm    total:285  pass:261  dwarn:0   dfail:0   fail:0   skip:24  time:440s
fi-blb-e6850     total:285  pass:220  dwarn:1   dfail:0   fail:0   skip:64  time:380s
fi-bsw-n3050     total:285  pass:239  dwarn:0   dfail:0   fail:0   skip:46  time:542s
fi-bwr-2160      total:285  pass:180  dwarn:0   dfail:0   fail:0   skip:105 time:298s
fi-bxt-dsi       total:285  pass:255  dwarn:0   dfail:0   fail:0   skip:30  time:514s
fi-bxt-j4205     total:285  pass:256  dwarn:0   dfail:0   fail:0   skip:29  time:513s
fi-byt-j1900     total:285  pass:250  dwarn:0   dfail:0   fail:0   skip:35  time:520s
fi-byt-n2820     total:285  pass:246  dwarn:0   dfail:0   fail:0   skip:39  time:506s
fi-cfl-8700k     total:285  pass:257  dwarn:0   dfail:0   fail:0   skip:28  time:410s
fi-cfl-s3        total:285  pass:259  dwarn:0   dfail:0   fail:0   skip:26  time:564s
fi-cfl-u         total:285  pass:259  dwarn:0   dfail:0   fail:0   skip:26  time:511s
fi-cnl-y3        total:285  pass:259  dwarn:0   dfail:0   fail:0   skip:26  time:594s
fi-elk-e7500     total:285  pass:226  dwarn:0   dfail:0   fail:0   skip:59  time:423s
fi-gdg-551       total:285  pass:176  dwarn:0   dfail:0   fail:1   skip:108 time:317s
fi-glk-1         total:285  pass:257  dwarn:0   dfail:0   fail:0   skip:28  time:541s
fi-glk-j4005     total:285  pass:255  dwarn:1   dfail:0   fail:0   skip:29  time:484s
fi-hsw-4770      total:285  pass:258  dwarn:0   dfail:0   fail:0   skip:27  time:404s
fi-ilk-650       total:285  pass:225  dwarn:0   dfail:0   fail:0   skip:60  time:422s
fi-ivb-3520m     total:285  pass:253  dwarn:0   dfail:0   fail:3   skip:29  time:412s
fi-ivb-3770      total:285  pass:252  dwarn:0   dfail:0   fail:0   skip:33  time:430s
fi-kbl-7500u     total:285  pass:260  dwarn:1   dfail:0   fail:0   skip:24  time:476s
fi-kbl-7567u     total:285  pass:265  dwarn:0   dfail:0   fail:0   skip:20  time:462s
fi-kbl-r         total:285  pass:258  dwarn:0   dfail:0   fail:0   skip:27  time:510s
fi-pnv-d510      total:285  pass:220  dwarn:1   dfail:0   fail:0   skip:64  time:666s
fi-skl-6260u     total:285  pass:265  dwarn:0   dfail:0   fail:0   skip:20  time:448s
fi-skl-6600u     total:285  pass:258  dwarn:0   dfail:0   fail:0   skip:27  time:541s
fi-skl-6700k2    total:285  pass:261  dwarn:0   dfail:0   fail:0   skip:24  time:506s
fi-skl-6770hq    total:285  pass:265  dwarn:0   dfail:0   fail:0   skip:20  time:491s
fi-skl-guc       total:285  pass:257  dwarn:0   dfail:0   fail:0   skip:28  time:431s
fi-skl-gvtdvm    total:285  pass:262  dwarn:0   dfail:0   fail:0   skip:23  time:446s
fi-snb-2520m     total:3    pass:2    dwarn:0   dfail:0   fail:0   skip:0  
fi-snb-2600      total:285  pass:245  dwarn:0   dfail:0   fail:0   skip:40  time:401s
Blacklisted hosts:
fi-cnl-psr       total:285  pass:256  dwarn:3   dfail:0   fail:0   skip:26  time:529s

fcaf73c13c14d6bfd64c4f37089bf5437fb32221 drm-tip: 2018y-04m-05d-15h-53m-18s UTC integration manifest
8183ab2bd26b drm/i915: set minimum CD clock to twice the BCLK.

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8607/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✗ Fi.CI.IGT: failure for drm/i915: set minimum CD clock to twice the BCLK. (rev3)

[Patchwork]

== Series Details ==

Series: drm/i915: set minimum CD clock to twice the BCLK. (rev3)
URL   : https://patchwork.freedesktop.org/series/32657/
State : failure

== Summary ==

---- Possible new issues:

Test kms_frontbuffer_tracking:
        Subgroup fbc-2p-scndscrn-cur-indfb-move:
                pass       -> DMESG-FAIL (shard-hsw)
        Subgroup fbcpsr-1p-primscrn-shrfb-msflip-blt:
                fail       -> SKIP       (shard-snb)

---- Known issues:

Test kms_flip:
        Subgroup 2x-flip-vs-expired-vblank:
                fail       -> PASS       (shard-hsw) fdo#102887
        Subgroup plain-flip-ts-check:
                fail       -> PASS       (shard-hsw) fdo#100368
Test kms_plane_multiple:
        Subgroup atomic-pipe-a-tiling-x:
                fail       -> PASS       (shard-snb) fdo#103166
Test kms_rotation_crc:
        Subgroup primary-rotation-180:
                fail       -> PASS       (shard-snb) fdo#103925
Test kms_setmode:
        Subgroup basic:
                pass       -> FAIL       (shard-apl) fdo#99912
Test perf:
        Subgroup blocking:
                fail       -> PASS       (shard-hsw) fdo#102252

fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887
fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166
fdo#103925 https://bugs.freedesktop.org/show_bug.cgi?id=103925
fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912
fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252

shard-apl        total:2680 pass:1835 dwarn:1   dfail:0   fail:7   skip:836 time:12651s
shard-hsw        total:2680 pass:1785 dwarn:1   dfail:1   fail:1   skip:891 time:11433s
shard-snb        total:2680 pass:1378 dwarn:1   dfail:0   fail:2   skip:1299 time:6929s
Blacklisted hosts:
shard-kbl        total:1927 pass:1405 dwarn:2   dfail:0   fail:5   skip:515 time:6526s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8607/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH v2] drm/i915: set minimum CD clock to twice the BCLK.

[kbuild test robot]

[-- Attachment #1: Type: text/plain, Size: 2596 bytes --]

Hi Abhay,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on v4.16 next-20180405]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url:    https://github.com/0day-ci/linux/commits/Abhay-Kumar/drm-i915-set-minimum-CD-clock-to-twice-the-BCLK/20180406-143913
base:   git://anongit.freedesktop.org/drm-intel for-linux-next
config: x86_64-randconfig-x001-201813 (attached as .config)
compiler: gcc-7 (Debian 7.3.0-1) 7.3.0
reproduce:
        # save the attached .config to linux build tree
        make ARCH=x86_64 

All errors (new ones prefixed by >>):

   drivers/gpu//drm/i915/intel_audio.c: In function 'i915_audio_component_codec_wake_override':
>> drivers/gpu//drm/i915/intel_audio.c:742:21: error: unused variable 'min_cdclk' [-Werror=unused-variable]
     int current_cdclk, min_cdclk;
                        ^~~~~~~~~
   cc1: all warnings being treated as errors

vim +/min_cdclk +742 drivers/gpu//drm/i915/intel_audio.c

   736	
   737	static void i915_audio_component_codec_wake_override(struct device *kdev,
   738							     bool enable)
   739	{
   740		struct drm_i915_private *dev_priv = kdev_to_i915(kdev);
   741		u32 tmp;
 > 742		int current_cdclk, min_cdclk;
   743	
   744		if (!IS_GEN9_BC(dev_priv))
   745			return;
   746	
   747		current_cdclk = i915_audio_component_get_cdclk_freq(kdev);
   748	
   749		/*
   750		 * Before probing for HDA Codec we need to make sure
   751		 * "The CD clock frequency must be at least twice
   752	         * the frequency of the Azalia BCLK."
   753		 */
   754		if (INTEL_GEN(dev_priv) >= 9 && current_cdclk <= 192000) {
   755			intel_cdclk_bump(dev_priv);
   756		}
   757	
   758		i915_audio_component_get_power(kdev);
   759	
   760		/*
   761		 * Enable/disable generating the codec wake signal, overriding the
   762		 * internal logic to generate the codec wake to controller.
   763		 */
   764		tmp = I915_READ(HSW_AUD_CHICKENBIT);
   765		tmp &= ~SKL_AUD_CODEC_WAKE_SIGNAL;
   766		I915_WRITE(HSW_AUD_CHICKENBIT, tmp);
   767		usleep_range(1000, 1500);
   768	
   769		if (enable) {
   770			tmp = I915_READ(HSW_AUD_CHICKENBIT);
   771			tmp |= SKL_AUD_CODEC_WAKE_SIGNAL;
   772			I915_WRITE(HSW_AUD_CHICKENBIT, tmp);
   773			usleep_range(1000, 1500);
   774		}
   775	
   776		i915_audio_component_put_power(kdev);
   777	}
   778	

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation

[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 33462 bytes --]

[-- Attachment #3: Type: text/plain, Size: 160 bytes --]

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH v2] drm/i915: set minimum CD clock to twice the BCLK.

[Jani Nikula]

On Thu, 05 Apr 2018, Abhay Kumar <abhay.kumar@intel.com> wrote:
> In glk when device boots with 1366x768 panel, HDA codec doesn't comeup.
> This result in no audio forever as cdclk is < 96Mhz.
> This chagne will ensure CD clock to be twice of  BCLK.

In short, we can't poke around CDCLK like this. It needs a full modeset,
and it's non-trivial from the path you're calling this from.

I'm considering pushing the original patch [1], because we haven't come
up with working alternatives. Please confirm that the patch reliably
fixes the issue.

(Though I think if you boot with *all* outputs disabled, we'll choose
the lowest CDCLK possible regardless of the patch, reproducing the same
issue.)

What's the CDCLK frequency set by the BIOS/GOP at boot? There are no
logs with drm.debug=14 attached to the referenced bug.

I see that bspec says, "158.4 MHz CD (Display Audio enumeration and
playback OK)" but that's *not* twice the BCLK. I'm inclined to lean
towards 192 MHz min leading to max CDCLK on GLK.

BR,
Jani.


[1] https://patchwork.freedesktop.org/patch/184778/



>
> v2:
>     - Address comment (Jani)
>     - New design approach
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102937
> Signed-off-by: Abhay Kumar <abhay.kumar@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_audio.c | 33 ++++++++++++++++++++++-----------
>  drivers/gpu/drm/i915/intel_cdclk.c | 21 +++++++++++++++++++++
>  drivers/gpu/drm/i915/intel_drv.h   |  1 +
>  3 files changed, 44 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_audio.c b/drivers/gpu/drm/i915/intel_audio.c
> index 709d6ca68074..f7dd3d532e93 100644
> --- a/drivers/gpu/drm/i915/intel_audio.c
> +++ b/drivers/gpu/drm/i915/intel_audio.c
> @@ -723,15 +723,37 @@ static void i915_audio_component_put_power(struct device *kdev)
>  	intel_display_power_put(kdev_to_i915(kdev), POWER_DOMAIN_AUDIO);
>  }
>  
> +/* Get CDCLK in kHz  */
> +static int i915_audio_component_get_cdclk_freq(struct device *kdev)
> +{
> +	struct drm_i915_private *dev_priv = kdev_to_i915(kdev);
> +
> +	if (WARN_ON_ONCE(!HAS_DDI(dev_priv)))
> +		return -ENODEV;
> +
> +	return dev_priv->cdclk.hw.cdclk;
> +}
> +
>  static void i915_audio_component_codec_wake_override(struct device *kdev,
>  						     bool enable)
>  {
>  	struct drm_i915_private *dev_priv = kdev_to_i915(kdev);
>  	u32 tmp;
> +	int current_cdclk;
>  
>  	if (!IS_GEN9_BC(dev_priv))
>  		return;
>  
> +	current_cdclk = i915_audio_component_get_cdclk_freq(kdev);
> +
> +	/*
> +	 * Before probing for HDA Codec we need to make sure
> +	 * "The CD clock frequency must be at least twice
> +	 * the frequency of the Azalia BCLK."
> +	 */
> +	if (INTEL_GEN(dev_priv) >= 9 && current_cdclk <= 192000)
> +		intel_cdclk_bump(dev_priv);
> +
>  	i915_audio_component_get_power(kdev);
>  
>  	/*
> @@ -753,17 +775,6 @@ static void i915_audio_component_codec_wake_override(struct device *kdev,
>  	i915_audio_component_put_power(kdev);
>  }
>  
> -/* Get CDCLK in kHz  */
> -static int i915_audio_component_get_cdclk_freq(struct device *kdev)
> -{
> -	struct drm_i915_private *dev_priv = kdev_to_i915(kdev);
> -
> -	if (WARN_ON_ONCE(!HAS_DDI(dev_priv)))
> -		return -ENODEV;
> -
> -	return dev_priv->cdclk.hw.cdclk;
> -}
> -
>  /*
>   * get the intel_encoder according to the parameter port and pipe
>   * intel_encoder is saved by the index of pipe
> diff --git a/drivers/gpu/drm/i915/intel_cdclk.c b/drivers/gpu/drm/i915/intel_cdclk.c
> index dc7db8a2caf8..9426e1b7badc 100644
> --- a/drivers/gpu/drm/i915/intel_cdclk.c
> +++ b/drivers/gpu/drm/i915/intel_cdclk.c
> @@ -1516,6 +1516,27 @@ void bxt_init_cdclk(struct drm_i915_private *dev_priv)
>  }
>  
>  /**
> + * intel_cdclk_bump - Increase cdclk to 2* BCLK
> + * @dev_priv: i915 device
> + *
> + * Increase CDCLK for GKL and CNL. This is done only
> + * during HDA codec probe.
> + */
> +void intel_cdclk_bump(struct drm_i915_private *dev_priv)
> +{
> +	struct intel_cdclk_state cdclk_state;
> +
> +	cdclk_state = dev_priv->cdclk.hw;
> +
> +	if (IS_GEMINILAKE(dev_priv)) {
> +		cdclk_state.cdclk = glk_calc_cdclk((2*96000));
> +		cdclk_state.vco = glk_de_pll_vco(dev_priv, cdclk_state.cdclk);
> +		cdclk_state.voltage_level = bxt_calc_voltage_level(cdclk_state.cdclk);
> +		bxt_set_cdclk(dev_priv, &cdclk_state);
> +	}
> +}
> +
> +/**
>   * bxt_uninit_cdclk - Uninitialize CDCLK on BXT
>   * @dev_priv: i915 device
>   *
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index d1452fd2a58d..5192753df3dc 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -1417,6 +1417,7 @@ void skl_uninit_cdclk(struct drm_i915_private *dev_priv);
>  void cnl_init_cdclk(struct drm_i915_private *dev_priv);
>  void cnl_uninit_cdclk(struct drm_i915_private *dev_priv);
>  void bxt_init_cdclk(struct drm_i915_private *dev_priv);
> +void intel_cdclk_bump(struct drm_i915_private *dev_priv);
>  void bxt_uninit_cdclk(struct drm_i915_private *dev_priv);
>  void icl_init_cdclk(struct drm_i915_private *dev_priv);
>  void icl_uninit_cdclk(struct drm_i915_private *dev_priv);

-- 
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH v2] drm/i915: set minimum CD clock to twice the BCLK.

[Ville Syrjälä]

On Fri, Apr 06, 2018 at 04:47:08PM +0300, Jani Nikula wrote:
> On Thu, 05 Apr 2018, Abhay Kumar <abhay.kumar@intel.com> wrote:
> > In glk when device boots with 1366x768 panel, HDA codec doesn't comeup.
> > This result in no audio forever as cdclk is < 96Mhz.
> > This chagne will ensure CD clock to be twice of  BCLK.
> 
> In short, we can't poke around CDCLK like this. It needs a full modeset,
> and it's non-trivial from the path you're calling this from.

I tried to cobble something together quickly:
git://github.com/vsyrjala/linux.git glk_cnl_cdclk_audio

Not tested at all, and I have no idea if my assumptions about
snd_hda_intel actually hold.

> 
> I'm considering pushing the original patch [1], because we haven't come
> up with working alternatives. Please confirm that the patch reliably
> fixes the issue.
> 
> (Though I think if you boot with *all* outputs disabled, we'll choose
> the lowest CDCLK possible regardless of the patch, reproducing the same
> issue.)
> 
> What's the CDCLK frequency set by the BIOS/GOP at boot? There are no
> logs with drm.debug=14 attached to the referenced bug.
> 
> I see that bspec says, "158.4 MHz CD (Display Audio enumeration and
> playback OK)" but that's *not* twice the BCLK. I'm inclined to lean
> towards 192 MHz min leading to max CDCLK on GLK.
> 
> BR,
> Jani.
> 
> 
> [1] https://patchwork.freedesktop.org/patch/184778/
> 
> 
> 
> >
> > v2:
> >     - Address comment (Jani)
> >     - New design approach
> >
> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102937
> > Signed-off-by: Abhay Kumar <abhay.kumar@intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_audio.c | 33 ++++++++++++++++++++++-----------
> >  drivers/gpu/drm/i915/intel_cdclk.c | 21 +++++++++++++++++++++
> >  drivers/gpu/drm/i915/intel_drv.h   |  1 +
> >  3 files changed, 44 insertions(+), 11 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_audio.c b/drivers/gpu/drm/i915/intel_audio.c
> > index 709d6ca68074..f7dd3d532e93 100644
> > --- a/drivers/gpu/drm/i915/intel_audio.c
> > +++ b/drivers/gpu/drm/i915/intel_audio.c
> > @@ -723,15 +723,37 @@ static void i915_audio_component_put_power(struct device *kdev)
> >  	intel_display_power_put(kdev_to_i915(kdev), POWER_DOMAIN_AUDIO);
> >  }
> >  
> > +/* Get CDCLK in kHz  */
> > +static int i915_audio_component_get_cdclk_freq(struct device *kdev)
> > +{
> > +	struct drm_i915_private *dev_priv = kdev_to_i915(kdev);
> > +
> > +	if (WARN_ON_ONCE(!HAS_DDI(dev_priv)))
> > +		return -ENODEV;
> > +
> > +	return dev_priv->cdclk.hw.cdclk;
> > +}
> > +
> >  static void i915_audio_component_codec_wake_override(struct device *kdev,
> >  						     bool enable)
> >  {
> >  	struct drm_i915_private *dev_priv = kdev_to_i915(kdev);
> >  	u32 tmp;
> > +	int current_cdclk;
> >  
> >  	if (!IS_GEN9_BC(dev_priv))
> >  		return;
> >  
> > +	current_cdclk = i915_audio_component_get_cdclk_freq(kdev);
> > +
> > +	/*
> > +	 * Before probing for HDA Codec we need to make sure
> > +	 * "The CD clock frequency must be at least twice
> > +	 * the frequency of the Azalia BCLK."
> > +	 */
> > +	if (INTEL_GEN(dev_priv) >= 9 && current_cdclk <= 192000)
> > +		intel_cdclk_bump(dev_priv);
> > +
> >  	i915_audio_component_get_power(kdev);
> >  
> >  	/*
> > @@ -753,17 +775,6 @@ static void i915_audio_component_codec_wake_override(struct device *kdev,
> >  	i915_audio_component_put_power(kdev);
> >  }
> >  
> > -/* Get CDCLK in kHz  */
> > -static int i915_audio_component_get_cdclk_freq(struct device *kdev)
> > -{
> > -	struct drm_i915_private *dev_priv = kdev_to_i915(kdev);
> > -
> > -	if (WARN_ON_ONCE(!HAS_DDI(dev_priv)))
> > -		return -ENODEV;
> > -
> > -	return dev_priv->cdclk.hw.cdclk;
> > -}
> > -
> >  /*
> >   * get the intel_encoder according to the parameter port and pipe
> >   * intel_encoder is saved by the index of pipe
> > diff --git a/drivers/gpu/drm/i915/intel_cdclk.c b/drivers/gpu/drm/i915/intel_cdclk.c
> > index dc7db8a2caf8..9426e1b7badc 100644
> > --- a/drivers/gpu/drm/i915/intel_cdclk.c
> > +++ b/drivers/gpu/drm/i915/intel_cdclk.c
> > @@ -1516,6 +1516,27 @@ void bxt_init_cdclk(struct drm_i915_private *dev_priv)
> >  }
> >  
> >  /**
> > + * intel_cdclk_bump - Increase cdclk to 2* BCLK
> > + * @dev_priv: i915 device
> > + *
> > + * Increase CDCLK for GKL and CNL. This is done only
> > + * during HDA codec probe.
> > + */
> > +void intel_cdclk_bump(struct drm_i915_private *dev_priv)
> > +{
> > +	struct intel_cdclk_state cdclk_state;
> > +
> > +	cdclk_state = dev_priv->cdclk.hw;
> > +
> > +	if (IS_GEMINILAKE(dev_priv)) {
> > +		cdclk_state.cdclk = glk_calc_cdclk((2*96000));
> > +		cdclk_state.vco = glk_de_pll_vco(dev_priv, cdclk_state.cdclk);
> > +		cdclk_state.voltage_level = bxt_calc_voltage_level(cdclk_state.cdclk);
> > +		bxt_set_cdclk(dev_priv, &cdclk_state);
> > +	}
> > +}
> > +
> > +/**
> >   * bxt_uninit_cdclk - Uninitialize CDCLK on BXT
> >   * @dev_priv: i915 device
> >   *
> > diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> > index d1452fd2a58d..5192753df3dc 100644
> > --- a/drivers/gpu/drm/i915/intel_drv.h
> > +++ b/drivers/gpu/drm/i915/intel_drv.h
> > @@ -1417,6 +1417,7 @@ void skl_uninit_cdclk(struct drm_i915_private *dev_priv);
> >  void cnl_init_cdclk(struct drm_i915_private *dev_priv);
> >  void cnl_uninit_cdclk(struct drm_i915_private *dev_priv);
> >  void bxt_init_cdclk(struct drm_i915_private *dev_priv);
> > +void intel_cdclk_bump(struct drm_i915_private *dev_priv);
> >  void bxt_uninit_cdclk(struct drm_i915_private *dev_priv);
> >  void icl_init_cdclk(struct drm_i915_private *dev_priv);
> >  void icl_uninit_cdclk(struct drm_i915_private *dev_priv);
> 
> -- 
> Jani Nikula, Intel Open Source Technology Center
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH v2] drm/i915: set minimum CD clock to twice the BCLK.

[Kumar, Abhay]

On 4/9/2018 3:33 AM, Ville Syrjälä wrote:
> On Fri, Apr 06, 2018 at 04:47:08PM +0300, Jani Nikula wrote:
>> On Thu, 05 Apr 2018, Abhay Kumar <abhay.kumar@intel.com> wrote:
>>> In glk when device boots with 1366x768 panel, HDA codec doesn't comeup.
>>> This result in no audio forever as cdclk is < 96Mhz.
>>> This chagne will ensure CD clock to be twice of  BCLK.
>> In short, we can't poke around CDCLK like this. It needs a full modeset,
>> and it's non-trivial from the path you're calling this from.
> I tried to cobble something together quickly:
> git://github.com/vsyrjala/linux.git glk_cnl_cdclk_audio
>
> Not tested at all, and I have no idea if my assumptions about
> snd_hda_intel actually hold.
Hi Ville,

     Tried your patch but as soon as it enters "glk_force_audio_cdclk" 
the device locks up and reboots.  waited for 30-40 times and it always 
reboot at same place.
It never reaches Chrome OS login screen.

Thanks.
>
>> I'm considering pushing the original patch [1], because we haven't come
>> up with working alternatives. Please confirm that the patch reliably
>> fixes the issue.
>>
>> (Though I think if you boot with *all* outputs disabled, we'll choose
>> the lowest CDCLK possible regardless of the patch, reproducing the same
>> issue.)
>>
>> What's the CDCLK frequency set by the BIOS/GOP at boot? There are no
>> logs with drm.debug=14 attached to the referenced bug.
>>
>> I see that bspec says, "158.4 MHz CD (Display Audio enumeration and
>> playback OK)" but that's *not* twice the BCLK. I'm inclined to lean
>> towards 192 MHz min leading to max CDCLK on GLK.
>>
>> BR,
>> Jani.
Hi Jani,
    Dynamic cdclk is disabled in BIOS/GOP hence gop makes it to highest 
clock i.e 316.8. Will attach logs with drm debug enabled in bug.
I am also inclined towards 192 which will make max cdclk..

Currently testing all scenario to confirm if patchset 1 fixes all issue 
or not. There was 4s delay issue during s0ix from audio which i 
specifically want to test.

Thanks.


>>
>>
>> [1] https://patchwork.freedesktop.org/patch/184778/
>>
>>
>>
>>> v2:
>>>      - Address comment (Jani)
>>>      - New design approach
>>>
>>> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102937
>>> Signed-off-by: Abhay Kumar <abhay.kumar@intel.com>
>>> ---
>>>   drivers/gpu/drm/i915/intel_audio.c | 33 ++++++++++++++++++++++-----------
>>>   drivers/gpu/drm/i915/intel_cdclk.c | 21 +++++++++++++++++++++
>>>   drivers/gpu/drm/i915/intel_drv.h   |  1 +
>>>   3 files changed, 44 insertions(+), 11 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/intel_audio.c b/drivers/gpu/drm/i915/intel_audio.c
>>> index 709d6ca68074..f7dd3d532e93 100644
>>> --- a/drivers/gpu/drm/i915/intel_audio.c
>>> +++ b/drivers/gpu/drm/i915/intel_audio.c
>>> @@ -723,15 +723,37 @@ static void i915_audio_component_put_power(struct device *kdev)
>>>   	intel_display_power_put(kdev_to_i915(kdev), POWER_DOMAIN_AUDIO);
>>>   }
>>>   
>>> +/* Get CDCLK in kHz  */
>>> +static int i915_audio_component_get_cdclk_freq(struct device *kdev)
>>> +{
>>> +	struct drm_i915_private *dev_priv = kdev_to_i915(kdev);
>>> +
>>> +	if (WARN_ON_ONCE(!HAS_DDI(dev_priv)))
>>> +		return -ENODEV;
>>> +
>>> +	return dev_priv->cdclk.hw.cdclk;
>>> +}
>>> +
>>>   static void i915_audio_component_codec_wake_override(struct device *kdev,
>>>   						     bool enable)
>>>   {
>>>   	struct drm_i915_private *dev_priv = kdev_to_i915(kdev);
>>>   	u32 tmp;
>>> +	int current_cdclk;
>>>   
>>>   	if (!IS_GEN9_BC(dev_priv))
>>>   		return;
>>>   
>>> +	current_cdclk = i915_audio_component_get_cdclk_freq(kdev);
>>> +
>>> +	/*
>>> +	 * Before probing for HDA Codec we need to make sure
>>> +	 * "The CD clock frequency must be at least twice
>>> +	 * the frequency of the Azalia BCLK."
>>> +	 */
>>> +	if (INTEL_GEN(dev_priv) >= 9 && current_cdclk <= 192000)
>>> +		intel_cdclk_bump(dev_priv);
>>> +
>>>   	i915_audio_component_get_power(kdev);
>>>   
>>>   	/*
>>> @@ -753,17 +775,6 @@ static void i915_audio_component_codec_wake_override(struct device *kdev,
>>>   	i915_audio_component_put_power(kdev);
>>>   }
>>>   
>>> -/* Get CDCLK in kHz  */
>>> -static int i915_audio_component_get_cdclk_freq(struct device *kdev)
>>> -{
>>> -	struct drm_i915_private *dev_priv = kdev_to_i915(kdev);
>>> -
>>> -	if (WARN_ON_ONCE(!HAS_DDI(dev_priv)))
>>> -		return -ENODEV;
>>> -
>>> -	return dev_priv->cdclk.hw.cdclk;
>>> -}
>>> -
>>>   /*
>>>    * get the intel_encoder according to the parameter port and pipe
>>>    * intel_encoder is saved by the index of pipe
>>> diff --git a/drivers/gpu/drm/i915/intel_cdclk.c b/drivers/gpu/drm/i915/intel_cdclk.c
>>> index dc7db8a2caf8..9426e1b7badc 100644
>>> --- a/drivers/gpu/drm/i915/intel_cdclk.c
>>> +++ b/drivers/gpu/drm/i915/intel_cdclk.c
>>> @@ -1516,6 +1516,27 @@ void bxt_init_cdclk(struct drm_i915_private *dev_priv)
>>>   }
>>>   
>>>   /**
>>> + * intel_cdclk_bump - Increase cdclk to 2* BCLK
>>> + * @dev_priv: i915 device
>>> + *
>>> + * Increase CDCLK for GKL and CNL. This is done only
>>> + * during HDA codec probe.
>>> + */
>>> +void intel_cdclk_bump(struct drm_i915_private *dev_priv)
>>> +{
>>> +	struct intel_cdclk_state cdclk_state;
>>> +
>>> +	cdclk_state = dev_priv->cdclk.hw;
>>> +
>>> +	if (IS_GEMINILAKE(dev_priv)) {
>>> +		cdclk_state.cdclk = glk_calc_cdclk((2*96000));
>>> +		cdclk_state.vco = glk_de_pll_vco(dev_priv, cdclk_state.cdclk);
>>> +		cdclk_state.voltage_level = bxt_calc_voltage_level(cdclk_state.cdclk);
>>> +		bxt_set_cdclk(dev_priv, &cdclk_state);
>>> +	}
>>> +}
>>> +
>>> +/**
>>>    * bxt_uninit_cdclk - Uninitialize CDCLK on BXT
>>>    * @dev_priv: i915 device
>>>    *
>>> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
>>> index d1452fd2a58d..5192753df3dc 100644
>>> --- a/drivers/gpu/drm/i915/intel_drv.h
>>> +++ b/drivers/gpu/drm/i915/intel_drv.h
>>> @@ -1417,6 +1417,7 @@ void skl_uninit_cdclk(struct drm_i915_private *dev_priv);
>>>   void cnl_init_cdclk(struct drm_i915_private *dev_priv);
>>>   void cnl_uninit_cdclk(struct drm_i915_private *dev_priv);
>>>   void bxt_init_cdclk(struct drm_i915_private *dev_priv);
>>> +void intel_cdclk_bump(struct drm_i915_private *dev_priv);
>>>   void bxt_uninit_cdclk(struct drm_i915_private *dev_priv);
>>>   void icl_init_cdclk(struct drm_i915_private *dev_priv);
>>>   void icl_uninit_cdclk(struct drm_i915_private *dev_priv);
>> -- 
>> Jani Nikula, Intel Open Source Technology Center
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH v2] drm/i915: set minimum CD clock to twice the BCLK.

[Jani Nikula]

On Mon, 09 Apr 2018, "Kumar, Abhay" <abhay.kumar@intel.com> wrote:
> Dynamic cdclk is disabled in BIOS/GOP hence gop makes it to highest 
> clock i.e 316.8. Will attach logs with drm debug enabled in bug.
> I am also inclined towards 192 which will make max cdclk..

Please also attach /sys/kernel/debug/dri/0/i915_vbt to the bug.

It doesn't look like we look at the VBT dynamic cdclk field. Does
dynamic debug disabled mean we should go for max?

BR,
Jani.


-- 
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH v2] drm/i915: set minimum CD clock to twice the BCLK.

[Jani Nikula]

On Tue, 10 Apr 2018, Jani Nikula <jani.nikula@intel.com> wrote:
> On Mon, 09 Apr 2018, "Kumar, Abhay" <abhay.kumar@intel.com> wrote:
>> Dynamic cdclk is disabled in BIOS/GOP hence gop makes it to highest 
>> clock i.e 316.8. Will attach logs with drm debug enabled in bug.
>> I am also inclined towards 192 which will make max cdclk..
>
> Please also attach /sys/kernel/debug/dri/0/i915_vbt to the bug.
>
> It doesn't look like we look at the VBT dynamic cdclk field. Does
> dynamic debug disabled mean we should go for max?

Ville, I tried to look at how to disable dynamic cdclk for some
platforms based on the VBT, but it gets a bit hairy. The code seems
pretty wired for going to lowest possible. I've got the trivial VBT
parsing part, but plugging that into the cdclk code in a clean way that
could *also* be backported to stable is driving me nuts. Any ideas? I'd
like to fix the issue first, and (then have you ;) embark on the
refactoring afterwards.

It's trivial to plug the check into intel_crtc_compute_min_cdclk() and
return dev_priv->max_cdclk_freq, but a) I think that place should be
reserved for crtc_state related limitations, and seems the completely
wrong place to do system level things, b) it's not optimal to go through
all the cdclk code to do nothing in the end, and c) it doesn't work for
the no crtc's active case at init time.

Just setting the .set_cdclk and .modeset_calc_cdclk hooks to NULL was
another idea, but the hooks get initialized before VBT parsing. And I
don't think that works for init either.

BR,
Jani.


-- 
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH v2] drm/i915: set minimum CD clock to twice the BCLK.

[Kumar, Abhay]

On 4/10/2018 1:49 AM, Nikula, Jani wrote:
> On Tue, 10 Apr 2018, Jani Nikula <jani.nikula@intel.com> wrote:
>> On Mon, 09 Apr 2018, "Kumar, Abhay" <abhay.kumar@intel.com> wrote:
>>> Dynamic cdclk is disabled in BIOS/GOP hence gop makes it to highest
>>> clock i.e 316.8. Will attach logs with drm debug enabled in bug.
>>> I am also inclined towards 192 which will make max cdclk..
>> Please also attach /sys/kernel/debug/dri/0/i915_vbt to the bug.
>>
>> It doesn't look like we look at the VBT dynamic cdclk field. Does
>> dynamic debug disabled mean we should go for max?
currently in kernel we don't honor this field. GOP does and by disabling 
it cdclk will run at max speed.
attached vbt dump in bug.

with patchset 1 i found one issue where while resuming HDA takes 4 
second and also that time cdclk is 79.2
below logs shows which function takes more time.

    78.485868] Suspending console(s) (use no_console_suspend to debug)
[   78.521654] HDMI HDA Codec ehdaudio0D2: Enter: hdmi_codec_prepare
[   78.620851] HDMI HDA Codec ehdaudio0D2: Enter1: hdac_hdmi_runtime_resume
[   78.620856] HDMI HDA Codec ehdaudio0D2: Enter2: hdac_hdmi_runtime_resume
[   78.620863] HDMI HDA Codec ehdaudio0D2: Enter3: hdac_hdmi_runtime_resume
[   78.620878] HDMI HDA Codec ehdaudio0D2: Enter4: hdac_hdmi_runtime_resume
[   78.620886] cdclk_1 79200
[   78.624431] cdclk_1 79200
[   78.626222] HDMI HDA Codec ehdaudio0D2: Enter5: hdac_hdmi_runtime_resume
[   78.626226] HDMI HDA Codec ehdaudio0D2: Enter6: hdac_hdmi_runtime_resume
[   79.629307] HDMI HDA Codec ehdaudio0D2: Enter7: hdac_hdmi_runtime_resume
[   80.632308] HDMI HDA Codec ehdaudio0D2: Enter8: hdac_hdmi_runtime_resume
[   81.635303] HDMI HDA Codec ehdaudio0D2: Exit: hdac_hdmi_runtime_resume
[   82.638302] HDMI HDA Codec ehdaudio0D2: Exit: hdmi_codec_prepare
[   82.638348] calling  input11+ @ 2310, parent: card0
[   82.638353] call input11+ returned 0 after 1 usecs

but when i hardcode cdcdlk glk_calc_cdclk minimum 158.4 then there is no 
4sec delay in these function.


> Ville, I tried to look at how to disable dynamic cdclk for some
> platforms based on the VBT, but it gets a bit hairy. The code seems
> pretty wired for going to lowest possible. I've got the trivial VBT
> parsing part, but plugging that into the cdclk code in a clean way that
> could *also* be backported to stable is driving me nuts. Any ideas? I'd
> like to fix the issue first, and (then have you ;) embark on the
> refactoring afterwards.
>
> It's trivial to plug the check into intel_crtc_compute_min_cdclk() and
> return dev_priv->max_cdclk_freq, but a) I think that place should be
> reserved for crtc_state related limitations, and seems the completely
> wrong place to do system level things, b) it's not optimal to go through
> all the cdclk code to do nothing in the end, and c) it doesn't work for
> the no crtc's active case at init time.
>
> Just setting the .set_cdclk and .modeset_calc_cdclk hooks to NULL was
> another idea, but the hooks get initialized before VBT parsing. And I
> don't think that works for init either.
>
> BR,
> Jani.
>
>

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[PATCH v3] drm/i915: set minimum CD clock to twice the BCLK.

[Abhay Kumar]

In glk when device boots with only 1366x768 panel, HDA codec doesn't comeup.
This result in no audio forever as cdclk is < 96Mhz.
This change will ensure CD clock to be twice of  BCLK.

v2:
    - Address comment (Jani)
    - New design approach
v3: - Typo fix on top of v1

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102937
Signed-off-by: Abhay Kumar <abhay.kumar@intel.com>
---
 drivers/gpu/drm/i915/intel_cdclk.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_cdclk.c b/drivers/gpu/drm/i915/intel_cdclk.c
index dc7db8a2caf8..6e93af4a46ea 100644
--- a/drivers/gpu/drm/i915/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/intel_cdclk.c
@@ -2143,7 +2143,7 @@ int intel_crtc_compute_min_cdclk(const struct intel_crtc_state *crtc_state)
 	/* According to BSpec, "The CD clock frequency must be at least twice
 	 * the frequency of the Azalia BCLK." and BCLK is 96 MHz by default.
 	 */
-	if (crtc_state->has_audio && INTEL_GEN(dev_priv) >= 9)
+	if (INTEL_GEN(dev_priv) >= 9)
 		min_cdclk = max(2 * 96000, min_cdclk);
 
 	/*
-- 
2.7.4

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH v3] drm/i915: set minimum CD clock to twice the BCLK.

[Kumar, Abhay]

On 4/17/2018 12:06 PM, Abhay Kumar wrote:
> In glk when device boots with only 1366x768 panel, HDA codec doesn't comeup.
> This result in no audio forever as cdclk is < 96Mhz.
> This change will ensure CD clock to be twice of  BCLK.
>
> v2:
>      - Address comment (Jani)
>      - New design approach
> v3: - Typo fix on top of v1
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102937
> Signed-off-by: Abhay Kumar <abhay.kumar@intel.com>
> ---
>   drivers/gpu/drm/i915/intel_cdclk.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_cdclk.c b/drivers/gpu/drm/i915/intel_cdclk.c
> index dc7db8a2caf8..6e93af4a46ea 100644
> --- a/drivers/gpu/drm/i915/intel_cdclk.c
> +++ b/drivers/gpu/drm/i915/intel_cdclk.c
> @@ -2143,7 +2143,7 @@ int intel_crtc_compute_min_cdclk(const struct intel_crtc_state *crtc_state)
>   	/* According to BSpec, "The CD clock frequency must be at least twice
>   	 * the frequency of the Azalia BCLK." and BCLK is 96 MHz by default.
>   	 */
> -	if (crtc_state->has_audio && INTEL_GEN(dev_priv) >= 9)
> +	if (INTEL_GEN(dev_priv) >= 9)
>   		min_cdclk = max(2 * 96000, min_cdclk);
>   
>   	/*
Hi Ville, Jani,

    Since right version of this patch is taking time(doing modeset and 
cdclk bump) as we need to poke sound driver. Can we please get this 
v3(same as v1 with typo fix in comment) version of patch merged.
This works all the time and will unblock Audio and lot of folks. without 
this patch audio card is not getting detected at all and blocking basic 
audio feature.

Regards,
Abhay
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✗ Fi.CI.CHECKPATCH: warning for drm/i915: set minimum CD clock to twice the BCLK. (rev4)

[Patchwork]

== Series Details ==

Series: drm/i915: set minimum CD clock to twice the BCLK. (rev4)
URL   : https://patchwork.freedesktop.org/series/32657/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
e052a1b9f10b drm/i915: set minimum CD clock to twice the BCLK.
-:6: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line)
#6: 
In glk when device boots with only 1366x768 panel, HDA codec doesn't comeup.

total: 0 errors, 1 warnings, 0 checks, 8 lines checked

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✗ Fi.CI.SPARSE: warning for drm/i915: set minimum CD clock to twice the BCLK. (rev4)

[Patchwork]

== Series Details ==

Series: drm/i915: set minimum CD clock to twice the BCLK. (rev4)
URL   : https://patchwork.freedesktop.org/series/32657/
State : warning

== Summary ==

$ dim sparse origin/drm-tip
Commit: drm/i915: set minimum CD clock to twice the BCLK.
-O:drivers/gpu/drm/i915/intel_cdclk.c:2147:29: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/intel_cdclk.c:2147:29: warning: expression using sizeof(void)

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH v3] drm/i915: set minimum CD clock to twice the BCLK.

[Du,Wenkai]

On 4/17/2018 12:17 PM, Kumar, Abhay wrote:
> 
> 
> On 4/17/2018 12:06 PM, Abhay Kumar wrote:
>> In glk when device boots with only 1366x768 panel, HDA codec doesn't 
>> comeup.
>> This result in no audio forever as cdclk is < 96Mhz.
>> This change will ensure CD clock to be twice of  BCLK.
>>
>> v2:
>>      - Address comment (Jani)
>>      - New design approach
>> v3: - Typo fix on top of v1
>>
>> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102937
>> Signed-off-by: Abhay Kumar <abhay.kumar@intel.com>
Reviewed-by: Wenkai Du <wenkai.du@intel.com>
Tested-by: Wenkai Du <wenkai.du@intel.com>

Regards,
Wenkai
>> ---
>>   drivers/gpu/drm/i915/intel_cdclk.c | 2 +-
>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_cdclk.c 
>> b/drivers/gpu/drm/i915/intel_cdclk.c
>> index dc7db8a2caf8..6e93af4a46ea 100644
>> --- a/drivers/gpu/drm/i915/intel_cdclk.c
>> +++ b/drivers/gpu/drm/i915/intel_cdclk.c
>> @@ -2143,7 +2143,7 @@ int intel_crtc_compute_min_cdclk(const struct 
>> intel_crtc_state *crtc_state)
>>       /* According to BSpec, "The CD clock frequency must be at least 
>> twice
>>        * the frequency of the Azalia BCLK." and BCLK is 96 MHz by 
>> default.
>>        */
>> -    if (crtc_state->has_audio && INTEL_GEN(dev_priv) >= 9)
>> +    if (INTEL_GEN(dev_priv) >= 9)
>>           min_cdclk = max(2 * 96000, min_cdclk);
>>       /*
> Hi Ville, Jani,
> 
>     Since right version of this patch is taking time(doing modeset and 
> cdclk bump) as we need to poke sound driver. Can we please get this 
> v3(same as v1 with typo fix in comment) version of patch merged.
> This works all the time and will unblock Audio and lot of folks. without 
> this patch audio card is not getting detected at all and blocking basic 
> audio feature.
> 
> Regards,
> Abhay
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✓ Fi.CI.BAT: success for drm/i915: set minimum CD clock to twice the BCLK. (rev4)

[Patchwork]

== Series Details ==

Series: drm/i915: set minimum CD clock to twice the BCLK. (rev4)
URL   : https://patchwork.freedesktop.org/series/32657/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_4059 -> Patchwork_8712 =

== Summary - WARNING ==

  Minor unknown changes coming with Patchwork_8712 need to be verified
  manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_8712, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/32657/revisions/4/mbox/

== Possible new issues ==

  Here are the unknown changes that may have been introduced in Patchwork_8712:

  === IGT changes ===

    ==== Warnings ====

    igt@core_auth@basic-auth:
      fi-kbl-r:           PASS -> NOTRUN +257

    igt@drv_getparams_basic@basic-subslice-total:
      fi-snb-2600:        PASS -> NOTRUN +244

    igt@drv_hangman@error-state-basic:
      fi-elk-e7500:       PASS -> NOTRUN +181

    igt@gem_busy@basic-busy-default:
      fi-glk-j4005:       PASS -> NOTRUN +255

    igt@gem_close_race@basic-process:
      fi-ivb-3770:        PASS -> NOTRUN +251

    igt@gem_ctx_param@basic:
      fi-gdg-551:         SKIP -> NOTRUN +107

    igt@gem_exec_basic@basic-bsd1:
      fi-cfl-u:           SKIP -> NOTRUN +25

    igt@gem_exec_basic@basic-vebox:
      fi-ivb-3770:        SKIP -> NOTRUN +32

    igt@gem_exec_basic@gtt-bsd:
      fi-bwr-2160:        SKIP -> NOTRUN +104

    igt@gem_exec_basic@gtt-bsd2:
      fi-kbl-7500u:       SKIP -> NOTRUN +23
      fi-cnl-y3:          SKIP -> NOTRUN +25

    igt@gem_exec_basic@readonly-bsd:
      fi-pnv-d510:        SKIP -> NOTRUN +63

    igt@gem_exec_basic@readonly-bsd1:
      fi-snb-2520m:       SKIP -> NOTRUN +39

    igt@gem_exec_flush@basic-batch-kernel-default-cmd:
      fi-bxt-dsi:         SKIP -> NOTRUN +29

    igt@gem_exec_flush@basic-batch-kernel-default-wb:
      fi-kbl-7567u:       PASS -> NOTRUN +264

    igt@gem_exec_flush@basic-uc-rw-default:
      fi-byt-j1900:       PASS -> NOTRUN +249

    igt@gem_exec_gttfill@basic:
      fi-skl-gvtdvm:      SKIP -> NOTRUN +22

    igt@gem_exec_reloc@basic-cpu-active:
      fi-bsw-n3050:       PASS -> NOTRUN +238

    igt@gem_exec_reloc@basic-write-cpu-noreloc:
      fi-skl-6770hq:      PASS -> NOTRUN +264

    igt@gem_exec_reloc@basic-write-gtt-noreloc:
      fi-ivb-3520m:       PASS -> NOTRUN +253

    igt@gem_exec_store@basic-bsd1:
      fi-kbl-r:           SKIP -> NOTRUN +26

    igt@gem_exec_store@basic-bsd2:
      fi-hsw-4770:        SKIP -> NOTRUN +26

    igt@gem_flink_basic@basic:
      fi-gdg-551:         PASS -> NOTRUN +175

    igt@gem_mmap@basic-small-bo:
      fi-skl-gvtdvm:      PASS -> NOTRUN +261

    igt@gem_mmap_gtt@basic-read:
      fi-cnl-y3:          PASS -> NOTRUN +258

    igt@gem_mmap_gtt@basic-read-write-distinct:
      fi-hsw-4770:        PASS -> NOTRUN +257

    igt@gem_mmap_gtt@basic-small-bo:
      fi-kbl-7500u:       PASS -> NOTRUN +259

    igt@gem_mmap_gtt@basic-wc:
      fi-pnv-d510:        PASS -> NOTRUN +219

    igt@gem_mmap_gtt@basic-write:
      fi-cfl-8700k:       PASS -> NOTRUN +256

    igt@gem_mmap_gtt@basic-write-gtt:
      fi-blb-e6850:       PASS -> NOTRUN +219

    igt@gem_ringfill@basic-default-fd:
      fi-elk-e7500:       SKIP -> NOTRUN +46

    igt@gem_sync@basic-store-all:
      fi-byt-n2820:       PASS -> NOTRUN +245

    igt@gem_wait@basic-await-all:
      fi-glk-1:           PASS -> NOTRUN +256

    igt@gem_workarounds@basic-read:
      fi-snb-2600:        SKIP -> NOTRUN +39

    igt@gvt_basic@invalid-placeholder-test:
      fi-skl-6260u:       SKIP -> NOTRUN +19

    igt@kms_addfb_basic@addfb25-bad-modifier:
      fi-bdw-gvtdvm:      PASS -> NOTRUN +260

    igt@kms_addfb_basic@too-high:
      fi-bwr-2160:        PASS -> NOTRUN +179

    igt@kms_addfb_basic@unused-modifier:
      fi-bdw-5557u:       PASS -> NOTRUN +263

    igt@kms_chamelium@common-hpd-after-suspend:
      fi-ivb-3520m:       SKIP -> NOTRUN +28

    igt@kms_chamelium@dp-crc-fast:
      fi-skl-guc:         SKIP -> NOTRUN +27

    igt@kms_chamelium@dp-edid-read:
      fi-skl-6770hq:      SKIP -> NOTRUN +19
      fi-byt-n2820:       SKIP -> NOTRUN +38

    igt@kms_chamelium@dp-hpd-fast:
      fi-ilk-650:         SKIP -> NOTRUN +59

    igt@kms_chamelium@hdmi-crc-fast:
      fi-cfl-s3:          SKIP -> NOTRUN +25
      fi-bsw-n3050:       SKIP -> NOTRUN +45
      fi-byt-j1900:       SKIP -> NOTRUN +34

    igt@kms_chamelium@hdmi-edid-read:
      fi-glk-1:           SKIP -> NOTRUN +27
      fi-blb-e6850:       SKIP -> NOTRUN +63

    igt@kms_chamelium@vga-edid-read:
      fi-cfl-8700k:       SKIP -> NOTRUN +27
      fi-skl-6600u:       SKIP -> NOTRUN +26

    igt@kms_flip@basic-flip-vs-dpms:
      fi-ilk-650:         PASS -> NOTRUN +224

    igt@kms_flip@basic-plain-flip:
      fi-bxt-j4205:       PASS -> NOTRUN +255

    igt@kms_force_connector_basic@force-connector-state:
      fi-kbl-7567u:       SKIP -> NOTRUN +19

    igt@kms_force_connector_basic@prune-stale-modes:
      fi-glk-j4005:       SKIP -> NOTRUN +28
      fi-skl-6700k2:      SKIP -> NOTRUN +23

    igt@kms_pipe_crc_basic@read-crc-pipe-a-frame-sequence:
      fi-skl-6600u:       PASS -> NOTRUN +257

    igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
      fi-snb-2520m:       PASS -> NOTRUN +244

    igt@kms_sink_crc_basic:
      fi-bdw-gvtdvm:      SKIP -> NOTRUN +23

    igt@pm_backlight@basic-brightness:
      fi-bxt-j4205:       SKIP -> NOTRUN +28
      fi-bdw-5557u:       SKIP -> NOTRUN +20

    igt@pm_rpm@basic-rte:
      fi-skl-6260u:       PASS -> NOTRUN +264

    igt@prime_self_import@basic-llseek-bad:
      fi-skl-guc:         PASS -> NOTRUN +256

    igt@prime_self_import@basic-with_two_bos:
      fi-bxt-dsi:         PASS -> NOTRUN +254

    igt@prime_vgem@basic-busy-default:
      fi-cfl-u:           PASS -> NOTRUN +258

    igt@vgem_basic@create:
      fi-cfl-s3:          PASS -> NOTRUN +258

    igt@vgem_basic@mmap:
      fi-skl-6700k2:      PASS -> NOTRUN +260

    
== Known issues ==

  Here are the changes found in Patchwork_8712 that come from known issues:

  === IGT changes ===

    ==== Possible fixes ====

    igt@gem_exec_suspend@basic-s3:
      fi-ivb-3520m:       DMESG-WARN (fdo#106084) -> NOTRUN +1

    igt@gem_mmap_gtt@basic-small-bo-tiledx:
      fi-gdg-551:         FAIL (fdo#102575) -> NOTRUN

    igt@gem_ringfill@basic-default-hang:
      fi-pnv-d510:        DMESG-WARN (fdo#101600) -> NOTRUN
      fi-blb-e6850:       DMESG-WARN (fdo#101600) -> NOTRUN

    igt@kms_chamelium@common-hpd-after-suspend:
      fi-kbl-7500u:       DMESG-WARN (fdo#102505) -> NOTRUN

    igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence:
      fi-elk-e7500:       INCOMPLETE (fdo#103989) -> NOTRUN

    
  fdo#101600 https://bugs.freedesktop.org/show_bug.cgi?id=101600
  fdo#102505 https://bugs.freedesktop.org/show_bug.cgi?id=102505
  fdo#102575 https://bugs.freedesktop.org/show_bug.cgi?id=102575
  fdo#103989 https://bugs.freedesktop.org/show_bug.cgi?id=103989
  fdo#106084 https://bugs.freedesktop.org/show_bug.cgi?id=106084


== Participating hosts (36 -> 33) ==

  Missing    (3): fi-ctg-p8600 fi-ilk-m540 fi-skl-6700hq 


== Build changes ==

    * Linux: CI_DRM_4059 -> Patchwork_8712

  CI_DRM_4059: c1645edc253f2b52a8c94565a75b479a6782e75f @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4435: ddbe5a4d8bb1780ecf07f72e815062d3bce8ff71 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_8712: e052a1b9f10b2588ed22ca49e6ee4a7ac0105896 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4435: e60d247eb359f044caf0c09904da14e39d7adca1 @ git://anongit.freedesktop.org/piglit


== Linux commits ==

e052a1b9f10b drm/i915: set minimum CD clock to twice the BCLK.

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8712/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✓ Fi.CI.IGT: success for drm/i915: set minimum CD clock to twice the BCLK. (rev4)

[Patchwork]

== Series Details ==

Series: drm/i915: set minimum CD clock to twice the BCLK. (rev4)
URL   : https://patchwork.freedesktop.org/series/32657/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_4059_full -> Patchwork_8712_full =

== Summary - WARNING ==

  Minor unknown changes coming with Patchwork_8712_full need to be verified
  manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_8712_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/32657/revisions/4/mbox/

== Possible new issues ==

  Here are the unknown changes that may have been introduced in Patchwork_8712_full:

  === IGT changes ===

    ==== Warnings ====

    igt@gem_busy@extended-parallel-bsd1:
      shard-hsw:          SKIP -> NOTRUN +890

    igt@gem_exec_params@dr1-dirt:
      shard-kbl:          PASS -> NOTRUN +1940

    igt@gem_pread@stolen-uncached:
      shard-kbl:          SKIP -> NOTRUN +700

    igt@gem_pwrite@display:
      shard-snb:          PASS -> NOTRUN +1377

    igt@kms_chv_cursor_fail@pipe-b-256x256-top-edge:
      shard-hsw:          PASS -> NOTRUN +1783

    igt@kms_rotation_crc@sprite-rotation-90-pos-100-0:
      shard-apl:          PASS -> NOTRUN +1834

    igt@perf_pmu@busy-start-vcs1:
      shard-snb:          SKIP -> NOTRUN +1298

    igt@prime_vgem@sync-bsd1:
      shard-apl:          SKIP -> NOTRUN +835

    
== Known issues ==

  Here are the changes found in Patchwork_8712_full that come from known issues:

  === IGT changes ===

    ==== Possible fixes ====

    igt@drv_selftest@mock_breadcrumbs:
      shard-hsw:          DMESG-FAIL (fdo#106085) -> NOTRUN
      shard-snb:          DMESG-FAIL (fdo#106085) -> NOTRUN
      shard-apl:          DMESG-FAIL (fdo#106085) -> NOTRUN
      shard-kbl:          DMESG-FAIL (fdo#106085) -> NOTRUN

    igt@drv_selftest@mock_scatterlist:
      shard-hsw:          DMESG-WARN (fdo#103667) -> NOTRUN
      shard-kbl:          DMESG-WARN (fdo#103667) -> NOTRUN
      shard-snb:          DMESG-WARN (fdo#103667) -> NOTRUN
      shard-apl:          DMESG-WARN (fdo#103667) -> NOTRUN

    igt@gem_ctx_isolation@vcs0-s3:
      shard-kbl:          INCOMPLETE (fdo#103665) -> NOTRUN

    igt@gem_exec_schedule@pi-ringfull-blt:
      shard-apl:          FAIL (fdo#103158) -> NOTRUN +3

    igt@gem_exec_schedule@pi-ringfull-bsd1:
      shard-kbl:          FAIL (fdo#103158) -> NOTRUN +4

    igt@kms_flip@2x-flip-vs-expired-vblank:
      shard-hsw:          FAIL (fdo#102887) -> NOTRUN

    igt@kms_flip@flip-vs-expired-vblank-interruptible:
      shard-apl:          FAIL (fdo#102887, fdo#105363) -> NOTRUN

    igt@kms_flip@modeset-vs-vblank-race:
      shard-hsw:          FAIL (fdo#103060) -> NOTRUN

    igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw:
      shard-snb:          FAIL (fdo#103167) -> NOTRUN

    igt@kms_setmode@basic:
      shard-apl:          FAIL (fdo#99912) -> NOTRUN
      shard-hsw:          FAIL (fdo#99912) -> NOTRUN
      shard-snb:          FAIL (fdo#99912) -> NOTRUN

    igt@kms_sysfs_edid_timing:
      shard-hsw:          WARN (fdo#100047) -> NOTRUN
      shard-kbl:          FAIL (fdo#100047) -> NOTRUN

    igt@prime_vgem@coherency-gtt:
      shard-apl:          FAIL (fdo#100587) -> NOTRUN +1

    
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  fdo#100047 https://bugs.freedesktop.org/show_bug.cgi?id=100047
  fdo#100587 https://bugs.freedesktop.org/show_bug.cgi?id=100587
  fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887
  fdo#103060 https://bugs.freedesktop.org/show_bug.cgi?id=103060
  fdo#103158 https://bugs.freedesktop.org/show_bug.cgi?id=103158
  fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
  fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665
  fdo#103667 https://bugs.freedesktop.org/show_bug.cgi?id=103667
  fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363
  fdo#106085 https://bugs.freedesktop.org/show_bug.cgi?id=106085
  fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912


== Participating hosts (6 -> 4) ==

  Missing    (2): shard-glk shard-glkb 


== Build changes ==

    * Linux: CI_DRM_4059 -> Patchwork_8712

  CI_DRM_4059: c1645edc253f2b52a8c94565a75b479a6782e75f @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4435: ddbe5a4d8bb1780ecf07f72e815062d3bce8ff71 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_8712: e052a1b9f10b2588ed22ca49e6ee4a7ac0105896 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4435: e60d247eb359f044caf0c09904da14e39d7adca1 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8712/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✗ Fi.CI.CHECKPATCH: warning for drm/i915: set minimum CD clock to twice the BCLK. (rev4)

[Patchwork]

== Series Details ==

Series: drm/i915: set minimum CD clock to twice the BCLK. (rev4)
URL   : https://patchwork.freedesktop.org/series/32657/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
969c984b9819 drm/i915: set minimum CD clock to twice the BCLK.
-:6: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line)
#6: 
In glk when device boots with only 1366x768 panel, HDA codec doesn't comeup.

total: 0 errors, 1 warnings, 0 checks, 8 lines checked

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✗ Fi.CI.SPARSE: warning for drm/i915: set minimum CD clock to twice the BCLK. (rev4)

[Patchwork]

== Series Details ==

Series: drm/i915: set minimum CD clock to twice the BCLK. (rev4)
URL   : https://patchwork.freedesktop.org/series/32657/
State : warning

== Summary ==

$ dim sparse origin/drm-tip
Commit: drm/i915: set minimum CD clock to twice the BCLK.
-O:drivers/gpu/drm/i915/intel_cdclk.c:2147:29: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/intel_cdclk.c:2147:29: warning: expression using sizeof(void)

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✓ Fi.CI.BAT: success for drm/i915: set minimum CD clock to twice the BCLK. (rev4)

[Patchwork]

== Series Details ==

Series: drm/i915: set minimum CD clock to twice the BCLK. (rev4)
URL   : https://patchwork.freedesktop.org/series/32657/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_4063 -> Patchwork_8723 =

== Summary - WARNING ==

  Minor unknown changes coming with Patchwork_8723 need to be verified
  manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_8723, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/32657/revisions/4/mbox/

== Possible new issues ==

  Here are the unknown changes that may have been introduced in Patchwork_8723:

  === IGT changes ===

    ==== Warnings ====

    igt@gem_exec_gttfill@basic:
      fi-pnv-d510:        PASS -> SKIP

    
== Known issues ==

  Here are the changes found in Patchwork_8723 that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
      fi-ivb-3520m:       PASS -> DMESG-WARN (fdo#106084)

    igt@prime_vgem@basic-fence-flip:
      fi-ilk-650:         PASS -> FAIL (fdo#104008)

    
    ==== Possible fixes ====

    igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
      fi-ivb-3520m:       DMESG-WARN (fdo#106084) -> PASS

    
  fdo#104008 https://bugs.freedesktop.org/show_bug.cgi?id=104008
  fdo#106084 https://bugs.freedesktop.org/show_bug.cgi?id=106084


== Participating hosts (34 -> 33) ==

  Additional (1): fi-glk-1 
  Missing    (2): fi-ilk-m540 fi-skl-6700hq 


== Build changes ==

    * Linux: CI_DRM_4063 -> Patchwork_8723

  CI_DRM_4063: 9bdf0998d567cbe94f712c8f3e8295fb0446e114 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4441: 83ba5b7d3bde48b383df41792fc9c955a5a23bdb @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_8723: 969c984b9819d3c597b28d779bda37769e29f4bf @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4441: e60d247eb359f044caf0c09904da14e39d7adca1 @ git://anongit.freedesktop.org/piglit


== Linux commits ==

969c984b9819 drm/i915: set minimum CD clock to twice the BCLK.

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8723/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH v3] drm/i915: set minimum CD clock to twice the BCLK.

[Jani Nikula]

On Tue, 17 Apr 2018, "Kumar, Abhay" <abhay.kumar@intel.com> wrote:
> On 4/17/2018 12:06 PM, Abhay Kumar wrote:
>> In glk when device boots with only 1366x768 panel, HDA codec doesn't comeup.
>> This result in no audio forever as cdclk is < 96Mhz.
>> This change will ensure CD clock to be twice of  BCLK.
>>
>> v2:
>>      - Address comment (Jani)
>>      - New design approach
>> v3: - Typo fix on top of v1
>>
>> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102937
>> Signed-off-by: Abhay Kumar <abhay.kumar@intel.com>
>> ---
>>   drivers/gpu/drm/i915/intel_cdclk.c | 2 +-
>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_cdclk.c b/drivers/gpu/drm/i915/intel_cdclk.c
>> index dc7db8a2caf8..6e93af4a46ea 100644
>> --- a/drivers/gpu/drm/i915/intel_cdclk.c
>> +++ b/drivers/gpu/drm/i915/intel_cdclk.c
>> @@ -2143,7 +2143,7 @@ int intel_crtc_compute_min_cdclk(const struct intel_crtc_state *crtc_state)
>>   	/* According to BSpec, "The CD clock frequency must be at least twice
>>   	 * the frequency of the Azalia BCLK." and BCLK is 96 MHz by default.
>>   	 */
>> -	if (crtc_state->has_audio && INTEL_GEN(dev_priv) >= 9)
>> +	if (INTEL_GEN(dev_priv) >= 9)
>>   		min_cdclk = max(2 * 96000, min_cdclk);
>>   
>>   	/*
> Hi Ville, Jani,
>
>     Since right version of this patch is taking time(doing modeset and 
> cdclk bump) as we need to poke sound driver. Can we please get this 
> v3(same as v1 with typo fix in comment) version of patch merged.
> This works all the time and will unblock Audio and lot of folks. without 
> this patch audio card is not getting detected at all and blocking basic 
> audio feature.

I expanded on the code comment, rewrote the commit message, added cc:
stable, and resent the patch [1].

It's not a patch I much like, it's not even a complete fix, and I would
like this to be addressed properly going forward. However, the proper
fix is I think too invasive for stable, so here we are. I'm trying to at
least explain in the comment and commit message what's going on, for
posterity.

Ville, I'm not going to push the patch without your ack, but we can't
sit on this forever either. The patch papers over the most common
failure case, for now, so perhaps it'll buy us time to find a proper
solution.

Abhay, if we merge this, I do expect your support in figuring out and
testing the proper fix. This is not it.


BR,
Jani.


[1] http://patchwork.freedesktop.org/patch/msgid/20180418103707.14645-1-jani.nikula@intel.com


>
> Regards,
> Abhay
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✗ Fi.CI.CHECKPATCH: warning for drm/i915: set minimum CD clock to twice the BCLK. (rev4)

[Patchwork]

== Series Details ==

Series: drm/i915: set minimum CD clock to twice the BCLK. (rev4)
URL   : https://patchwork.freedesktop.org/series/32657/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
25a822b03178 drm/i915: set minimum CD clock to twice the BCLK.
-:6: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line)
#6: 
In glk when device boots with only 1366x768 panel, HDA codec doesn't comeup.

total: 0 errors, 1 warnings, 0 checks, 8 lines checked

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✗ Fi.CI.SPARSE: warning for drm/i915: set minimum CD clock to twice the BCLK. (rev4)

[Patchwork]

== Series Details ==

Series: drm/i915: set minimum CD clock to twice the BCLK. (rev4)
URL   : https://patchwork.freedesktop.org/series/32657/
State : warning

== Summary ==

$ dim sparse origin/drm-tip
Commit: drm/i915: set minimum CD clock to twice the BCLK.
-O:drivers/gpu/drm/i915/intel_cdclk.c:2147:29: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/intel_cdclk.c:2147:29: warning: expression using sizeof(void)

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✓ Fi.CI.BAT: success for drm/i915: set minimum CD clock to twice the BCLK. (rev4)

[Patchwork]

== Series Details ==

Series: drm/i915: set minimum CD clock to twice the BCLK. (rev4)
URL   : https://patchwork.freedesktop.org/series/32657/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_4063 -> Patchwork_8725 =

== Summary - SUCCESS ==

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/32657/revisions/4/mbox/

== Known issues ==

  Here are the changes found in Patchwork_8725 that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
      fi-cnl-y3:          PASS -> DMESG-WARN (fdo#104951)

    
    ==== Possible fixes ====

    igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
      fi-ivb-3520m:       DMESG-WARN (fdo#106084) -> PASS +1

    
  fdo#104951 https://bugs.freedesktop.org/show_bug.cgi?id=104951
  fdo#106084 https://bugs.freedesktop.org/show_bug.cgi?id=106084


== Participating hosts (34 -> 33) ==

  Additional (1): fi-bxt-dsi 
  Missing    (2): fi-ilk-m540 fi-skl-6700hq 


== Build changes ==

    * Linux: CI_DRM_4063 -> Patchwork_8725

  CI_DRM_4063: 9bdf0998d567cbe94f712c8f3e8295fb0446e114 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4441: 83ba5b7d3bde48b383df41792fc9c955a5a23bdb @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_8725: 25a822b03178a53667075c218343c9ebdf958d7f @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4441: e60d247eb359f044caf0c09904da14e39d7adca1 @ git://anongit.freedesktop.org/piglit


== Linux commits ==

25a822b03178 drm/i915: set minimum CD clock to twice the BCLK.

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8725/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✓ Fi.CI.IGT: success for drm/i915: set minimum CD clock to twice the BCLK. (rev4)

[Patchwork]

== Series Details ==

Series: drm/i915: set minimum CD clock to twice the BCLK. (rev4)
URL   : https://patchwork.freedesktop.org/series/32657/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_4063_full -> Patchwork_8723_full =

== Summary - WARNING ==

  Minor unknown changes coming with Patchwork_8723_full need to be verified
  manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_8723_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/32657/revisions/4/mbox/

== Possible new issues ==

  Here are the unknown changes that may have been introduced in Patchwork_8723_full:

  === IGT changes ===

    ==== Warnings ====

    igt@gem_mocs_settings@mocs-rc6-dirty-render:
      shard-kbl:          PASS -> SKIP

    igt@gem_mocs_settings@mocs-rc6-vebox:
      shard-kbl:          SKIP -> PASS +2

    igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-pwrite:
      shard-hsw:          SKIP -> PASS

    
== Known issues ==

  Here are the changes found in Patchwork_8723_full that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@drv_suspend@forcewake:
      shard-kbl:          PASS -> INCOMPLETE (fdo#103665)

    igt@kms_cursor_legacy@cursor-vs-flip-toggle:
      shard-hsw:          PASS -> FAIL (fdo#103355)

    igt@kms_flip@2x-plain-flip-fb-recreate:
      shard-hsw:          PASS -> FAIL (fdo#100368)

    igt@kms_flip@flip-vs-expired-vblank-interruptible:
      shard-hsw:          PASS -> FAIL (fdo#105707)

    igt@kms_setmode@basic:
      shard-kbl:          PASS -> FAIL (fdo#99912)

    igt@pm_rps@waitboost:
      shard-kbl:          PASS -> FAIL (fdo#102250)

    
    ==== Possible fixes ====

    igt@gem_ppgtt@blt-vs-render-ctx0:
      shard-kbl:          INCOMPLETE (fdo#106023, fdo#103665) -> PASS

    igt@kms_flip@dpms-vs-vblank-race-interruptible:
      shard-hsw:          FAIL (fdo#103060) -> PASS

    igt@kms_flip@plain-flip-fb-recreate-interruptible:
      shard-hsw:          FAIL (fdo#100368) -> PASS

    igt@kms_rotation_crc@sprite-rotation-90-pos-100-0:
      shard-apl:          FAIL (fdo#103925) -> PASS

    
  fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
  fdo#102250 https://bugs.freedesktop.org/show_bug.cgi?id=102250
  fdo#103060 https://bugs.freedesktop.org/show_bug.cgi?id=103060
  fdo#103355 https://bugs.freedesktop.org/show_bug.cgi?id=103355
  fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665
  fdo#103925 https://bugs.freedesktop.org/show_bug.cgi?id=103925
  fdo#105707 https://bugs.freedesktop.org/show_bug.cgi?id=105707
  fdo#106023 https://bugs.freedesktop.org/show_bug.cgi?id=106023
  fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912


== Participating hosts (6 -> 4) ==

  Missing    (2): shard-glk shard-glkb 


== Build changes ==

    * Linux: CI_DRM_4063 -> Patchwork_8723

  CI_DRM_4063: 9bdf0998d567cbe94f712c8f3e8295fb0446e114 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4441: 83ba5b7d3bde48b383df41792fc9c955a5a23bdb @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_8723: 969c984b9819d3c597b28d779bda37769e29f4bf @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4441: e60d247eb359f044caf0c09904da14e39d7adca1 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8723/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✓ Fi.CI.IGT: success for drm/i915: set minimum CD clock to twice the BCLK. (rev4)

[Patchwork]

== Series Details ==

Series: drm/i915: set minimum CD clock to twice the BCLK. (rev4)
URL   : https://patchwork.freedesktop.org/series/32657/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_4063_full -> Patchwork_8725_full =

== Summary - WARNING ==

  Minor unknown changes coming with Patchwork_8725_full need to be verified
  manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_8725_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/32657/revisions/4/mbox/

== Possible new issues ==

  Here are the unknown changes that may have been introduced in Patchwork_8725_full:

  === IGT changes ===

    ==== Warnings ====

    igt@gem_mocs_settings@mocs-rc6-dirty-render:
      shard-kbl:          PASS -> SKIP +1

    igt@gem_mocs_settings@mocs-rc6-vebox:
      shard-kbl:          SKIP -> PASS +1

    igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-pwrite:
      shard-hsw:          SKIP -> PASS

    
== Known issues ==

  Here are the changes found in Patchwork_8725_full that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@drv_suspend@forcewake:
      shard-kbl:          PASS -> INCOMPLETE (fdo#103665)

    igt@kms_atomic_transition@plane-all-modeset-transition-fencing:
      shard-hsw:          PASS -> DMESG-WARN (fdo#102614)

    igt@kms_flip@modeset-vs-vblank-race:
      shard-apl:          PASS -> FAIL (fdo#103060)

    igt@kms_flip@modeset-vs-vblank-race-interruptible:
      shard-hsw:          PASS -> FAIL (fdo#103060)

    igt@kms_setmode@basic:
      shard-kbl:          PASS -> FAIL (fdo#99912)

    
    ==== Possible fixes ====

    igt@kms_flip@plain-flip-fb-recreate-interruptible:
      shard-hsw:          FAIL (fdo#100368) -> PASS

    igt@kms_rotation_crc@sprite-rotation-90-pos-100-0:
      shard-apl:          FAIL (fdo#103925) -> PASS

    
  fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
  fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614
  fdo#103060 https://bugs.freedesktop.org/show_bug.cgi?id=103060
  fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665
  fdo#103925 https://bugs.freedesktop.org/show_bug.cgi?id=103925
  fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912


== Participating hosts (6 -> 4) ==

  Missing    (2): shard-glk shard-glkb 


== Build changes ==

    * Linux: CI_DRM_4063 -> Patchwork_8725

  CI_DRM_4063: 9bdf0998d567cbe94f712c8f3e8295fb0446e114 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4441: 83ba5b7d3bde48b383df41792fc9c955a5a23bdb @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_8725: 25a822b03178a53667075c218343c9ebdf958d7f @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4441: e60d247eb359f044caf0c09904da14e39d7adca1 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8725/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH v3] drm/i915: set minimum CD clock to twice the BCLK.

[Ville Syrjälä]

On Wed, Apr 18, 2018 at 01:49:23PM +0300, Jani Nikula wrote:
> On Tue, 17 Apr 2018, "Kumar, Abhay" <abhay.kumar@intel.com> wrote:
> > On 4/17/2018 12:06 PM, Abhay Kumar wrote:
> >> In glk when device boots with only 1366x768 panel, HDA codec doesn't comeup.
> >> This result in no audio forever as cdclk is < 96Mhz.
> >> This change will ensure CD clock to be twice of  BCLK.
> >>
> >> v2:
> >>      - Address comment (Jani)
> >>      - New design approach
> >> v3: - Typo fix on top of v1
> >>
> >> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102937
> >> Signed-off-by: Abhay Kumar <abhay.kumar@intel.com>
> >> ---
> >>   drivers/gpu/drm/i915/intel_cdclk.c | 2 +-
> >>   1 file changed, 1 insertion(+), 1 deletion(-)
> >>
> >> diff --git a/drivers/gpu/drm/i915/intel_cdclk.c b/drivers/gpu/drm/i915/intel_cdclk.c
> >> index dc7db8a2caf8..6e93af4a46ea 100644
> >> --- a/drivers/gpu/drm/i915/intel_cdclk.c
> >> +++ b/drivers/gpu/drm/i915/intel_cdclk.c
> >> @@ -2143,7 +2143,7 @@ int intel_crtc_compute_min_cdclk(const struct intel_crtc_state *crtc_state)
> >>   	/* According to BSpec, "The CD clock frequency must be at least twice
> >>   	 * the frequency of the Azalia BCLK." and BCLK is 96 MHz by default.
> >>   	 */
> >> -	if (crtc_state->has_audio && INTEL_GEN(dev_priv) >= 9)
> >> +	if (INTEL_GEN(dev_priv) >= 9)
> >>   		min_cdclk = max(2 * 96000, min_cdclk);
> >>   
> >>   	/*
> > Hi Ville, Jani,
> >
> >     Since right version of this patch is taking time(doing modeset and 
> > cdclk bump) as we need to poke sound driver. Can we please get this 
> > v3(same as v1 with typo fix in comment) version of patch merged.
> > This works all the time and will unblock Audio and lot of folks. without 
> > this patch audio card is not getting detected at all and blocking basic 
> > audio feature.
> 
> I expanded on the code comment, rewrote the commit message, added cc:
> stable, and resent the patch [1].
> 
> It's not a patch I much like, it's not even a complete fix, and I would
> like this to be addressed properly going forward. However, the proper
> fix is I think too invasive for stable, so here we are. I'm trying to at
> least explain in the comment and commit message what's going on, for
> posterity.
> 
> Ville, I'm not going to push the patch without your ack, but we can't
> sit on this forever either. The patch papers over the most common
> failure case, for now, so perhaps it'll buy us time to find a proper
> solution.

While I don't particularly like this patch I also agree that it's the
least risky way to go for stable. So

Acked-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> 
> Abhay, if we merge this, I do expect your support in figuring out and
> testing the proper fix. This is not it.

I also want to see a better solution going forward.

-- 
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH v3] drm/i915: set minimum CD clock to twice the BCLK.

[Kumar, Abhay]

On 4/18/2018 8:41 AM, Ville Syrjälä wrote:
> On Wed, Apr 18, 2018 at 01:49:23PM +0300, Jani Nikula wrote:
>> On Tue, 17 Apr 2018, "Kumar, Abhay" <abhay.kumar@intel.com> wrote:
>>> On 4/17/2018 12:06 PM, Abhay Kumar wrote:
>>>> In glk when device boots with only 1366x768 panel, HDA codec doesn't comeup.
>>>> This result in no audio forever as cdclk is < 96Mhz.
>>>> This change will ensure CD clock to be twice of  BCLK.
>>>>
>>>> v2:
>>>>       - Address comment (Jani)
>>>>       - New design approach
>>>> v3: - Typo fix on top of v1
>>>>
>>>> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102937
>>>> Signed-off-by: Abhay Kumar <abhay.kumar@intel.com>
>>>> ---
>>>>    drivers/gpu/drm/i915/intel_cdclk.c | 2 +-
>>>>    1 file changed, 1 insertion(+), 1 deletion(-)
>>>>
>>>> diff --git a/drivers/gpu/drm/i915/intel_cdclk.c b/drivers/gpu/drm/i915/intel_cdclk.c
>>>> index dc7db8a2caf8..6e93af4a46ea 100644
>>>> --- a/drivers/gpu/drm/i915/intel_cdclk.c
>>>> +++ b/drivers/gpu/drm/i915/intel_cdclk.c
>>>> @@ -2143,7 +2143,7 @@ int intel_crtc_compute_min_cdclk(const struct intel_crtc_state *crtc_state)
>>>>    	/* According to BSpec, "The CD clock frequency must be at least twice
>>>>    	 * the frequency of the Azalia BCLK." and BCLK is 96 MHz by default.
>>>>    	 */
>>>> -	if (crtc_state->has_audio && INTEL_GEN(dev_priv) >= 9)
>>>> +	if (INTEL_GEN(dev_priv) >= 9)
>>>>    		min_cdclk = max(2 * 96000, min_cdclk);
>>>>    
>>>>    	/*
>>> Hi Ville, Jani,
>>>
>>>      Since right version of this patch is taking time(doing modeset and
>>> cdclk bump) as we need to poke sound driver. Can we please get this
>>> v3(same as v1 with typo fix in comment) version of patch merged.
>>> This works all the time and will unblock Audio and lot of folks. without
>>> this patch audio card is not getting detected at all and blocking basic
>>> audio feature.
>> I expanded on the code comment, rewrote the commit message, added cc:
>> stable, and resent the patch [1].
>>
>> It's not a patch I much like, it's not even a complete fix, and I would
>> like this to be addressed properly going forward. However, the proper
>> fix is I think too invasive for stable, so here we are. I'm trying to at
>> least explain in the comment and commit message what's going on, for
>> posterity.
>>
>> Ville, I'm not going to push the patch without your ack, but we can't
>> sit on this forever either. The patch papers over the most common
>> failure case, for now, so perhaps it'll buy us time to find a proper
>> solution.
> While I don't particularly like this patch I also agree that it's the
> least risky way to go for stable. So
>
> Acked-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
>> Abhay, if we merge this, I do expect your support in figuring out and
>> testing the proper fix. This is not it.
> I also want to see a better solution going forward.

Yes will work on this.
>

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx