[PATCH v2 0/1] net/ixgbe: Add read/write PMD MDIO API

[PATCH v2 0/1] net/ixgbe: Add read/write PMD MDIO API

[Shweta Choudaha]

From: Shweta Choudaha <shweta.choudaha@att.com>

Hi, 
   I am updating this patch to separate MDIO access APIs and MDIO 
locking APIs. This is done so that calling function can batch MDIO 
access at a higher level as taking MDIO lock can be expensive. 
 
Thanks, 
Shweta

Shweta Choudaha (1):
  net/ixgbe: Add access and locking APIs for MDIO

 drivers/net/ixgbe/rte_pmd_ixgbe.c           | 203 ++++++++++++++++++++++++++++
 drivers/net/ixgbe/rte_pmd_ixgbe.h           |  71 ++++++++++
 drivers/net/ixgbe/rte_pmd_ixgbe_version.map |   9 ++
 3 files changed, 283 insertions(+)

-- 
2.11.0

[PATCH v2 1/1] net/ixgbe: Add access and locking APIs for MDIO

[Shweta Choudaha]

From: Shweta Choudaha <shweta.choudaha@att.com>

Add ixgbe MDIO lock/unlock and access APIs to read and write registers
using specific device address. This provides MDIO access to any devices
that are not associated with the autoprobed PHY.Export these APIs via
the map file

Signed-off-by: Shweta Choudaha <shweta.choudaha@att.com>
Reviewed-by: Chas Williams <chas3@att.com>
Reviewed-by: Luca Boccassi <bluca@debian.org>
---
 drivers/net/ixgbe/rte_pmd_ixgbe.c           | 203 ++++++++++++++++++++++++++++
 drivers/net/ixgbe/rte_pmd_ixgbe.h           |  71 ++++++++++
 drivers/net/ixgbe/rte_pmd_ixgbe_version.map |   9 ++
 3 files changed, 283 insertions(+)

diff --git a/drivers/net/ixgbe/rte_pmd_ixgbe.c b/drivers/net/ixgbe/rte_pmd_ixgbe.c
index d8ca8ca31..1846af89b 100644
--- a/drivers/net/ixgbe/rte_pmd_ixgbe.c
+++ b/drivers/net/ixgbe/rte_pmd_ixgbe.c
@@ -5,6 +5,8 @@
 #include <rte_ethdev_driver.h>
 
 #include "base/ixgbe_api.h"
+#include "base/ixgbe_x540.h"
+#include "base/ixgbe_x550.h"
 #include "ixgbe_ethdev.h"
 #include "rte_pmd_ixgbe.h"
 
@@ -1012,3 +1014,204 @@ rte_pmd_ixgbe_bypass_wd_reset(uint16_t port_id)
 	return ixgbe_bypass_wd_reset(dev);
 }
 #endif
+
+/**
+ *  rte_pmd_ixgbe_acquire_swfw - Acquire SWFW semaphore
+ *  @hw: pointer to hardware structure
+ *  @mask: Mask to specify which semaphore to acquire
+ *
+ *  Acquires the SWFW semaphore and get the shared phy token as needed
+ */
+STATIC s32 rte_pmd_ixgbe_acquire_swfw(struct ixgbe_hw *hw, u32 mask)
+{
+	int retries = FW_PHY_TOKEN_RETRIES;
+	s32 status = IXGBE_SUCCESS;
+
+	while (--retries) {
+		status = ixgbe_acquire_swfw_sync_X540(hw, mask);
+		if (status) {
+			PMD_DRV_LOG(ERR, "Get SWFW sem failed, Status = %d\n",
+				    status);
+			return status;
+		}
+		status = ixgbe_get_phy_token(hw);
+		if (status == IXGBE_SUCCESS)
+			return IXGBE_SUCCESS;
+
+		if (status == IXGBE_ERR_TOKEN_RETRY)
+			PMD_DRV_LOG(ERR, "Get PHY token failed, Status = %d\n",
+				    status);
+
+		ixgbe_release_swfw_sync_X540(hw, mask);
+		if (status != IXGBE_ERR_TOKEN_RETRY) {
+			PMD_DRV_LOG(ERR,
+				    "Retry get PHY token failed, Status=%d\n",
+				    status);
+			return status;
+		}
+	}
+	PMD_DRV_LOG(ERR, "swfw acquisition retries failed!: PHY ID = 0x%08X\n",
+		    hw->phy.id);
+	return status;
+}
+
+/**
+ *  rte_pmd_ixgbe_release_swfw_sync - Release SWFW semaphore
+ *  @hw: pointer to hardware structure
+ *  @mask: Mask to specify which semaphore to release
+ *
+ *  Releases the SWFW semaphore and puts the shared phy token as needed
+ */
+STATIC void rte_pmd_ixgbe_release_swfw(struct ixgbe_hw *hw, u32 mask)
+{
+	ixgbe_put_phy_token(hw);
+	ixgbe_release_swfw_sync_X540(hw, mask);
+}
+
+int __rte_experimental
+rte_pmd_ixgbe_lock_mdio(uint16_t port)
+{
+	struct ixgbe_hw *hw;
+	struct rte_eth_dev *dev;
+	u32 swfw_mask;
+
+	RTE_ETH_VALID_PORTID_OR_ERR_RET(port, -ENODEV);
+	dev = &rte_eth_devices[port];
+	if (!is_ixgbe_supported(dev))
+		return -ENOTSUP;
+
+	hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+	if (!hw)
+		return -ENOTSUP;
+
+	if (hw->bus.lan_id)
+		swfw_mask = IXGBE_GSSR_PHY1_SM;
+	else
+		swfw_mask = IXGBE_GSSR_PHY0_SM;
+
+	if (rte_pmd_ixgbe_acquire_swfw(hw, swfw_mask))
+		return IXGBE_ERR_SWFW_SYNC;
+
+	return IXGBE_SUCCESS;
+}
+
+int __rte_experimental
+rte_pmd_ixgbe_unlock_mdio(uint16_t port)
+{
+	struct rte_eth_dev *dev;
+	struct ixgbe_hw *hw;
+	u32 swfw_mask;
+
+	RTE_ETH_VALID_PORTID_OR_ERR_RET(port, -ENODEV);
+
+	dev = &rte_eth_devices[port];
+	if (!is_ixgbe_supported(dev))
+		return -ENOTSUP;
+
+	hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+	if (!hw)
+		return -ENOTSUP;
+
+	if (hw->bus.lan_id)
+		swfw_mask = IXGBE_GSSR_PHY1_SM;
+	else
+		swfw_mask = IXGBE_GSSR_PHY0_SM;
+
+	rte_pmd_ixgbe_release_swfw(hw, swfw_mask);
+
+	return IXGBE_SUCCESS;
+}
+
+int __rte_experimental
+rte_pmd_ixgbe_mdio_read_unlocked(uint16_t port, uint32_t reg_addr,
+				 uint32_t dev_type, uint16_t *phy_data)
+{
+	struct ixgbe_hw *hw;
+	struct rte_eth_dev *dev;
+	u32 i, data, command;
+
+	RTE_ETH_VALID_PORTID_OR_ERR_RET(port, -ENODEV);
+	dev = &rte_eth_devices[port];
+	if (!is_ixgbe_supported(dev))
+		return -ENOTSUP;
+
+	hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+	if (!hw)
+		return -ENOTSUP;
+
+	/* Setup and write the read command */
+	command = (reg_addr << IXGBE_MSCA_DEV_TYPE_SHIFT) |
+		  (dev_type << IXGBE_MSCA_PHY_ADDR_SHIFT) |
+		  IXGBE_MSCA_OLD_PROTOCOL | IXGBE_MSCA_READ_AUTOINC |
+		  IXGBE_MSCA_MDI_COMMAND;
+
+	IXGBE_WRITE_REG(hw, IXGBE_MSCA, command);
+
+	/* Check every 10 usec to see if the access completed.
+	 * The MDI Command bit will clear when the operation is
+	 * complete
+	 */
+	for (i = 0; i < IXGBE_MDIO_COMMAND_TIMEOUT; i++) {
+		usec_delay(10);
+
+		command = IXGBE_READ_REG(hw, IXGBE_MSCA);
+		if (!(command & IXGBE_MSCA_MDI_COMMAND))
+			break;
+	}
+	if (command & IXGBE_MSCA_MDI_COMMAND)
+		return IXGBE_ERR_PHY;
+
+	/* Read operation is complete.  Get the data from MSRWD */
+	data = IXGBE_READ_REG(hw, IXGBE_MSRWD);
+	data >>= IXGBE_MSRWD_READ_DATA_SHIFT;
+	*phy_data = (u16)data;
+
+	return 0;
+}
+
+int __rte_experimental
+rte_pmd_ixgbe_mdio_write_unlocked(uint16_t port, uint32_t reg_addr,
+				  uint32_t dev_type, uint16_t phy_data)
+{
+	struct ixgbe_hw *hw;
+	u32 i, command;
+	struct rte_eth_dev *dev;
+
+	RTE_ETH_VALID_PORTID_OR_ERR_RET(port, -ENODEV);
+	dev = &rte_eth_devices[port];
+	if (!is_ixgbe_supported(dev))
+		return -ENOTSUP;
+
+	hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+	if (!hw)
+		return -ENOTSUP;
+
+	/* Put the data in the MDI single read and write data register*/
+	IXGBE_WRITE_REG(hw, IXGBE_MSRWD, (u32)phy_data);
+
+	/* Setup and write the write command */
+	command = (reg_addr << IXGBE_MSCA_DEV_TYPE_SHIFT) |
+		  (dev_type << IXGBE_MSCA_PHY_ADDR_SHIFT) |
+		  IXGBE_MSCA_OLD_PROTOCOL | IXGBE_MSCA_WRITE |
+		  IXGBE_MSCA_MDI_COMMAND;
+
+	IXGBE_WRITE_REG(hw, IXGBE_MSCA, command);
+
+	/* Check every 10 usec to see if the access completed.
+	 * The MDI Command bit will clear when the operation is
+	 * complete
+	 */
+	for (i = 0; i < IXGBE_MDIO_COMMAND_TIMEOUT; i++) {
+		usec_delay(10);
+
+		command = IXGBE_READ_REG(hw, IXGBE_MSCA);
+		if (!(command & IXGBE_MSCA_MDI_COMMAND))
+			break;
+	}
+	if (command & IXGBE_MSCA_MDI_COMMAND) {
+		ERROR_REPORT1(IXGBE_ERROR_POLLING,
+			      "PHY write cmd didn't complete\n");
+		return IXGBE_ERR_PHY;
+	}
+	return 0;
+}
diff --git a/drivers/net/ixgbe/rte_pmd_ixgbe.h b/drivers/net/ixgbe/rte_pmd_ixgbe.h
index 11a9f334b..6ba882c65 100644
--- a/drivers/net/ixgbe/rte_pmd_ixgbe.h
+++ b/drivers/net/ixgbe/rte_pmd_ixgbe.h
@@ -573,6 +573,77 @@ int rte_pmd_ixgbe_bypass_wd_timeout_show(uint16_t port, uint32_t *wd_timeout);
  */
 int rte_pmd_ixgbe_bypass_wd_reset(uint16_t port);
 
+/**
+ * Acquire swfw semaphore lock for MDIO access
+ *
+ * @param port
+ *   The port identifier of the Ethernet device.
+ * @return
+ *   - (0) if successful.
+ *   - (-ENOTSUP) if hardware doesn't support.
+ *   - (-ENODEV) if *port* invalid.
+ *   - (IXGBE_ERR_SWFW_SYNC) If sw/fw semaphore acquisition failed
+ */
+int __rte_experimental
+rte_pmd_ixgbe_lock_mdio(uint16_t port);
+
+/**
+ * Release swfw semaphore lock used for MDIO access
+ *
+ * @param port
+ *   The port identifier of the Ethernet device.
+ * @return
+ *   - (0) if successful.
+ *   - (-ENOTSUP) if hardware doesn't support.
+ *   - (-ENODEV) if *port* invalid.
+ */
+int __rte_experimental
+rte_pmd_ixgbe_unlock_mdio(uint16_t port);
+
+/**
+ * Read PHY register using MDIO without MDIO lock
+ * The lock must be taken separately before calling this
+ * API
+ * @param port
+ *   The port identifier of the Ethernet device.
+ * @param reg_addr
+ *   32 bit PHY Register
+ * @param dev_type
+ *   Used to define device base address
+ * @param phy_data
+ *   Pointer for reading PHY register data
+ * @return
+ *   - (0) if successful.
+ *   - (-ENOTSUP) if hardware doesn't support.
+ *   - (-ENODEV) if *port* invalid.
+ *   - (IXGBE_ERR_PHY) If PHY read command failed
+ */
+int __rte_experimental
+rte_pmd_ixgbe_mdio_read_unlocked(uint16_t port, uint32_t reg_addr,
+				 uint32_t dev_type, uint16_t *phy_data);
+
+/**
+ * Write data to PHY register using without MDIO lock
+ * The lock must be taken separately before calling this
+ * API
+ *
+ * @param port
+ *   The port identifier of the Ethernet device.
+ * @param reg_addr
+ *   32 bit PHY Register
+ * @param dev_type
+ *   Used to define device base address
+ * @param phy_data
+ *   Data to write to PHY register
+ * @return
+ *   - (0) if successful.
+ *   - (-ENOTSUP) if hardware doesn't support.
+ *   - (-ENODEV) if *port* invalid.
+ *   - (IXGBE_ERR_PHY) If PHY read command failed
+ */
+int __rte_experimental
+rte_pmd_ixgbe_mdio_write_unlocked(uint16_t port, uint32_t reg_addr,
+				  uint32_t dev_type, uint16_t phy_data);
 
 /**
  * Response sent back to ixgbe driver from user app after callback
diff --git a/drivers/net/ixgbe/rte_pmd_ixgbe_version.map b/drivers/net/ixgbe/rte_pmd_ixgbe_version.map
index bf776742c..88a91627a 100644
--- a/drivers/net/ixgbe/rte_pmd_ixgbe_version.map
+++ b/drivers/net/ixgbe/rte_pmd_ixgbe_version.map
@@ -52,3 +52,12 @@ DPDK_17.08 {
 	rte_pmd_ixgbe_bypass_wd_timeout_show;
 	rte_pmd_ixgbe_bypass_wd_timeout_store;
 } DPDK_17.05;
+
+EXPERIMENTAL {
+	global:
+
+	rte_pmd_ixgbe_lock_mdio;
+	rte_pmd_ixgbe_unlock_mdio;
+	rte_pmd_ixgbe_mdio_read_unlocked;
+	rte_pmd_ixgbe_mdio_write_unlocked;
+} DPDK_17.08;
-- 
2.11.0

Re: [PATCH v2 1/1] net/ixgbe: Add access and locking APIs for MDIO

[Lu, Wenzhuo]

Hi Shweta,

> -----Original Message-----
> From: Shweta Choudaha [mailto:shweta.choudaha@gmail.com]
> Sent: Thursday, March 22, 2018 1:36 AM
> To: dev@dpdk.org
> Cc: Lu, Wenzhuo <wenzhuo.lu@intel.com>; Ananyev, Konstantin
> <konstantin.ananyev@intel.com>; Zhang, Helin <helin.zhang@intel.com>;
> Yigit, Ferruh <ferruh.yigit@intel.com>; shweta.choudaha@att.com
> Subject: [PATCH v2 1/1] net/ixgbe: Add access and locking APIs for MDIO
> 
> From: Shweta Choudaha <shweta.choudaha@att.com>
> 
> Add ixgbe MDIO lock/unlock and access APIs to read and write registers using
> specific device address. This provides MDIO access to any devices that are
> not associated with the autoprobed PHY.Export these APIs via the map file
> 
> Signed-off-by: Shweta Choudaha <shweta.choudaha@att.com>
> Reviewed-by: Chas Williams <chas3@att.com>
> Reviewed-by: Luca Boccassi <bluca@debian.org>
> ---
>  drivers/net/ixgbe/rte_pmd_ixgbe.c           | 203
> ++++++++++++++++++++++++++++
>  drivers/net/ixgbe/rte_pmd_ixgbe.h           |  71 ++++++++++
>  drivers/net/ixgbe/rte_pmd_ixgbe_version.map |   9 ++
>  3 files changed, 283 insertions(+)
> 
> diff --git a/drivers/net/ixgbe/rte_pmd_ixgbe.c
> b/drivers/net/ixgbe/rte_pmd_ixgbe.c
> index d8ca8ca31..1846af89b 100644
> --- a/drivers/net/ixgbe/rte_pmd_ixgbe.c
> +++ b/drivers/net/ixgbe/rte_pmd_ixgbe.c
> @@ -5,6 +5,8 @@
>  #include <rte_ethdev_driver.h>
> 
>  #include "base/ixgbe_api.h"
> +#include "base/ixgbe_x540.h"
> +#include "base/ixgbe_x550.h"
>  #include "ixgbe_ethdev.h"
>  #include "rte_pmd_ixgbe.h"
> 
> @@ -1012,3 +1014,204 @@ rte_pmd_ixgbe_bypass_wd_reset(uint16_t
> port_id)
>  	return ixgbe_bypass_wd_reset(dev);
>  }
>  #endif
> +
> +/**
> + *  rte_pmd_ixgbe_acquire_swfw - Acquire SWFW semaphore
> + *  @hw: pointer to hardware structure
> + *  @mask: Mask to specify which semaphore to acquire
> + *
> + *  Acquires the SWFW semaphore and get the shared phy token as needed
> +*/ STATIC s32 rte_pmd_ixgbe_acquire_swfw(struct ixgbe_hw *hw, u32 mask)
> +{
> +	int retries = FW_PHY_TOKEN_RETRIES;
> +	s32 status = IXGBE_SUCCESS;
> +
> +	while (--retries) {
> +		status = ixgbe_acquire_swfw_sync_X540(hw, mask);
" ixgbe_acquire_swfw_sync_X540" is only for x540. Why not using " ixgbe_acquire_swfw_semaphore" which is common.
The same for " ixgbe_release_swfw_sync_X540".


> a/drivers/net/ixgbe/rte_pmd_ixgbe_version.map
> b/drivers/net/ixgbe/rte_pmd_ixgbe_version.map
> index bf776742c..88a91627a 100644
> --- a/drivers/net/ixgbe/rte_pmd_ixgbe_version.map
> +++ b/drivers/net/ixgbe/rte_pmd_ixgbe_version.map
> @@ -52,3 +52,12 @@ DPDK_17.08 {
>  	rte_pmd_ixgbe_bypass_wd_timeout_show;
>  	rte_pmd_ixgbe_bypass_wd_timeout_store;
>  } DPDK_17.05;
> +
> +EXPERIMENTAL {
> +	global:
> +
> +	rte_pmd_ixgbe_lock_mdio;
> +	rte_pmd_ixgbe_unlock_mdio;
> +	rte_pmd_ixgbe_mdio_read_unlocked;
> +	rte_pmd_ixgbe_mdio_write_unlocked;
> +} DPDK_17.08;
17.08 is old. Should add a 18.05 here.

> --
> 2.11.0

[PATCH v3] net/ixgbe: Add access and locking APIs for MDIO

[Shweta Choudaha]

From: Shweta Choudaha <shweta.choudaha@att.com>

Add ixgbe MDIO lock/unlock and access APIs to read and write registers
using specific device address. This provides MDIO access to any devices
that are not associated with the autoprobed PHY.Export these APIs via
the map file

Signed-off-by: Shweta Choudaha <shweta.choudaha@att.com>
Reviewed-by: Chas Williams <chas3@att.com>
Reviewed-by: Luca Boccassi <bluca@debian.org>
---
 drivers/net/ixgbe/rte_pmd_ixgbe.c           | 202 ++++++++++++++++++++++++++++
 drivers/net/ixgbe/rte_pmd_ixgbe.h           |  71 ++++++++++
 drivers/net/ixgbe/rte_pmd_ixgbe_version.map |   9 ++
 3 files changed, 282 insertions(+)

diff --git a/drivers/net/ixgbe/rte_pmd_ixgbe.c b/drivers/net/ixgbe/rte_pmd_ixgbe.c
index d8ca8ca31..b028dd401 100644
--- a/drivers/net/ixgbe/rte_pmd_ixgbe.c
+++ b/drivers/net/ixgbe/rte_pmd_ixgbe.c
@@ -5,6 +5,7 @@
 #include <rte_ethdev_driver.h>
 
 #include "base/ixgbe_api.h"
+#include "base/ixgbe_x550.h"
 #include "ixgbe_ethdev.h"
 #include "rte_pmd_ixgbe.h"
 
@@ -1012,3 +1013,204 @@ rte_pmd_ixgbe_bypass_wd_reset(uint16_t port_id)
 	return ixgbe_bypass_wd_reset(dev);
 }
 #endif
+
+/**
+ *  rte_pmd_ixgbe_acquire_swfw - Acquire SWFW semaphore
+ *  @hw: pointer to hardware structure
+ *  @mask: Mask to specify which semaphore to acquire
+ *
+ *  Acquires the SWFW semaphore and get the shared phy token as needed
+ */
+STATIC s32 rte_pmd_ixgbe_acquire_swfw(struct ixgbe_hw *hw, u32 mask)
+{
+	int retries = FW_PHY_TOKEN_RETRIES;
+	s32 status = IXGBE_SUCCESS;
+
+	while (--retries) {
+		status = ixgbe_acquire_swfw_semaphore(hw, mask);
+		if (status) {
+			PMD_DRV_LOG(ERR, "Get SWFW sem failed, Status = %d\n",
+				    status);
+			return status;
+		}
+		status = ixgbe_get_phy_token(hw);
+		if (status == IXGBE_SUCCESS)
+			return IXGBE_SUCCESS;
+
+		if (status == IXGBE_ERR_TOKEN_RETRY)
+			PMD_DRV_LOG(ERR, "Get PHY token failed, Status = %d\n",
+				    status);
+
+		ixgbe_release_swfw_semaphore(hw, mask);
+		if (status != IXGBE_ERR_TOKEN_RETRY) {
+			PMD_DRV_LOG(ERR,
+				    "Retry get PHY token failed, Status=%d\n",
+				    status);
+			return status;
+		}
+	}
+	PMD_DRV_LOG(ERR, "swfw acquisition retries failed!: PHY ID = 0x%08X\n",
+		    hw->phy.id);
+	return status;
+}
+
+/**
+ *  rte_pmd_ixgbe_release_swfw_sync - Release SWFW semaphore
+ *  @hw: pointer to hardware structure
+ *  @mask: Mask to specify which semaphore to release
+ *
+ *  Releases the SWFW semaphore and puts the shared phy token as needed
+ */
+STATIC void rte_pmd_ixgbe_release_swfw(struct ixgbe_hw *hw, u32 mask)
+{
+	ixgbe_put_phy_token(hw);
+	ixgbe_release_swfw_semaphore(hw, mask);
+}
+
+int __rte_experimental
+rte_pmd_ixgbe_lock_mdio(uint16_t port)
+{
+	struct ixgbe_hw *hw;
+	struct rte_eth_dev *dev;
+	u32 swfw_mask;
+
+	RTE_ETH_VALID_PORTID_OR_ERR_RET(port, -ENODEV);
+	dev = &rte_eth_devices[port];
+	if (!is_ixgbe_supported(dev))
+		return -ENOTSUP;
+
+	hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+	if (!hw)
+		return -ENOTSUP;
+
+	if (hw->bus.lan_id)
+		swfw_mask = IXGBE_GSSR_PHY1_SM;
+	else
+		swfw_mask = IXGBE_GSSR_PHY0_SM;
+
+	if (rte_pmd_ixgbe_acquire_swfw(hw, swfw_mask))
+		return IXGBE_ERR_SWFW_SYNC;
+
+	return IXGBE_SUCCESS;
+}
+
+int __rte_experimental
+rte_pmd_ixgbe_unlock_mdio(uint16_t port)
+{
+	struct rte_eth_dev *dev;
+	struct ixgbe_hw *hw;
+	u32 swfw_mask;
+
+	RTE_ETH_VALID_PORTID_OR_ERR_RET(port, -ENODEV);
+
+	dev = &rte_eth_devices[port];
+	if (!is_ixgbe_supported(dev))
+		return -ENOTSUP;
+
+	hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+	if (!hw)
+		return -ENOTSUP;
+
+	if (hw->bus.lan_id)
+		swfw_mask = IXGBE_GSSR_PHY1_SM;
+	else
+		swfw_mask = IXGBE_GSSR_PHY0_SM;
+
+	rte_pmd_ixgbe_release_swfw(hw, swfw_mask);
+
+	return IXGBE_SUCCESS;
+}
+
+int __rte_experimental
+rte_pmd_ixgbe_mdio_read_unlocked(uint16_t port, uint32_t reg_addr,
+				 uint32_t dev_type, uint16_t *phy_data)
+{
+	struct ixgbe_hw *hw;
+	struct rte_eth_dev *dev;
+	u32 i, data, command;
+
+	RTE_ETH_VALID_PORTID_OR_ERR_RET(port, -ENODEV);
+	dev = &rte_eth_devices[port];
+	if (!is_ixgbe_supported(dev))
+		return -ENOTSUP;
+
+	hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+	if (!hw)
+		return -ENOTSUP;
+
+	/* Setup and write the read command */
+	command = (reg_addr << IXGBE_MSCA_DEV_TYPE_SHIFT) |
+		  (dev_type << IXGBE_MSCA_PHY_ADDR_SHIFT) |
+		  IXGBE_MSCA_OLD_PROTOCOL | IXGBE_MSCA_READ_AUTOINC |
+		  IXGBE_MSCA_MDI_COMMAND;
+
+	IXGBE_WRITE_REG(hw, IXGBE_MSCA, command);
+
+	/* Check every 10 usec to see if the access completed.
+	 * The MDI Command bit will clear when the operation is
+	 * complete
+	 */
+	for (i = 0; i < IXGBE_MDIO_COMMAND_TIMEOUT; i++) {
+		usec_delay(10);
+
+		command = IXGBE_READ_REG(hw, IXGBE_MSCA);
+		if (!(command & IXGBE_MSCA_MDI_COMMAND))
+			break;
+	}
+	if (command & IXGBE_MSCA_MDI_COMMAND)
+		return IXGBE_ERR_PHY;
+
+	/* Read operation is complete.  Get the data from MSRWD */
+	data = IXGBE_READ_REG(hw, IXGBE_MSRWD);
+	data >>= IXGBE_MSRWD_READ_DATA_SHIFT;
+	*phy_data = (u16)data;
+
+	return 0;
+}
+
+int __rte_experimental
+rte_pmd_ixgbe_mdio_write_unlocked(uint16_t port, uint32_t reg_addr,
+				  uint32_t dev_type, uint16_t phy_data)
+{
+	struct ixgbe_hw *hw;
+	u32 i, command;
+	struct rte_eth_dev *dev;
+
+	RTE_ETH_VALID_PORTID_OR_ERR_RET(port, -ENODEV);
+	dev = &rte_eth_devices[port];
+	if (!is_ixgbe_supported(dev))
+		return -ENOTSUP;
+
+	hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+	if (!hw)
+		return -ENOTSUP;
+
+	/* Put the data in the MDI single read and write data register*/
+	IXGBE_WRITE_REG(hw, IXGBE_MSRWD, (u32)phy_data);
+
+	/* Setup and write the write command */
+	command = (reg_addr << IXGBE_MSCA_DEV_TYPE_SHIFT) |
+		  (dev_type << IXGBE_MSCA_PHY_ADDR_SHIFT) |
+		  IXGBE_MSCA_OLD_PROTOCOL | IXGBE_MSCA_WRITE |
+		  IXGBE_MSCA_MDI_COMMAND;
+
+	IXGBE_WRITE_REG(hw, IXGBE_MSCA, command);
+
+	/* Check every 10 usec to see if the access completed.
+	 * The MDI Command bit will clear when the operation is
+	 * complete
+	 */
+	for (i = 0; i < IXGBE_MDIO_COMMAND_TIMEOUT; i++) {
+		usec_delay(10);
+
+		command = IXGBE_READ_REG(hw, IXGBE_MSCA);
+		if (!(command & IXGBE_MSCA_MDI_COMMAND))
+			break;
+	}
+	if (command & IXGBE_MSCA_MDI_COMMAND) {
+		ERROR_REPORT1(IXGBE_ERROR_POLLING,
+			      "PHY write cmd didn't complete\n");
+		return IXGBE_ERR_PHY;
+	}
+	return 0;
+}
diff --git a/drivers/net/ixgbe/rte_pmd_ixgbe.h b/drivers/net/ixgbe/rte_pmd_ixgbe.h
index 11a9f334b..6ba882c65 100644
--- a/drivers/net/ixgbe/rte_pmd_ixgbe.h
+++ b/drivers/net/ixgbe/rte_pmd_ixgbe.h
@@ -573,6 +573,77 @@ int rte_pmd_ixgbe_bypass_wd_timeout_show(uint16_t port, uint32_t *wd_timeout);
  */
 int rte_pmd_ixgbe_bypass_wd_reset(uint16_t port);
 
+/**
+ * Acquire swfw semaphore lock for MDIO access
+ *
+ * @param port
+ *   The port identifier of the Ethernet device.
+ * @return
+ *   - (0) if successful.
+ *   - (-ENOTSUP) if hardware doesn't support.
+ *   - (-ENODEV) if *port* invalid.
+ *   - (IXGBE_ERR_SWFW_SYNC) If sw/fw semaphore acquisition failed
+ */
+int __rte_experimental
+rte_pmd_ixgbe_lock_mdio(uint16_t port);
+
+/**
+ * Release swfw semaphore lock used for MDIO access
+ *
+ * @param port
+ *   The port identifier of the Ethernet device.
+ * @return
+ *   - (0) if successful.
+ *   - (-ENOTSUP) if hardware doesn't support.
+ *   - (-ENODEV) if *port* invalid.
+ */
+int __rte_experimental
+rte_pmd_ixgbe_unlock_mdio(uint16_t port);
+
+/**
+ * Read PHY register using MDIO without MDIO lock
+ * The lock must be taken separately before calling this
+ * API
+ * @param port
+ *   The port identifier of the Ethernet device.
+ * @param reg_addr
+ *   32 bit PHY Register
+ * @param dev_type
+ *   Used to define device base address
+ * @param phy_data
+ *   Pointer for reading PHY register data
+ * @return
+ *   - (0) if successful.
+ *   - (-ENOTSUP) if hardware doesn't support.
+ *   - (-ENODEV) if *port* invalid.
+ *   - (IXGBE_ERR_PHY) If PHY read command failed
+ */
+int __rte_experimental
+rte_pmd_ixgbe_mdio_read_unlocked(uint16_t port, uint32_t reg_addr,
+				 uint32_t dev_type, uint16_t *phy_data);
+
+/**
+ * Write data to PHY register using without MDIO lock
+ * The lock must be taken separately before calling this
+ * API
+ *
+ * @param port
+ *   The port identifier of the Ethernet device.
+ * @param reg_addr
+ *   32 bit PHY Register
+ * @param dev_type
+ *   Used to define device base address
+ * @param phy_data
+ *   Data to write to PHY register
+ * @return
+ *   - (0) if successful.
+ *   - (-ENOTSUP) if hardware doesn't support.
+ *   - (-ENODEV) if *port* invalid.
+ *   - (IXGBE_ERR_PHY) If PHY read command failed
+ */
+int __rte_experimental
+rte_pmd_ixgbe_mdio_write_unlocked(uint16_t port, uint32_t reg_addr,
+				  uint32_t dev_type, uint16_t phy_data);
 
 /**
  * Response sent back to ixgbe driver from user app after callback
diff --git a/drivers/net/ixgbe/rte_pmd_ixgbe_version.map b/drivers/net/ixgbe/rte_pmd_ixgbe_version.map
index bf776742c..d36f90e74 100644
--- a/drivers/net/ixgbe/rte_pmd_ixgbe_version.map
+++ b/drivers/net/ixgbe/rte_pmd_ixgbe_version.map
@@ -52,3 +52,12 @@ DPDK_17.08 {
 	rte_pmd_ixgbe_bypass_wd_timeout_show;
 	rte_pmd_ixgbe_bypass_wd_timeout_store;
 } DPDK_17.05;
+
+EXPERIMENTAL {
+	global:
+
+	rte_pmd_ixgbe_lock_mdio;
+	rte_pmd_ixgbe_unlock_mdio;
+	rte_pmd_ixgbe_mdio_read_unlocked;
+	rte_pmd_ixgbe_mdio_write_unlocked;
+} DPDK_18.05;
-- 
2.11.0

Re: [PATCH v2 1/1] net/ixgbe: Add access and locking APIs for MDIO

[Shweta Choudaha]

Thanks for the review.
I have sent an updated patch.

regards,
Shweta

On Wed, Apr 4, 2018 at 3:15 AM, Lu, Wenzhuo <wenzhuo.lu@intel.com> wrote:

> Hi Shweta,
>
> > -----Original Message-----
> > From: Shweta Choudaha [mailto:shweta.choudaha@gmail.com]
> > Sent: Thursday, March 22, 2018 1:36 AM
> > To: dev@dpdk.org
> > Cc: Lu, Wenzhuo <wenzhuo.lu@intel.com>; Ananyev, Konstantin
> > <konstantin.ananyev@intel.com>; Zhang, Helin <helin.zhang@intel.com>;
> > Yigit, Ferruh <ferruh.yigit@intel.com>; shweta.choudaha@att.com
> > Subject: [PATCH v2 1/1] net/ixgbe: Add access and locking APIs for MDIO
> >
> > From: Shweta Choudaha <shweta.choudaha@att.com>
> >
> > Add ixgbe MDIO lock/unlock and access APIs to read and write registers
> using
> > specific device address. This provides MDIO access to any devices that
> are
> > not associated with the autoprobed PHY.Export these APIs via the map file
> >
> > Signed-off-by: Shweta Choudaha <shweta.choudaha@att.com>
> > Reviewed-by: Chas Williams <chas3@att.com>
> > Reviewed-by: Luca Boccassi <bluca@debian.org>
> > ---
> >  drivers/net/ixgbe/rte_pmd_ixgbe.c           | 203
> > ++++++++++++++++++++++++++++
> >  drivers/net/ixgbe/rte_pmd_ixgbe.h           |  71 ++++++++++
> >  drivers/net/ixgbe/rte_pmd_ixgbe_version.map |   9 ++
> >  3 files changed, 283 insertions(+)
> >
> > diff --git a/drivers/net/ixgbe/rte_pmd_ixgbe.c
> > b/drivers/net/ixgbe/rte_pmd_ixgbe.c
> > index d8ca8ca31..1846af89b 100644
> > --- a/drivers/net/ixgbe/rte_pmd_ixgbe.c
> > +++ b/drivers/net/ixgbe/rte_pmd_ixgbe.c
> > @@ -5,6 +5,8 @@
> >  #include <rte_ethdev_driver.h>
> >
> >  #include "base/ixgbe_api.h"
> > +#include "base/ixgbe_x540.h"
> > +#include "base/ixgbe_x550.h"
> >  #include "ixgbe_ethdev.h"
> >  #include "rte_pmd_ixgbe.h"
> >
> > @@ -1012,3 +1014,204 @@ rte_pmd_ixgbe_bypass_wd_reset(uint16_t
> > port_id)
> >       return ixgbe_bypass_wd_reset(dev);
> >  }
> >  #endif
> > +
> > +/**
> > + *  rte_pmd_ixgbe_acquire_swfw - Acquire SWFW semaphore
> > + *  @hw: pointer to hardware structure
> > + *  @mask: Mask to specify which semaphore to acquire
> > + *
> > + *  Acquires the SWFW semaphore and get the shared phy token as needed
> > +*/ STATIC s32 rte_pmd_ixgbe_acquire_swfw(struct ixgbe_hw *hw, u32 mask)
> > +{
> > +     int retries = FW_PHY_TOKEN_RETRIES;
> > +     s32 status = IXGBE_SUCCESS;
> > +
> > +     while (--retries) {
> > +             status = ixgbe_acquire_swfw_sync_X540(hw, mask);
> " ixgbe_acquire_swfw_sync_X540" is only for x540. Why not using "
> ixgbe_acquire_swfw_semaphore" which is common.
> The same for " ixgbe_release_swfw_sync_X540".
>
>
> > a/drivers/net/ixgbe/rte_pmd_ixgbe_version.map
> > b/drivers/net/ixgbe/rte_pmd_ixgbe_version.map
> > index bf776742c..88a91627a 100644
> > --- a/drivers/net/ixgbe/rte_pmd_ixgbe_version.map
> > +++ b/drivers/net/ixgbe/rte_pmd_ixgbe_version.map
> > @@ -52,3 +52,12 @@ DPDK_17.08 {
> >       rte_pmd_ixgbe_bypass_wd_timeout_show;
> >       rte_pmd_ixgbe_bypass_wd_timeout_store;
> >  } DPDK_17.05;
> > +
> > +EXPERIMENTAL {
> > +     global:
> > +
> > +     rte_pmd_ixgbe_lock_mdio;
> > +     rte_pmd_ixgbe_unlock_mdio;
> > +     rte_pmd_ixgbe_mdio_read_unlocked;
> > +     rte_pmd_ixgbe_mdio_write_unlocked;
> > +} DPDK_17.08;
> 17.08 is old. Should add a 18.05 here.
>
> > --
> > 2.11.0
>
>

Re: [PATCH v3] net/ixgbe: Add access and locking APIs for MDIO

[Zhang, Qi Z]

Hi Choudaha:

> -----Original Message-----
> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Shweta Choudaha
> Sent: Wednesday, April 11, 2018 10:00 PM
> To: dev@dpdk.org
> Cc: Lu, Wenzhuo <wenzhuo.lu@intel.com>; Ananyev, Konstantin
> <konstantin.ananyev@intel.com>; Zhang, Helin <helin.zhang@intel.com>; Yigit,
> Ferruh <ferruh.yigit@intel.com>; shweta.choudaha@att.com
> Subject: [dpdk-dev] [PATCH v3] net/ixgbe: Add access and locking APIs for
> MDIO

Nitpick: title should not start with uppercase.

> +
> +EXPERIMENTAL {
> +	global:
> +
> +	rte_pmd_ixgbe_lock_mdio;
> +	rte_pmd_ixgbe_unlock_mdio;

Can we rename to rte_pmd_ixgbe_mdio_lock and rte_pmd_ixgbe_mdio_unlock, so all mdio functions can be list closely when follow the alphabet sequence?


> +	rte_pmd_ixgbe_mdio_read_unlocked;
> +	rte_pmd_ixgbe_mdio_write_unlocked;

And this could be rte_pmd_ixgbe_mdio_unlocked_read/write to follow the same pattern that action after object

Regards
Qi

> +} DPDK_18.05;
> --
> 2.11.0

[PATCH v4] net/ixgbe: add access and locking APIs for MDIO

[Shweta Choudaha]

From: Shweta Choudaha <shweta.choudaha@att.com>

Add ixgbe MDIO lock/unlock and access APIs to read and write registers
using specific device address. This provides MDIO access to any devices
that are not associated with the autoprobed PHY.Export these APIs via
the map file

Signed-off-by: Shweta Choudaha <shweta.choudaha@att.com>
Reviewed-by: Chas Williams <chas3@att.com>
Reviewed-by: Luca Boccassi <bluca@debian.org>
---
 drivers/net/ixgbe/rte_pmd_ixgbe.c           | 202 ++++++++++++++++++++++++++++
 drivers/net/ixgbe/rte_pmd_ixgbe.h           |  71 ++++++++++
 drivers/net/ixgbe/rte_pmd_ixgbe_version.map |   9 ++
 3 files changed, 282 insertions(+)

diff --git a/drivers/net/ixgbe/rte_pmd_ixgbe.c b/drivers/net/ixgbe/rte_pmd_ixgbe.c
index d8ca8ca31..974c15dd8 100644
--- a/drivers/net/ixgbe/rte_pmd_ixgbe.c
+++ b/drivers/net/ixgbe/rte_pmd_ixgbe.c
@@ -5,6 +5,7 @@
 #include <rte_ethdev_driver.h>
 
 #include "base/ixgbe_api.h"
+#include "base/ixgbe_x550.h"
 #include "ixgbe_ethdev.h"
 #include "rte_pmd_ixgbe.h"
 
@@ -1012,3 +1013,204 @@ rte_pmd_ixgbe_bypass_wd_reset(uint16_t port_id)
 	return ixgbe_bypass_wd_reset(dev);
 }
 #endif
+
+/**
+ *  rte_pmd_ixgbe_acquire_swfw - Acquire SWFW semaphore
+ *  @hw: pointer to hardware structure
+ *  @mask: Mask to specify which semaphore to acquire
+ *
+ *  Acquires the SWFW semaphore and get the shared phy token as needed
+ */
+STATIC s32 rte_pmd_ixgbe_acquire_swfw(struct ixgbe_hw *hw, u32 mask)
+{
+	int retries = FW_PHY_TOKEN_RETRIES;
+	s32 status = IXGBE_SUCCESS;
+
+	while (--retries) {
+		status = ixgbe_acquire_swfw_semaphore(hw, mask);
+		if (status) {
+			PMD_DRV_LOG(ERR, "Get SWFW sem failed, Status = %d\n",
+				    status);
+			return status;
+		}
+		status = ixgbe_get_phy_token(hw);
+		if (status == IXGBE_SUCCESS)
+			return IXGBE_SUCCESS;
+
+		if (status == IXGBE_ERR_TOKEN_RETRY)
+			PMD_DRV_LOG(ERR, "Get PHY token failed, Status = %d\n",
+				    status);
+
+		ixgbe_release_swfw_semaphore(hw, mask);
+		if (status != IXGBE_ERR_TOKEN_RETRY) {
+			PMD_DRV_LOG(ERR,
+				    "Retry get PHY token failed, Status=%d\n",
+				    status);
+			return status;
+		}
+	}
+	PMD_DRV_LOG(ERR, "swfw acquisition retries failed!: PHY ID = 0x%08X\n",
+		    hw->phy.id);
+	return status;
+}
+
+/**
+ *  rte_pmd_ixgbe_release_swfw_sync - Release SWFW semaphore
+ *  @hw: pointer to hardware structure
+ *  @mask: Mask to specify which semaphore to release
+ *
+ *  Releases the SWFW semaphore and puts the shared phy token as needed
+ */
+STATIC void rte_pmd_ixgbe_release_swfw(struct ixgbe_hw *hw, u32 mask)
+{
+	ixgbe_put_phy_token(hw);
+	ixgbe_release_swfw_semaphore(hw, mask);
+}
+
+int __rte_experimental
+rte_pmd_ixgbe_mdio_lock(uint16_t port)
+{
+	struct ixgbe_hw *hw;
+	struct rte_eth_dev *dev;
+	u32 swfw_mask;
+
+	RTE_ETH_VALID_PORTID_OR_ERR_RET(port, -ENODEV);
+	dev = &rte_eth_devices[port];
+	if (!is_ixgbe_supported(dev))
+		return -ENOTSUP;
+
+	hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+	if (!hw)
+		return -ENOTSUP;
+
+	if (hw->bus.lan_id)
+		swfw_mask = IXGBE_GSSR_PHY1_SM;
+	else
+		swfw_mask = IXGBE_GSSR_PHY0_SM;
+
+	if (rte_pmd_ixgbe_acquire_swfw(hw, swfw_mask))
+		return IXGBE_ERR_SWFW_SYNC;
+
+	return IXGBE_SUCCESS;
+}
+
+int __rte_experimental
+rte_pmd_ixgbe_mdio_unlock(uint16_t port)
+{
+	struct rte_eth_dev *dev;
+	struct ixgbe_hw *hw;
+	u32 swfw_mask;
+
+	RTE_ETH_VALID_PORTID_OR_ERR_RET(port, -ENODEV);
+
+	dev = &rte_eth_devices[port];
+	if (!is_ixgbe_supported(dev))
+		return -ENOTSUP;
+
+	hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+	if (!hw)
+		return -ENOTSUP;
+
+	if (hw->bus.lan_id)
+		swfw_mask = IXGBE_GSSR_PHY1_SM;
+	else
+		swfw_mask = IXGBE_GSSR_PHY0_SM;
+
+	rte_pmd_ixgbe_release_swfw(hw, swfw_mask);
+
+	return IXGBE_SUCCESS;
+}
+
+int __rte_experimental
+rte_pmd_ixgbe_mdio_unlocked_read(uint16_t port, uint32_t reg_addr,
+				 uint32_t dev_type, uint16_t *phy_data)
+{
+	struct ixgbe_hw *hw;
+	struct rte_eth_dev *dev;
+	u32 i, data, command;
+
+	RTE_ETH_VALID_PORTID_OR_ERR_RET(port, -ENODEV);
+	dev = &rte_eth_devices[port];
+	if (!is_ixgbe_supported(dev))
+		return -ENOTSUP;
+
+	hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+	if (!hw)
+		return -ENOTSUP;
+
+	/* Setup and write the read command */
+	command = (reg_addr << IXGBE_MSCA_DEV_TYPE_SHIFT) |
+		  (dev_type << IXGBE_MSCA_PHY_ADDR_SHIFT) |
+		  IXGBE_MSCA_OLD_PROTOCOL | IXGBE_MSCA_READ_AUTOINC |
+		  IXGBE_MSCA_MDI_COMMAND;
+
+	IXGBE_WRITE_REG(hw, IXGBE_MSCA, command);
+
+	/* Check every 10 usec to see if the access completed.
+	 * The MDI Command bit will clear when the operation is
+	 * complete
+	 */
+	for (i = 0; i < IXGBE_MDIO_COMMAND_TIMEOUT; i++) {
+		usec_delay(10);
+
+		command = IXGBE_READ_REG(hw, IXGBE_MSCA);
+		if (!(command & IXGBE_MSCA_MDI_COMMAND))
+			break;
+	}
+	if (command & IXGBE_MSCA_MDI_COMMAND)
+		return IXGBE_ERR_PHY;
+
+	/* Read operation is complete.  Get the data from MSRWD */
+	data = IXGBE_READ_REG(hw, IXGBE_MSRWD);
+	data >>= IXGBE_MSRWD_READ_DATA_SHIFT;
+	*phy_data = (u16)data;
+
+	return 0;
+}
+
+int __rte_experimental
+rte_pmd_ixgbe_mdio_unlocked_write(uint16_t port, uint32_t reg_addr,
+				  uint32_t dev_type, uint16_t phy_data)
+{
+	struct ixgbe_hw *hw;
+	u32 i, command;
+	struct rte_eth_dev *dev;
+
+	RTE_ETH_VALID_PORTID_OR_ERR_RET(port, -ENODEV);
+	dev = &rte_eth_devices[port];
+	if (!is_ixgbe_supported(dev))
+		return -ENOTSUP;
+
+	hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+	if (!hw)
+		return -ENOTSUP;
+
+	/* Put the data in the MDI single read and write data register*/
+	IXGBE_WRITE_REG(hw, IXGBE_MSRWD, (u32)phy_data);
+
+	/* Setup and write the write command */
+	command = (reg_addr << IXGBE_MSCA_DEV_TYPE_SHIFT) |
+		  (dev_type << IXGBE_MSCA_PHY_ADDR_SHIFT) |
+		  IXGBE_MSCA_OLD_PROTOCOL | IXGBE_MSCA_WRITE |
+		  IXGBE_MSCA_MDI_COMMAND;
+
+	IXGBE_WRITE_REG(hw, IXGBE_MSCA, command);
+
+	/* Check every 10 usec to see if the access completed.
+	 * The MDI Command bit will clear when the operation is
+	 * complete
+	 */
+	for (i = 0; i < IXGBE_MDIO_COMMAND_TIMEOUT; i++) {
+		usec_delay(10);
+
+		command = IXGBE_READ_REG(hw, IXGBE_MSCA);
+		if (!(command & IXGBE_MSCA_MDI_COMMAND))
+			break;
+	}
+	if (command & IXGBE_MSCA_MDI_COMMAND) {
+		ERROR_REPORT1(IXGBE_ERROR_POLLING,
+			      "PHY write cmd didn't complete\n");
+		return IXGBE_ERR_PHY;
+	}
+	return 0;
+}
diff --git a/drivers/net/ixgbe/rte_pmd_ixgbe.h b/drivers/net/ixgbe/rte_pmd_ixgbe.h
index 11a9f334b..12c64b97f 100644
--- a/drivers/net/ixgbe/rte_pmd_ixgbe.h
+++ b/drivers/net/ixgbe/rte_pmd_ixgbe.h
@@ -573,6 +573,77 @@ int rte_pmd_ixgbe_bypass_wd_timeout_show(uint16_t port, uint32_t *wd_timeout);
  */
 int rte_pmd_ixgbe_bypass_wd_reset(uint16_t port);
 
+/**
+ * Acquire swfw semaphore lock for MDIO access
+ *
+ * @param port
+ *   The port identifier of the Ethernet device.
+ * @return
+ *   - (0) if successful.
+ *   - (-ENOTSUP) if hardware doesn't support.
+ *   - (-ENODEV) if *port* invalid.
+ *   - (IXGBE_ERR_SWFW_SYNC) If sw/fw semaphore acquisition failed
+ */
+int __rte_experimental
+rte_pmd_ixgbe_mdio_lock(uint16_t port);
+
+/**
+ * Release swfw semaphore lock used for MDIO access
+ *
+ * @param port
+ *   The port identifier of the Ethernet device.
+ * @return
+ *   - (0) if successful.
+ *   - (-ENOTSUP) if hardware doesn't support.
+ *   - (-ENODEV) if *port* invalid.
+ */
+int __rte_experimental
+rte_pmd_ixgbe_mdio_unlock(uint16_t port);
+
+/**
+ * Read PHY register using MDIO without MDIO lock
+ * The lock must be taken separately before calling this
+ * API
+ * @param port
+ *   The port identifier of the Ethernet device.
+ * @param reg_addr
+ *   32 bit PHY Register
+ * @param dev_type
+ *   Used to define device base address
+ * @param phy_data
+ *   Pointer for reading PHY register data
+ * @return
+ *   - (0) if successful.
+ *   - (-ENOTSUP) if hardware doesn't support.
+ *   - (-ENODEV) if *port* invalid.
+ *   - (IXGBE_ERR_PHY) If PHY read command failed
+ */
+int __rte_experimental
+rte_pmd_ixgbe_mdio_unlocked_read(uint16_t port, uint32_t reg_addr,
+				 uint32_t dev_type, uint16_t *phy_data);
+
+/**
+ * Write data to PHY register using without MDIO lock
+ * The lock must be taken separately before calling this
+ * API
+ *
+ * @param port
+ *   The port identifier of the Ethernet device.
+ * @param reg_addr
+ *   32 bit PHY Register
+ * @param dev_type
+ *   Used to define device base address
+ * @param phy_data
+ *   Data to write to PHY register
+ * @return
+ *   - (0) if successful.
+ *   - (-ENOTSUP) if hardware doesn't support.
+ *   - (-ENODEV) if *port* invalid.
+ *   - (IXGBE_ERR_PHY) If PHY read command failed
+ */
+int __rte_experimental
+rte_pmd_ixgbe_mdio_unlocked_write(uint16_t port, uint32_t reg_addr,
+				  uint32_t dev_type, uint16_t phy_data);
 
 /**
  * Response sent back to ixgbe driver from user app after callback
diff --git a/drivers/net/ixgbe/rte_pmd_ixgbe_version.map b/drivers/net/ixgbe/rte_pmd_ixgbe_version.map
index bf776742c..8a60574ad 100644
--- a/drivers/net/ixgbe/rte_pmd_ixgbe_version.map
+++ b/drivers/net/ixgbe/rte_pmd_ixgbe_version.map
@@ -52,3 +52,12 @@ DPDK_17.08 {
 	rte_pmd_ixgbe_bypass_wd_timeout_show;
 	rte_pmd_ixgbe_bypass_wd_timeout_store;
 } DPDK_17.05;
+
+EXPERIMENTAL {
+	global:
+
+	rte_pmd_ixgbe_mdio_lock;
+	rte_pmd_ixgbe_mdio_unlock;
+	rte_pmd_ixgbe_mdio_unlocked_read;
+	rte_pmd_ixgbe_mdio_unlocked_write;
+} DPDK_18.05;
-- 
2.11.0

Re: [PATCH v3] net/ixgbe: Add access and locking APIs for MDIO

[Shweta Choudaha]

Hi Qi,

   I have addressed your comments and sent a v4 patchset.

Thanks,
Shweta

On Fri, Apr 13, 2018 at 3:37 AM, Zhang, Qi Z <qi.z.zhang@intel.com> wrote:

> Hi Choudaha:
>
> > -----Original Message-----
> > From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Shweta Choudaha
> > Sent: Wednesday, April 11, 2018 10:00 PM
> > To: dev@dpdk.org
> > Cc: Lu, Wenzhuo <wenzhuo.lu@intel.com>; Ananyev, Konstantin
> > <konstantin.ananyev@intel.com>; Zhang, Helin <helin.zhang@intel.com>;
> Yigit,
> > Ferruh <ferruh.yigit@intel.com>; shweta.choudaha@att.com
> > Subject: [dpdk-dev] [PATCH v3] net/ixgbe: Add access and locking APIs for
> > MDIO
>
> Nitpick: title should not start with uppercase.
>
> > +
> > +EXPERIMENTAL {
> > +     global:
> > +
> > +     rte_pmd_ixgbe_lock_mdio;
> > +     rte_pmd_ixgbe_unlock_mdio;
>
> Can we rename to rte_pmd_ixgbe_mdio_lock and rte_pmd_ixgbe_mdio_unlock, so
> all mdio functions can be list closely when follow the alphabet sequence?
>
>
> > +     rte_pmd_ixgbe_mdio_read_unlocked;
> > +     rte_pmd_ixgbe_mdio_write_unlocked;
>
> And this could be rte_pmd_ixgbe_mdio_unlocked_read/write to follow the
> same pattern that action after object
>
> Regards
> Qi
>
> > +} DPDK_18.05;
> > --
> > 2.11.0
>
>

Re: [PATCH v4] net/ixgbe: add access and locking APIs for MDIO

[Zhang, Qi Z]

> -----Original Message-----
> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Shweta Choudaha
> Sent: Saturday, April 14, 2018 12:35 AM
> To: dev@dpdk.org
> Cc: Lu, Wenzhuo <wenzhuo.lu@intel.com>; Ananyev, Konstantin
> <konstantin.ananyev@intel.com>; Zhang, Helin <helin.zhang@intel.com>;
> Yigit, Ferruh <ferruh.yigit@intel.com>; shweta.choudaha@att.com
> Subject: [dpdk-dev] [PATCH v4] net/ixgbe: add access and locking APIs for
> MDIO
> 
> From: Shweta Choudaha <shweta.choudaha@att.com>
> 
> Add ixgbe MDIO lock/unlock and access APIs to read and write registers using
> specific device address. This provides MDIO access to any devices that are not
> associated with the autoprobed PHY.Export these APIs via the map file
> 
> Signed-off-by: Shweta Choudaha <shweta.choudaha@att.com>
> Reviewed-by: Chas Williams <chas3@att.com>
> Reviewed-by: Luca Boccassi <bluca@debian.org>

Acked-by: Qi Zhang <qi.z.zhang@intel.com>

Re: [PATCH v4] net/ixgbe: add access and locking APIs for MDIO

[Zhang, Helin]

> -----Original Message-----
> From: Zhang, Qi Z
> Sent: Sunday, April 15, 2018 9:33 PM
> To: Shweta Choudaha; dev@dpdk.org
> Cc: Lu, Wenzhuo; Ananyev, Konstantin; Zhang, Helin; Yigit, Ferruh;
> shweta.choudaha@att.com
> Subject: RE: [dpdk-dev] [PATCH v4] net/ixgbe: add access and locking APIs for
> MDIO
> 
> 
> 
> > -----Original Message-----
> > From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Shweta Choudaha
> > Sent: Saturday, April 14, 2018 12:35 AM
> > To: dev@dpdk.org
> > Cc: Lu, Wenzhuo <wenzhuo.lu@intel.com>; Ananyev, Konstantin
> > <konstantin.ananyev@intel.com>; Zhang, Helin <helin.zhang@intel.com>;
> > Yigit, Ferruh <ferruh.yigit@intel.com>; shweta.choudaha@att.com
> > Subject: [dpdk-dev] [PATCH v4] net/ixgbe: add access and locking APIs
> > for MDIO
> >
> > From: Shweta Choudaha <shweta.choudaha@att.com>
> >
> > Add ixgbe MDIO lock/unlock and access APIs to read and write registers
> > using specific device address. This provides MDIO access to any
> > devices that are not associated with the autoprobed PHY.Export these
> > APIs via the map file
> >
> > Signed-off-by: Shweta Choudaha <shweta.choudaha@att.com>
> > Reviewed-by: Chas Williams <chas3@att.com>
> > Reviewed-by: Luca Boccassi <bluca@debian.org>
> 
> Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Applied to dpdk-next-net-intel, thanks!

/Helin
>