All of lore.kernel.org
 help / color / mirror / Atom feed
From: Mark Rutland <mark.rutland@arm.com>
To: stable@vger.kernel.org
Cc: mark.brown@linaro.org, ard.biesheuvel@linaro.org,
	marc.zyngier@arm.com, will.deacon@arm.com,
	catalin.marinas@arm.com, ghackmann@google.com,
	shankerd@codeaurora.org
Subject: [PATCH v4.9.y 20/42] arm64: KVM: Use per-CPU vector when BP hardening is enabled
Date: Thu, 12 Apr 2018 12:11:16 +0100	[thread overview]
Message-ID: <20180412111138.40990-21-mark.rutland@arm.com> (raw)
In-Reply-To: <20180412111138.40990-1-mark.rutland@arm.com>

From: Marc Zyngier <marc.zyngier@arm.com>

commit 6840bdd73d07216ab4bc46f5a8768c37ea519038 upstream.

Now that we have per-CPU vectors, let's plug then in the KVM/arm64 code.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
[v4.9: account for files moved to virt/ upstream, use cpus_have_cap()]
Signed-off-by: Mark Rutland <mark.rutland@arm.com> [v4.9 backport]
---
 arch/arm/include/asm/kvm_mmu.h   | 10 ++++++++++
 arch/arm/kvm/arm.c               |  9 ++++++++-
 arch/arm64/include/asm/kvm_mmu.h | 38 ++++++++++++++++++++++++++++++++++++++
 arch/arm64/kvm/hyp/switch.c      |  2 +-
 4 files changed, 57 insertions(+), 2 deletions(-)

diff --git a/arch/arm/include/asm/kvm_mmu.h b/arch/arm/include/asm/kvm_mmu.h
index a58bbaa3ec60..d10e36235438 100644
--- a/arch/arm/include/asm/kvm_mmu.h
+++ b/arch/arm/include/asm/kvm_mmu.h
@@ -223,6 +223,16 @@ static inline unsigned int kvm_get_vmid_bits(void)
 	return 8;
 }
 
+static inline void *kvm_get_hyp_vector(void)
+{
+	return kvm_ksym_ref(__kvm_hyp_vector);
+}
+
+static inline int kvm_map_vectors(void)
+{
+	return 0;
+}
+
 #endif	/* !__ASSEMBLY__ */
 
 #endif /* __ARM_KVM_MMU_H__ */
diff --git a/arch/arm/kvm/arm.c b/arch/arm/kvm/arm.c
index c38bfbeec306..5e666b624dc1 100644
--- a/arch/arm/kvm/arm.c
+++ b/arch/arm/kvm/arm.c
@@ -1088,7 +1088,7 @@ static void cpu_init_hyp_mode(void *dummy)
 	pgd_ptr = kvm_mmu_get_httbr();
 	stack_page = __this_cpu_read(kvm_arm_hyp_stack_page);
 	hyp_stack_ptr = stack_page + PAGE_SIZE;
-	vector_ptr = (unsigned long)kvm_ksym_ref(__kvm_hyp_vector);
+	vector_ptr = (unsigned long)kvm_get_hyp_vector();
 
 	__cpu_init_hyp_mode(pgd_ptr, hyp_stack_ptr, vector_ptr);
 	__cpu_init_stage2();
@@ -1345,6 +1345,13 @@ static int init_hyp_mode(void)
 		goto out_err;
 	}
 
+
+	err = kvm_map_vectors();
+	if (err) {
+		kvm_err("Cannot map vectors\n");
+		goto out_err;
+	}
+
 	/*
 	 * Map the Hyp stack pages
 	 */
diff --git a/arch/arm64/include/asm/kvm_mmu.h b/arch/arm64/include/asm/kvm_mmu.h
index 6d22017ebbad..80bf33715ecb 100644
--- a/arch/arm64/include/asm/kvm_mmu.h
+++ b/arch/arm64/include/asm/kvm_mmu.h
@@ -313,5 +313,43 @@ static inline unsigned int kvm_get_vmid_bits(void)
 	return (cpuid_feature_extract_unsigned_field(reg, ID_AA64MMFR1_VMIDBITS_SHIFT) == 2) ? 16 : 8;
 }
 
+#ifdef CONFIG_HARDEN_BRANCH_PREDICTOR
+#include <asm/mmu.h>
+
+static inline void *kvm_get_hyp_vector(void)
+{
+	struct bp_hardening_data *data = arm64_get_bp_hardening_data();
+	void *vect = kvm_ksym_ref(__kvm_hyp_vector);
+
+	if (data->fn) {
+		vect = __bp_harden_hyp_vecs_start +
+		       data->hyp_vectors_slot * SZ_2K;
+
+		if (!cpus_have_cap(ARM64_HAS_VIRT_HOST_EXTN))
+			vect = lm_alias(vect);
+	}
+
+	return vect;
+}
+
+static inline int kvm_map_vectors(void)
+{
+	return create_hyp_mappings(kvm_ksym_ref(__bp_harden_hyp_vecs_start),
+				   kvm_ksym_ref(__bp_harden_hyp_vecs_end),
+				   PAGE_HYP_EXEC);
+}
+
+#else
+static inline void *kvm_get_hyp_vector(void)
+{
+	return kvm_ksym_ref(__kvm_hyp_vector);
+}
+
+static inline int kvm_map_vectors(void)
+{
+	return 0;
+}
+#endif
+
 #endif /* __ASSEMBLY__ */
 #endif /* __ARM64_KVM_MMU_H__ */
diff --git a/arch/arm64/kvm/hyp/switch.c b/arch/arm64/kvm/hyp/switch.c
index 0c848c18ca44..cf6d962f9639 100644
--- a/arch/arm64/kvm/hyp/switch.c
+++ b/arch/arm64/kvm/hyp/switch.c
@@ -50,7 +50,7 @@ static void __hyp_text __activate_traps_vhe(void)
 	val &= ~CPACR_EL1_FPEN;
 	write_sysreg(val, cpacr_el1);
 
-	write_sysreg(__kvm_hyp_vector, vbar_el1);
+	write_sysreg(kvm_get_hyp_vector(), vbar_el1);
 }
 
 static void __hyp_text __activate_traps_nvhe(void)
-- 
2.11.0

  parent reply	other threads:[~2018-04-12 11:12 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-04-12 11:10 [PATCH v4.9.y 00/42] arm64 spectre patches Mark Rutland
2018-04-12 11:10 ` [PATCH v4.9.y 01/42] arm64: barrier: Add CSDB macros to control data-value prediction Mark Rutland
2018-04-12 11:10 ` [PATCH v4.9.y 02/42] arm64: Implement array_index_mask_nospec() Mark Rutland
2018-04-12 11:10 ` [PATCH v4.9.y 03/42] arm64: move TASK_* definitions to <asm/processor.h> Mark Rutland
2018-04-12 11:11 ` [PATCH v4.9.y 04/42] arm64: Make USER_DS an inclusive limit Mark Rutland
2018-04-12 11:11 ` [PATCH v4.9.y 05/42] arm64: Use pointer masking to limit uaccess speculation Mark Rutland
2018-04-12 11:11 ` [PATCH v4.9.y 06/42] arm64: entry: Ensure branch through syscall table is bounded under speculation Mark Rutland
2018-04-12 11:11 ` [PATCH v4.9.y 07/42] arm64: uaccess: Prevent speculative use of the current addr_limit Mark Rutland
2018-04-12 11:11 ` [PATCH v4.9.y 08/42] arm64: uaccess: Don't bother eliding access_ok checks in __{get, put}_user Mark Rutland
2018-04-12 11:11 ` [PATCH v4.9.y 09/42] arm64: uaccess: Mask __user pointers for __arch_{clear, copy_*}_user Mark Rutland
2018-04-12 11:11 ` [PATCH v4.9.y 10/42] arm64: futex: Mask __user pointers prior to dereference Mark Rutland
2018-04-17 12:10   ` Greg KH
2018-04-18 10:56     ` Mark Rutland
2018-04-19  7:02       ` Greg KH
2018-04-12 11:11 ` [PATCH v4.9.y 11/42] arm64: cpufeature: __this_cpu_has_cap() shouldn't stop early Mark Rutland
2018-04-12 11:11 ` [PATCH v4.9.y 12/42] arm64: Run enable method for errata work arounds on late CPUs Mark Rutland
2018-04-12 11:11 ` [PATCH v4.9.y 13/42] arm64: cpufeature: Pass capability structure to ->enable callback Mark Rutland
2018-04-12 11:11 ` [PATCH v4.9.y 14/42] drivers/firmware: Expose psci_get_version through psci_ops structure Mark Rutland
2018-04-12 11:11 ` [PATCH v4.9.y 15/42] arm64: Factor out TTBR0_EL1 post-update workaround into a specific asm macro Mark Rutland
2018-04-12 11:11 ` [PATCH v4.9.y 16/42] arm64: Move post_ttbr_update_workaround to C code Mark Rutland
2018-04-12 11:11 ` [PATCH v4.9.y 17/42] arm64: Add skeleton to harden the branch predictor against aliasing attacks Mark Rutland
2018-04-12 11:11 ` [PATCH v4.9.y 18/42] arm64: Move BP hardening to check_and_switch_context Mark Rutland
2018-04-12 11:11 ` [PATCH v4.9.y 19/42] mm: Introduce lm_alias Mark Rutland
2018-04-12 11:11 ` Mark Rutland [this message]
2018-04-12 11:11 ` [PATCH v4.9.y 21/42] arm64: entry: Apply BP hardening for high-priority synchronous exceptions Mark Rutland
2018-04-12 11:11 ` [PATCH v4.9.y 22/42] arm64: entry: Apply BP hardening for suspicious interrupts from EL0 Mark Rutland
2018-04-12 11:11 ` [PATCH v4.9.y 23/42] arm64: cputype: Add missing MIDR values for Cortex-A72 and Cortex-A75 Mark Rutland
2018-04-12 11:11 ` [PATCH v4.9.y 24/42] arm64: cpu_errata: Allow an erratum to be match for all revisions of a core Mark Rutland
2018-04-12 11:11 ` [PATCH v4.9.y 25/42] arm64: Implement branch predictor hardening for affected Cortex-A CPUs Mark Rutland
2018-04-12 11:11 ` [PATCH v4.9.y 26/42] arm64: Branch predictor hardening for Cavium ThunderX2 Mark Rutland
2018-04-12 11:11 ` [PATCH v4.9.y 27/42] arm64: KVM: Increment PC after handling an SMC trap Mark Rutland
2018-04-12 11:11 ` [PATCH v4.9.y 28/42] arm/arm64: KVM: Consolidate the PSCI include files Mark Rutland
2018-04-12 11:11 ` [PATCH v4.9.y 29/42] arm/arm64: KVM: Add PSCI_VERSION helper Mark Rutland
2018-04-12 11:11 ` [PATCH v4.9.y 30/42] arm/arm64: KVM: Add smccc accessors to PSCI code Mark Rutland
2018-04-12 11:11 ` [PATCH v4.9.y 31/42] arm/arm64: KVM: Implement PSCI 1.0 support Mark Rutland
2018-04-12 11:11 ` [PATCH v4.9.y 32/42] arm/arm64: KVM: Advertise SMCCC v1.1 Mark Rutland
2018-04-12 11:11 ` [PATCH v4.9.y 33/42] arm64: KVM: Make PSCI_VERSION a fast path Mark Rutland
2018-04-12 11:11 ` [PATCH v4.9.y 34/42] arm/arm64: KVM: Turn kvm_psci_version into a static inline Mark Rutland
2018-04-12 11:11 ` [PATCH v4.9.y 35/42] arm64: KVM: Report SMCCC_ARCH_WORKAROUND_1 BP hardening support Mark Rutland
2018-04-12 11:11 ` [PATCH v4.9.y 36/42] arm64: KVM: Add SMCCC_ARCH_WORKAROUND_1 fast handling Mark Rutland
2018-04-12 11:11 ` [PATCH v4.9.y 37/42] firmware/psci: Expose PSCI conduit Mark Rutland
2018-04-12 11:11 ` [PATCH v4.9.y 38/42] firmware/psci: Expose SMCCC version through psci_ops Mark Rutland
2018-04-12 11:11 ` [PATCH v4.9.y 39/42] arm/arm64: smccc: Make function identifiers an unsigned quantity Mark Rutland
2018-04-12 11:11 ` [PATCH v4.9.y 40/42] arm/arm64: smccc: Implement SMCCC v1.1 inline primitive Mark Rutland
2018-04-12 11:11 ` [PATCH v4.9.y 41/42] arm64: Add ARM_SMCCC_ARCH_WORKAROUND_1 BP hardening support Mark Rutland
2018-04-12 11:11 ` [PATCH v4.9.y 42/42] arm64: Kill PSCI_GET_VERSION as a variant-2 workaround Mark Rutland
2018-04-12 16:39 ` [PATCH v4.9.y 00/42] arm64 spectre patches Greg Hackmann
2018-04-17 12:15 ` Greg KH

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20180412111138.40990-21-mark.rutland@arm.com \
    --to=mark.rutland@arm.com \
    --cc=ard.biesheuvel@linaro.org \
    --cc=catalin.marinas@arm.com \
    --cc=ghackmann@google.com \
    --cc=marc.zyngier@arm.com \
    --cc=mark.brown@linaro.org \
    --cc=shankerd@codeaurora.org \
    --cc=stable@vger.kernel.org \
    --cc=will.deacon@arm.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.