From mboxrd@z Thu Jan 1 00:00:00 1970 Return-path: Received: from aserp2120.oracle.com ([141.146.126.78]) by Galois.linutronix.de with esmtps (TLS1.2:RSA_AES_256_CBC_SHA256:256) (Exim 4.80) (envelope-from ) id 1f9GX0-0001jo-AE for speck@linutronix.de; Thu, 19 Apr 2018 22:51:51 +0200 Received: from pps.filterd (aserp2120.oracle.com [127.0.0.1]) by aserp2120.oracle.com (8.16.0.22/8.16.0.22) with SMTP id w3JKpPpM147846 for ; Thu, 19 Apr 2018 20:51:43 GMT Received: from aserv0022.oracle.com (aserv0022.oracle.com [141.146.126.234]) by aserp2120.oracle.com with ESMTP id 2hdrxnhvn0-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK) for ; Thu, 19 Apr 2018 20:51:43 +0000 Received: from userv0121.oracle.com (userv0121.oracle.com [156.151.31.72]) by aserv0022.oracle.com (8.14.4/8.14.4) with ESMTP id w3JKpgZs010915 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK) for ; Thu, 19 Apr 2018 20:51:42 GMT Received: from abhmp0009.oracle.com (abhmp0009.oracle.com [141.146.116.15]) by userv0121.oracle.com (8.14.4/8.13.8) with ESMTP id w3JKpgPk001864 for ; Thu, 19 Apr 2018 20:51:42 GMT Date: Thu, 19 Apr 2018 16:51:37 -0400 From: Konrad Rzeszutek Wilk Subject: [MODERATED] Re: ***UNCHECKED*** [patch 3/8] [PATCH v1.3.1 3/7] Linux Patch 3 Message-ID: <20180419205132.GA18190@localhost.localdomain> References: <20180418141551.07CBB6111A@crypto-ml.lab.linutronix.de> <20180418153712.GD4290@pd.tnic> MIME-Version: 1.0 In-Reply-To: <20180418153712.GD4290@pd.tnic> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit To: speck@linutronix.de List-ID: On Wed, Apr 18, 2018 at 05:37:13PM +0200, speck for Borislav Petkov wrote: > On Thu, Apr 12, 2018 at 10:26:52PM -0400, speck for konrad.wilk_at_oracle.com wrote: > > diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c > > index 561cb228605a..73f76d0f5181 100644 > > --- a/arch/x86/kernel/cpu/bugs.c > > +++ b/arch/x86/kernel/cpu/bugs.c > > @@ -72,6 +72,9 @@ void __init check_bugs(void) > > */ > > if (!direct_gbpages) > > set_memory_4k((unsigned long)__va(0), 1); > > + > > + if (mdd_at_boot()) > > + wrmsrl(MSR_IA32_SPEC_CTRL, SPEC_CTRL_MDD); > > You can't do this on the common path as that would explode on !Intel. > > Instead, move that check to init_intel(). That won't work. The reason is that check_bugs first calls identify_boot_cpu() which calls identify_cpu() which calls this_cpu->init. Once identify_boot_cpu() is done _then_ it walks through the spectre_v2_select_mitigation() and ssb_select_mitigation(). > > And add to init_amd_zn() code reading MSR 0xc0011020, setting bit 10 to > 1b and then writing it back in the mdd_at_boot() case. We have a define > for that MSR already - MSR_AMD64_LS_CFG. I am thinking that perhaps we can add a new function: >From 258854941d792de5de4ffdefcce8f52e8984e2e5 Mon Sep 17 00:00:00 2001 From: Konrad Rzeszutek Wilk Date: Thu, 19 Apr 2018 16:47:38 -0400 Subject: [PATCH] x86/cpu: Add fix_this_cpu to be called _after_ check_bugs and at BSP. We do a lot of things in the check_bugs() - one of the first things we do is identify_boot_cpu() which calls identify_cpu() which calls this_cpu->init. Once identify_boot_cpu() is done _then_ it walks through the spectre_v2_select_mitigation() and alternative_assembler(). If there are some CPU fix ups _after_ spectre_v2 is done we can't activate those on the BSP as we have already called 'this_cpu->init'. Hence add a new function to fixup CPUs. Signed-off-by: Konrad Rzeszutek Wilk --- arch/x86/include/asm/processor.h | 1 + arch/x86/kernel/cpu/bugs.c | 1 + arch/x86/kernel/cpu/common.c | 8 ++++++++ arch/x86/kernel/cpu/cpu.h | 1 + 4 files changed, 11 insertions(+) diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h index b0ccd4847a58..b22bc9be2385 100644 --- a/arch/x86/include/asm/processor.h +++ b/arch/x86/include/asm/processor.h @@ -195,6 +195,7 @@ extern void init_amd_cacheinfo(struct cpuinfo_x86 *c); extern void detect_extended_topology(struct cpuinfo_x86 *c); extern void detect_ht(struct cpuinfo_x86 *c); +extern void apply_cpu_fixes(void); #ifdef CONFIG_X86_32 extern int have_cpuid_p(void); diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c index 4632c26e13e0..9c2987b4f7fa 100644 --- a/arch/x86/kernel/cpu/bugs.c +++ b/arch/x86/kernel/cpu/bugs.c @@ -77,6 +77,7 @@ void __init check_bugs(void) if (!direct_gbpages) set_memory_4k((unsigned long)__va(0), 1); #endif + apply_cpu_fixes(); } /* The kernel command line selection */ diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index f7d80658cced..a59f7902a7fa 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -955,6 +955,12 @@ static void __init cpu_set_bug_bits(struct cpuinfo_x86 *c) setup_force_cpu_bug(X86_BUG_CPU_SSB); }; +void apply_cpu_fixes(void) +{ + if (this_cpu->c_bug_fix) + this_cpu->c_bug_fix(&boot_cpu_data); +} + /* * Do minimum CPU detection early. * Fields really needed: vendor, cpuid_level, family, model, mask, @@ -1311,6 +1317,8 @@ static void identify_cpu(struct cpuinfo_x86 *c) #ifdef CONFIG_NUMA numa_add_cpu(smp_processor_id()); #endif + if (this_cpu->c_bug_fix) + this_cpu->c_bug_fix(c); } /* diff --git a/arch/x86/kernel/cpu/cpu.h b/arch/x86/kernel/cpu/cpu.h index e806b11a99af..7081634caac5 100644 --- a/arch/x86/kernel/cpu/cpu.h +++ b/arch/x86/kernel/cpu/cpu.h @@ -15,6 +15,7 @@ struct cpu_dev { void (*c_identify)(struct cpuinfo_x86 *); void (*c_detect_tlb)(struct cpuinfo_x86 *); void (*c_bsp_resume)(struct cpuinfo_x86 *); + void (*c_bug_fix)(struct cpuinfo_x86 *); int c_x86_vendor; #ifdef CONFIG_X86_32 /* Optional vendor specific routine to obtain the cache size. */ -- 2.14.3