From mboxrd@z Thu Jan 1 00:00:00 1970 From: "hch@lst.de" Date: Thu, 26 Apr 2018 08:25:12 +0000 Subject: Re: [PATCH 06/22] arc: use generic dma_noncoherent_ops Message-Id: <20180426082512.GB15580@lst.de> List-Id: References: <20180420080313.18796-1-hch@lst.de> <20180420080313.18796-7-hch@lst.de> <1524655020.5315.9.camel@synopsys.com> <20180426064500.GB13895@lst.de> In-Reply-To: <20180426064500.GB13895@lst.de> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: Alexey Brodkin Cc: "hch@lst.de" , "deanbo422@gmail.com" , "linux-sh@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "nios2-dev@lists.rocketboards.org" , "linux-xtensa@linux-xtensa.org" , "linux-m68k@lists.linux-m68k.org" , "linux-alpha@vger.kernel.org" , "linux-hexagon@vger.kernel.org" , "linux-snps-arc@lists.infradead.org" , "green.hu@gmail.com" , "openrisc@lists.librecores.org" , "linux-arm-kernel@lists.infradead.org" On Thu, Apr 26, 2018 at 08:45:00AM +0200, hch@lst.de wrote: > On Wed, Apr 25, 2018 at 11:17:01AM +0000, Alexey Brodkin wrote: > > Which is actually strange as I would expect ARC code to be built by bots. > > I don't think I got any notification. Thank for the fixes! > > I think I found the bug, based on the fact that so far all tests for > architectures that also need a cache op for device to cpu transitions > failed. I did a stupid typo when changing kconfig symbols, so please > try the patch below. Confirmed to work for nds32, so here is a git tree with the core, arc and nds32 fixes folded in, feel free to test that one: git://git.infradead.org/users/hch/misc.git generic-dma-noncoherent From mboxrd@z Thu Jan 1 00:00:00 1970 From: "hch@lst.de" Subject: Re: [PATCH 06/22] arc: use generic dma_noncoherent_ops Date: Thu, 26 Apr 2018 10:25:12 +0200 Message-ID: <20180426082512.GB15580@lst.de> References: <20180420080313.18796-1-hch@lst.de> <20180420080313.18796-7-hch@lst.de> <1524655020.5315.9.camel@synopsys.com> <20180426064500.GB13895@lst.de> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Cc: "hch@lst.de" , "deanbo422@gmail.com" , "linux-sh@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "nios2-dev@lists.rocketboards.org" , "linux-xtensa@linux-xtensa.org" , "linux-m68k@lists.linux-m68k.org" , "linux-alpha@vger.kernel.org" , "linux-hexagon@vger.kernel.org" , "linux-snps-arc@lists.infradead.org" , "green.hu@gmail.com" , "openrisc@lists.librecores.org" , "linux-arm-kernel@lists.infradead.org" , To: Alexey Brodkin Return-path: In-Reply-To: <20180426064500.GB13895@lst.de> List-ID: List-Id: linux-parisc.vger.kernel.org On Thu, Apr 26, 2018 at 08:45:00AM +0200, hch@lst.de wrote: > On Wed, Apr 25, 2018 at 11:17:01AM +0000, Alexey Brodkin wrote: > > Which is actually strange as I would expect ARC code to be built by bots. > > I don't think I got any notification. Thank for the fixes! > > I think I found the bug, based on the fact that so far all tests for > architectures that also need a cache op for device to cpu transitions > failed. I did a stupid typo when changing kconfig symbols, so please > try the patch below. Confirmed to work for nds32, so here is a git tree with the core, arc and nds32 fixes folded in, feel free to test that one: git://git.infradead.org/users/hch/misc.git generic-dma-noncoherent From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754655AbeDZIXf (ORCPT ); Thu, 26 Apr 2018 04:23:35 -0400 Received: from verein.lst.de ([213.95.11.211]:40967 "EHLO newverein.lst.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754584AbeDZIX3 (ORCPT ); Thu, 26 Apr 2018 04:23:29 -0400 Date: Thu, 26 Apr 2018 10:25:12 +0200 From: "hch@lst.de" To: Alexey Brodkin Cc: "hch@lst.de" , "deanbo422@gmail.com" , "linux-sh@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "nios2-dev@lists.rocketboards.org" , "linux-xtensa@linux-xtensa.org" , "linux-m68k@lists.linux-m68k.org" , "linux-alpha@vger.kernel.org" , "linux-hexagon@vger.kernel.org" , "linux-snps-arc@lists.infradead.org" , "green.hu@gmail.com" , "openrisc@lists.librecores.org" , "linux-arm-kernel@lists.infradead.org" , "monstr@monstr.eu" , "linux-parisc@vger.kernel.org" , "linux-c6x-dev@linux-c6x.org" , "linux-arch@vger.kernel.org" , "sparclinux@vger.kernel.org" Subject: Re: [PATCH 06/22] arc: use generic dma_noncoherent_ops Message-ID: <20180426082512.GB15580@lst.de> References: <20180420080313.18796-1-hch@lst.de> <20180420080313.18796-7-hch@lst.de> <1524655020.5315.9.camel@synopsys.com> <20180426064500.GB13895@lst.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20180426064500.GB13895@lst.de> User-Agent: Mutt/1.5.17 (2007-11-01) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Apr 26, 2018 at 08:45:00AM +0200, hch@lst.de wrote: > On Wed, Apr 25, 2018 at 11:17:01AM +0000, Alexey Brodkin wrote: > > Which is actually strange as I would expect ARC code to be built by bots. > > I don't think I got any notification. Thank for the fixes! > > I think I found the bug, based on the fact that so far all tests for > architectures that also need a cache op for device to cpu transitions > failed. I did a stupid typo when changing kconfig symbols, so please > try the patch below. Confirmed to work for nds32, so here is a git tree with the core, arc and nds32 fixes folded in, feel free to test that one: git://git.infradead.org/users/hch/misc.git generic-dma-noncoherent From mboxrd@z Thu Jan 1 00:00:00 1970 From: "hch@lst.de" Subject: Re: [PATCH 06/22] arc: use generic dma_noncoherent_ops Date: Thu, 26 Apr 2018 10:25:12 +0200 Message-ID: <20180426082512.GB15580@lst.de> References: <20180420080313.18796-1-hch@lst.de> <20180420080313.18796-7-hch@lst.de> <1524655020.5315.9.camel@synopsys.com> <20180426064500.GB13895@lst.de> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Content-Disposition: inline In-Reply-To: <20180426064500.GB13895@lst.de> Sender: linux-kernel-owner@vger.kernel.org To: Alexey Brodkin Cc: "hch@lst.de" , "deanbo422@gmail.com" , "linux-sh@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "nios2-dev@lists.rocketboards.org" , "linux-xtensa@linux-xtensa.org" , "linux-m68k@lists.linux-m68k.org" , "linux-alpha@vger.kernel.org" , "linux-hexagon@vger.kernel.org" , "linux-snps-arc@lists.infradead.org" , "green.hu@gmail.com" , "openrisc@lists.librecores.org" , "linux-arm-kernel@lists.infradead.org" List-Id: linux-arch.vger.kernel.org On Thu, Apr 26, 2018 at 08:45:00AM +0200, hch@lst.de wrote: > On Wed, Apr 25, 2018 at 11:17:01AM +0000, Alexey Brodkin wrote: > > Which is actually strange as I would expect ARC code to be built by bots. > > I don't think I got any notification. Thank for the fixes! > > I think I found the bug, based on the fact that so far all tests for > architectures that also need a cache op for device to cpu transitions > failed. I did a stupid typo when changing kconfig symbols, so please > try the patch below. Confirmed to work for nds32, so here is a git tree with the core, arc and nds32 fixes folded in, feel free to test that one: git://git.infradead.org/users/hch/misc.git generic-dma-noncoherent From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from verein.lst.de ([213.95.11.211]:40967 "EHLO newverein.lst.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754584AbeDZIX3 (ORCPT ); Thu, 26 Apr 2018 04:23:29 -0400 Date: Thu, 26 Apr 2018 10:25:12 +0200 From: "hch@lst.de" Subject: Re: [PATCH 06/22] arc: use generic dma_noncoherent_ops Message-ID: <20180426082512.GB15580@lst.de> References: <20180420080313.18796-1-hch@lst.de> <20180420080313.18796-7-hch@lst.de> <1524655020.5315.9.camel@synopsys.com> <20180426064500.GB13895@lst.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20180426064500.GB13895@lst.de> Sender: linux-arch-owner@vger.kernel.org List-ID: To: Alexey Brodkin Cc: "hch@lst.de" , "deanbo422@gmail.com" , "linux-sh@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "nios2-dev@lists.rocketboards.org" , "linux-xtensa@linux-xtensa.org" , "linux-m68k@lists.linux-m68k.org" , "linux-alpha@vger.kernel.org" , "linux-hexagon@vger.kernel.org" , "linux-snps-arc@lists.infradead.org" , "green.hu@gmail.com" , "openrisc@lists.librecores.org" , "linux-arm-kernel@lists.infradead.org" , "monstr@monstr.eu" , "linux-parisc@vger.kernel.org" , "linux-c6x-dev@linux-c6x.org" , "linux-arch@vger.kernel.org" , "sparclinux@vger.kernel.org" Message-ID: <20180426082512.nQhREZ_urDlDg80rB2ae9DH8sQczl0OWc0JhSCpVJJE@z> On Thu, Apr 26, 2018 at 08:45:00AM +0200, hch@lst.de wrote: > On Wed, Apr 25, 2018 at 11:17:01AM +0000, Alexey Brodkin wrote: > > Which is actually strange as I would expect ARC code to be built by bots. > > I don't think I got any notification. Thank for the fixes! > > I think I found the bug, based on the fact that so far all tests for > architectures that also need a cache op for device to cpu transitions > failed. I did a stupid typo when changing kconfig symbols, so please > try the patch below. Confirmed to work for nds32, so here is a git tree with the core, arc and nds32 fixes folded in, feel free to test that one: git://git.infradead.org/users/hch/misc.git generic-dma-noncoherent From mboxrd@z Thu Jan 1 00:00:00 1970 From: hch@lst.de (hch@lst.de) Date: Thu, 26 Apr 2018 10:25:12 +0200 Subject: [PATCH 06/22] arc: use generic dma_noncoherent_ops In-Reply-To: <20180426064500.GB13895@lst.de> References: <20180420080313.18796-1-hch@lst.de> <20180420080313.18796-7-hch@lst.de> <1524655020.5315.9.camel@synopsys.com> <20180426064500.GB13895@lst.de> List-ID: Message-ID: <20180426082512.GB15580@lst.de> To: linux-snps-arc@lists.infradead.org On Thu, Apr 26, 2018@08:45:00AM +0200, hch@lst.de wrote: > On Wed, Apr 25, 2018@11:17:01AM +0000, Alexey Brodkin wrote: > > Which is actually strange as I would expect ARC code to be built by bots. > > I don't think I got any notification. Thank for the fixes! > > I think I found the bug, based on the fact that so far all tests for > architectures that also need a cache op for device to cpu transitions > failed. I did a stupid typo when changing kconfig symbols, so please > try the patch below. Confirmed to work for nds32, so here is a git tree with the core, arc and nds32 fixes folded in, feel free to test that one: git://git.infradead.org/users/hch/misc.git generic-dma-noncoherent From mboxrd@z Thu Jan 1 00:00:00 1970 From: hch@lst.de (hch at lst.de) Date: Thu, 26 Apr 2018 10:25:12 +0200 Subject: [PATCH 06/22] arc: use generic dma_noncoherent_ops In-Reply-To: <20180426064500.GB13895@lst.de> References: <20180420080313.18796-1-hch@lst.de> <20180420080313.18796-7-hch@lst.de> <1524655020.5315.9.camel@synopsys.com> <20180426064500.GB13895@lst.de> Message-ID: <20180426082512.GB15580@lst.de> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Thu, Apr 26, 2018 at 08:45:00AM +0200, hch at lst.de wrote: > On Wed, Apr 25, 2018 at 11:17:01AM +0000, Alexey Brodkin wrote: > > Which is actually strange as I would expect ARC code to be built by bots. > > I don't think I got any notification. Thank for the fixes! > > I think I found the bug, based on the fact that so far all tests for > architectures that also need a cache op for device to cpu transitions > failed. I did a stupid typo when changing kconfig symbols, so please > try the patch below. Confirmed to work for nds32, so here is a git tree with the core, arc and nds32 fixes folded in, feel free to test that one: git://git.infradead.org/users/hch/misc.git generic-dma-noncoherent From mboxrd@z Thu Jan 1 00:00:00 1970 From: hch@lst.de Date: Thu, 26 Apr 2018 10:25:12 +0200 Subject: [OpenRISC] [PATCH 06/22] arc: use generic dma_noncoherent_ops In-Reply-To: <20180426064500.GB13895@lst.de> References: <20180420080313.18796-1-hch@lst.de> <20180420080313.18796-7-hch@lst.de> <1524655020.5315.9.camel@synopsys.com> <20180426064500.GB13895@lst.de> Message-ID: <20180426082512.GB15580@lst.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: openrisc@lists.librecores.org On Thu, Apr 26, 2018 at 08:45:00AM +0200, hch at lst.de wrote: > On Wed, Apr 25, 2018 at 11:17:01AM +0000, Alexey Brodkin wrote: > > Which is actually strange as I would expect ARC code to be built by bots. > > I don't think I got any notification. Thank for the fixes! > > I think I found the bug, based on the fact that so far all tests for > architectures that also need a cache op for device to cpu transitions > failed. I did a stupid typo when changing kconfig symbols, so please > try the patch below. Confirmed to work for nds32, so here is a git tree with the core, arc and nds32 fixes folded in, feel free to test that one: git://git.infradead.org/users/hch/misc.git generic-dma-noncoherent