From mboxrd@z Thu Jan 1 00:00:00 1970 From: Wei Liu Subject: Re: [PATCH RESEND v1 4/7] x86: add intel processor trace context Date: Thu, 26 Apr 2018 13:11:37 +0100 Message-ID: <20180426121137.xsum64x43yq5ww3p@citrix.com> References: <1516039953-2988-1-git-send-email-luwei.kang@intel.com> <1516039953-2988-5-git-send-email-luwei.kang@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Content-Disposition: inline In-Reply-To: <1516039953-2988-5-git-send-email-luwei.kang@intel.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" To: Luwei Kang Cc: kevin.tian@intel.com, sstabellini@kernel.org, wei.liu2@citrix.com, jbeulich@suse.com, George.Dunlap@eu.citrix.com, andrew.cooper3@citrix.com, tim@xen.org, xen-devel@lists.xen.org, jun.nakajima@intel.com List-Id: xen-devel@lists.xenproject.org T24gVHVlLCBKYW4gMTYsIDIwMTggYXQgMDI6MTI6MzBBTSArMDgwMCwgTHV3ZWkgS2FuZyB3cm90 ZToKPiAgCj4gKyNpbmNsdWRlIDxhc20vbXNyLWluZGV4Lmg+Cj4gKwo+ICtzdHJ1Y3QgcHRfY3R4 IHsKPiArICAgIHU2NCBjdGw7Cj4gKyAgICB1NjQgc3RhdHVzOwo+ICsgICAgdTY0IG91dHB1dF9i YXNlOwo+ICsgICAgdTY0IG91dHB1dF9tYXNrOwo+ICsgICAgdTY0IGNyM19tYXRjaDsKPiArICAg IHU2NCBhZGRyW05VTV9NU1JfSUEzMl9SVElUX0FERFJdOwoKdWludDY0X3QgcGxlYXNlLgoKPiAr fTsKPiArCj4gK3N0cnVjdCBwdF9kZXNjIHsKPiArICAgIGJvb2wgaW50ZWxfcHRfZW5hYmxlZDsK Ckp1c3QgImVuYWJsZWQiIGlzIGZpbmUuCgo+ICsgICAgdW5zaWduZWQgaW50IGFkZHJfbnVtOwoK bnVtX2FkZHIuCgpfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f XwpYZW4tZGV2ZWwgbWFpbGluZyBsaXN0Clhlbi1kZXZlbEBsaXN0cy54ZW5wcm9qZWN0Lm9yZwpo dHRwczovL2xpc3RzLnhlbnByb2plY3Qub3JnL21haWxtYW4vbGlzdGluZm8veGVuLWRldmVs