[U-Boot] [PATCH v2 4/7] arm: v7: Kconfig: Introduce SYS_ARM_CACHE_CP15

[Lokesh Vutla <lokeshvutla@ti.com>]

Certain ARM architectures like ARMv7-A, ARMv7-R has support for
enabling caches using CP15 registers. To have a common support
for all these architectures, introduce a Kconfig symbol
SYS_ARM_CACHE_CP15 that selects cache-cp15.c

Tested-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---
 arch/arm/Kconfig      | 7 +++++++
 arch/arm/lib/Makefile | 6 +-----
 2 files changed, 8 insertions(+), 5 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 8854227d9a..8efaccbcb8 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -74,8 +74,15 @@ config ARM_ASM_UNIFIED
 config THUMB2_KERNEL
 	bool
 
+config SYS_ARM_CACHE_CP15
+	bool "CP15 based cache enabling support"
+	help
+	  Select this if your processor suports enabling caches by using
+	  CP15 registers.
+
 config SYS_ARM_MMU
 	bool "MMU-based Paged Memory Management Support"
+	select SYS_ARM_CACHE_CP15
 	help
 	  Select if you want MMU-based virtualised addressing space
 	  support by paged memory management.
diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
index 3d3085e917..39c0c693dc 100644
--- a/arch/arm/lib/Makefile
+++ b/arch/arm/lib/Makefile
@@ -63,11 +63,7 @@ obj-y	+= reset.o
 endif
 
 obj-y	+= cache.o
-ifndef CONFIG_ARM64
-ifndef CONFIG_CPU_V7M
-obj-y	+= cache-cp15.o
-endif
-endif
+obj-$(CONFIG_SYS_ARM_CACHE_CP15)	+= cache-cp15.o
 
 obj-y	+= psci-dt.o
 
-- 
2.17.0