From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756972AbeDZQy0 (ORCPT ); Thu, 26 Apr 2018 12:54:26 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:58064 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756872AbeDZQyD (ORCPT ); Thu, 26 Apr 2018 12:54:03 -0400 From: Kieran Bingham To: linux-renesas-soc@vger.kernel.org Cc: Kieran Bingham , Takeshi Kihara , Simon Horman , Magnus Damm , Rob Herring , Mark Rutland , Catalin Marinas , Will Deacon , devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-arm-kernel@lists.infradead.org (moderated list:ARM64 PORT (AARCH64 ARCHITECTURE)), linux-kernel@vger.kernel.org (open list) Subject: [PATCH 10/17] arm64: dts: r8a77965: Add FCPF and FCPV instances Date: Thu, 26 Apr 2018 17:53:39 +0100 Message-Id: <20180426165346.494-11-kieran.bingham+renesas@ideasonboard.com> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180426165346.494-1-kieran.bingham+renesas@ideasonboard.com> References: <20180426165346.494-1-kieran.bingham+renesas@ideasonboard.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The FCPs handle the interface between various IP cores and memory. Add the instances related to the FDPs and VSP2s. Based on a similar patch of the R8A7796 device tree by Laurent Pinchart . Signed-off-by: Takeshi Kihara [Kieran: Rebase to top of tree] Signed-off-by: Kieran Bingham --- arch/arm64/boot/dts/renesas/r8a77965.dtsi | 40 +++++++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi index 894903a59bdc..1f44ed7c1b1c 100644 --- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi @@ -1001,6 +1001,46 @@ /* placeholder */ }; + fcpf0: fcp@fe950000 { + compatible = "renesas,fcpf"; + reg = <0 0xfe950000 0 0x200>; + clocks = <&cpg CPG_MOD 615>; + power-domains = <&sysc R8A77965_PD_A3VP>; + resets = <&cpg 615>; + }; + + fcpvb0: fcp@fe96f000 { + compatible = "renesas,fcpv"; + reg = <0 0xfe96f000 0 0x200>; + clocks = <&cpg CPG_MOD 607>; + power-domains = <&sysc R8A77965_PD_A3VP>; + resets = <&cpg 607>; + }; + + fcpvi0: fcp@fe9af000 { + compatible = "renesas,fcpv"; + reg = <0 0xfe9af000 0 0x200>; + clocks = <&cpg CPG_MOD 611>; + power-domains = <&sysc R8A77965_PD_A3VP>; + resets = <&cpg 611>; + }; + + fcpvd0: fcp@fea27000 { + compatible = "renesas,fcpv"; + reg = <0 0xfea27000 0 0x200>; + clocks = <&cpg CPG_MOD 603>; + power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; + resets = <&cpg 603>; + }; + + fcpvd1: fcp@fea2f000 { + compatible = "renesas,fcpv"; + reg = <0 0xfea2f000 0 0x200>; + clocks = <&cpg CPG_MOD 602>; + power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; + resets = <&cpg 602>; + }; + csi20: csi2@fea80000 { reg = <0 0xfea80000 0 0x10000>; /* placeholder */ -- 2.17.0 From mboxrd@z Thu Jan 1 00:00:00 1970 From: Kieran Bingham Subject: [PATCH 10/17] arm64: dts: r8a77965: Add FCPF and FCPV instances Date: Thu, 26 Apr 2018 17:53:39 +0100 Message-ID: <20180426165346.494-11-kieran.bingham+renesas@ideasonboard.com> References: <20180426165346.494-1-kieran.bingham+renesas@ideasonboard.com> Return-path: In-Reply-To: <20180426165346.494-1-kieran.bingham+renesas@ideasonboard.com> Sender: linux-kernel-owner@vger.kernel.org To: linux-renesas-soc@vger.kernel.org Cc: Kieran Bingham , Takeshi Kihara , Simon Horman , Magnus Damm , Rob Herring , Mark Rutland , Catalin Marinas , Will Deacon , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , "moderated list:ARM64 PORT AARCH64 ARCHITECTURE" , open list List-Id: devicetree@vger.kernel.org The FCPs handle the interface between various IP cores and memory. Add the instances related to the FDPs and VSP2s. Based on a similar patch of the R8A7796 device tree by Laurent Pinchart . Signed-off-by: Takeshi Kihara [Kieran: Rebase to top of tree] Signed-off-by: Kieran Bingham --- arch/arm64/boot/dts/renesas/r8a77965.dtsi | 40 +++++++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi index 894903a59bdc..1f44ed7c1b1c 100644 --- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi @@ -1001,6 +1001,46 @@ /* placeholder */ }; + fcpf0: fcp@fe950000 { + compatible = "renesas,fcpf"; + reg = <0 0xfe950000 0 0x200>; + clocks = <&cpg CPG_MOD 615>; + power-domains = <&sysc R8A77965_PD_A3VP>; + resets = <&cpg 615>; + }; + + fcpvb0: fcp@fe96f000 { + compatible = "renesas,fcpv"; + reg = <0 0xfe96f000 0 0x200>; + clocks = <&cpg CPG_MOD 607>; + power-domains = <&sysc R8A77965_PD_A3VP>; + resets = <&cpg 607>; + }; + + fcpvi0: fcp@fe9af000 { + compatible = "renesas,fcpv"; + reg = <0 0xfe9af000 0 0x200>; + clocks = <&cpg CPG_MOD 611>; + power-domains = <&sysc R8A77965_PD_A3VP>; + resets = <&cpg 611>; + }; + + fcpvd0: fcp@fea27000 { + compatible = "renesas,fcpv"; + reg = <0 0xfea27000 0 0x200>; + clocks = <&cpg CPG_MOD 603>; + power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; + resets = <&cpg 603>; + }; + + fcpvd1: fcp@fea2f000 { + compatible = "renesas,fcpv"; + reg = <0 0xfea2f000 0 0x200>; + clocks = <&cpg CPG_MOD 602>; + power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; + resets = <&cpg 602>; + }; + csi20: csi2@fea80000 { reg = <0 0xfea80000 0 0x10000>; /* placeholder */ -- 2.17.0 From mboxrd@z Thu Jan 1 00:00:00 1970 From: kieran.bingham+renesas@ideasonboard.com (Kieran Bingham) Date: Thu, 26 Apr 2018 17:53:39 +0100 Subject: [PATCH 10/17] arm64: dts: r8a77965: Add FCPF and FCPV instances In-Reply-To: <20180426165346.494-1-kieran.bingham+renesas@ideasonboard.com> References: <20180426165346.494-1-kieran.bingham+renesas@ideasonboard.com> Message-ID: <20180426165346.494-11-kieran.bingham+renesas@ideasonboard.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org The FCPs handle the interface between various IP cores and memory. Add the instances related to the FDPs and VSP2s. Based on a similar patch of the R8A7796 device tree by Laurent Pinchart . Signed-off-by: Takeshi Kihara [Kieran: Rebase to top of tree] Signed-off-by: Kieran Bingham --- arch/arm64/boot/dts/renesas/r8a77965.dtsi | 40 +++++++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi index 894903a59bdc..1f44ed7c1b1c 100644 --- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi @@ -1001,6 +1001,46 @@ /* placeholder */ }; + fcpf0: fcp at fe950000 { + compatible = "renesas,fcpf"; + reg = <0 0xfe950000 0 0x200>; + clocks = <&cpg CPG_MOD 615>; + power-domains = <&sysc R8A77965_PD_A3VP>; + resets = <&cpg 615>; + }; + + fcpvb0: fcp at fe96f000 { + compatible = "renesas,fcpv"; + reg = <0 0xfe96f000 0 0x200>; + clocks = <&cpg CPG_MOD 607>; + power-domains = <&sysc R8A77965_PD_A3VP>; + resets = <&cpg 607>; + }; + + fcpvi0: fcp at fe9af000 { + compatible = "renesas,fcpv"; + reg = <0 0xfe9af000 0 0x200>; + clocks = <&cpg CPG_MOD 611>; + power-domains = <&sysc R8A77965_PD_A3VP>; + resets = <&cpg 611>; + }; + + fcpvd0: fcp at fea27000 { + compatible = "renesas,fcpv"; + reg = <0 0xfea27000 0 0x200>; + clocks = <&cpg CPG_MOD 603>; + power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; + resets = <&cpg 603>; + }; + + fcpvd1: fcp at fea2f000 { + compatible = "renesas,fcpv"; + reg = <0 0xfea2f000 0 0x200>; + clocks = <&cpg CPG_MOD 602>; + power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; + resets = <&cpg 602>; + }; + csi20: csi2 at fea80000 { reg = <0 0xfea80000 0 0x10000>; /* placeholder */ -- 2.17.0