* [MODERATED] [PATCH v6 00/11] [PATCH v6] Patches formerly known as SSB or MDD
@ 2018-04-26 23:48 konrad.wilk
2018-04-27 1:59 ` [MODERATED] " Konrad Rzeszutek Wilk
0 siblings, 1 reply; 2+ messages in thread
From: konrad.wilk @ 2018-04-26 23:48 UTC (permalink / raw)
To: speck
Since v5:
- Rebase on v4.17-rc2, retested on Skylake
- Added Reviewed-by from Boris
- Fixed up per Boris's review.
Since v4
- Added support for bit(4) of X86_FEATURE_ARCH_CAPABILITIES
- Created bugzilla to hold the existing Intel docs
- Have three CPU flags for all of this:
X86_BUG_SPEC_STORE_BYPASS - CPU is susceptible.
X86_FEATURE_RDS - CPU is able to turn off speculative store bypass
X86_FEATURE_SPEC_STORE_BYPASS_DISABLE - engage the mitigation
- Fixed my EFI build issue
- Extra patch (now up to 10) to deal with SPEC_CTRL whitelist so
we don't try to WRMSRL SPEC_CTRL_RDS (Bit 2) on AMD machines.
Since v3:
- Fixed it per Boris's review.
- Added Tim's comments.
Things folks already know, but just in case you are new:
- The titles are obfuscated as Subject: are not encrypted. Nor are the
MIME attachment file names.
- The cover letter subject is also mangled as I can't say spec_store_bypass_disable
in the title.
- The Suggested-by and Reviewed-by have an XX in front of them so that
git send-email does not include the CC on the mailbox file.
Here is the diffstat including the non-scrambled names of the patches.
Documentation/admin-guide/kernel-parameters.txt | 32 ++++
arch/x86/include/asm/cpufeatures.h | 3 +
arch/x86/include/asm/msr-index.h | 2 +
arch/x86/include/asm/nospec-branch.h | 41 ++++-
arch/x86/kernel/cpu/amd.c | 16 ++
arch/x86/kernel/cpu/bugs.c | 233 ++++++++++++++++++++++--
arch/x86/kernel/cpu/common.c | 46 +++--
arch/x86/kernel/cpu/intel.c | 6 +
arch/x86/kvm/cpuid.c | 2 +-
arch/x86/kvm/svm.c | 6 +-
arch/x86/kvm/vmx.c | 14 +-
drivers/base/cpu.c | 8 +
include/linux/cpu.h | 2 +
13 files changed, 368 insertions(+), 43 deletions(-)
Konrad Rzeszutek Wilk (10):
x86/bugs: Concentrate bug detection into a separate function
x86/bugs: Concentrate bug reporting into a separate function
x86/bugs: Read SPEC_CTRL MSR during boot and re-use reserved bits.
KVM/SVM/VMX/x86/bugs: Support the combination of guest IBRS and ours.
x86/bugs: Expose the /sys/../spec_store_bypass and X86_BUG_SPEC_STORE_BYPASS
x86/bugs: Provide boot parameters for the spec_store_bypass_disable mitigation
x86/bugs/Intel: set proper CPU features and latch mitigation for RDS
x86/bugs: Whitelist allowed SPEC_CTRL MSR values
x86/bugs/AMD: Add support to disable RDS on Fam[15,16,17]h if requested
x86/KVM/VMX: Expose SPEC_CTRL Bit(2) to the guest
^ permalink raw reply [flat|nested] 2+ messages in thread
* [MODERATED] Re: [PATCH v6 00/11] [PATCH v6] Patches formerly known as SSB or MDD
2018-04-26 23:48 [MODERATED] [PATCH v6 00/11] [PATCH v6] Patches formerly known as SSB or MDD konrad.wilk
@ 2018-04-27 1:59 ` Konrad Rzeszutek Wilk
0 siblings, 0 replies; 2+ messages in thread
From: Konrad Rzeszutek Wilk @ 2018-04-27 1:59 UTC (permalink / raw)
To: speck
[-- Attachment #1: Type: text/plain, Size: 129 bytes --]
> Here is the diffstat including the non-scrambled names of the patches.
And the tgz of them for easy 'git am' process/testing.
[-- Attachment #2: spec_store_bypass_disable.v6.tgz --]
[-- Type: application/gzip, Size: 14650 bytes --]
^ permalink raw reply [flat|nested] 2+ messages in thread
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2018-04-26 23:48 [MODERATED] [PATCH v6 00/11] [PATCH v6] Patches formerly known as SSB or MDD konrad.wilk
2018-04-27 1:59 ` [MODERATED] " Konrad Rzeszutek Wilk
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