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From: Vasily Khoruzhick <anarsoul@gmail.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 1/2] sunxi-mmc: use new mode on A64
Date: Sat, 28 Apr 2018 14:16:27 -0700	[thread overview]
Message-ID: <20180428211628.13753-2-anarsoul@gmail.com> (raw)
In-Reply-To: <20180428211628.13753-1-anarsoul@gmail.com>

That is necessary for using automatic calibration on A64 eMMC.

Signed-off-by: Vasily khoruzhick <anarsoul@gmail.com>
---
 arch/arm/mach-sunxi/Kconfig | 1 +
 drivers/mmc/sunxi_mmc.c     | 4 ++++
 2 files changed, 5 insertions(+)

diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
index b868f0e350..774a39f580 100644
--- a/arch/arm/mach-sunxi/Kconfig
+++ b/arch/arm/mach-sunxi/Kconfig
@@ -256,6 +256,7 @@ config MACH_SUN50I
 	select SUNXI_DE2
 	select SUNXI_GEN_SUN6I
 	select SUNXI_HIGH_SRAM
+	select MMC_SUNXI_HAS_NEW_MODE
 	select SUPPORT_SPL
 	select SUNXI_DRAM_DW
 	select SUNXI_DRAM_DW_32BIT
diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
index df6f32850e..06b0fd491c 100644
--- a/drivers/mmc/sunxi_mmc.c
+++ b/drivers/mmc/sunxi_mmc.c
@@ -167,8 +167,12 @@ static int mmc_set_mod_clk(struct sunxi_mmc_priv *priv, unsigned int hz)
 
 	if (new_mode) {
 #ifdef CONFIG_MMC_SUNXI_HAS_NEW_MODE
+#ifdef CONFIG_MACH_SUN50I
+		val = 0;
+#else
 		val = CCM_MMC_CTRL_MODE_SEL_NEW;
 		setbits_le32(&priv->reg->ntsr, SUNXI_MMC_NTSR_MODE_SEL_NEW);
+#endif
 #endif
 	} else {
 		val = CCM_MMC_CTRL_OCLK_DLY(oclk_dly) |
-- 
2.17.0

  reply	other threads:[~2018-04-28 21:16 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-04-28 21:16 [U-Boot] [PATCH 0/2] sunxi: fix eMMC stability issues on A64 Vasily Khoruzhick
2018-04-28 21:16 ` Vasily Khoruzhick [this message]
2018-05-02 12:04   ` [U-Boot] [PATCH 1/2] sunxi-mmc: use new mode " Maxime Ripard
2018-04-28 21:16 ` [U-Boot] [PATCH 2/2] mmc: sunxi: run calibration " Vasily Khoruzhick
2018-05-02 12:09   ` Maxime Ripard

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