From mboxrd@z Thu Jan 1 00:00:00 1970 From: Sascha Hauer Subject: Re: [PATCH 4/6] pinctrl: fsl: add scu based pinctrl support Date: Wed, 2 May 2018 17:05:07 +0200 Message-ID: <20180502150507.pdqcrhsx3fkh3yof@pengutronix.de> References: <1524855713-15527-1-git-send-email-aisheng.dong@nxp.com> <1524855713-15527-5-git-send-email-aisheng.dong@nxp.com> <20180502123638.qgolj3h6ycbx6aas@pengutronix.de> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Content-Disposition: inline In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: Linus Walleij Cc: Dong Aisheng , Dong Aisheng , Shawn Guo , Stefan Agner , "open list:GPIO SUBSYSTEM" , NXP Linux Team , Sascha Hauer , Fabio Estevam , Fabio Estevam , Linux ARM List-Id: linux-gpio@vger.kernel.org On Wed, May 02, 2018 at 03:03:04PM +0200, Linus Walleij wrote: > On Wed, May 2, 2018 at 2:36 PM, Sascha Hauer wrote: > > Hi Linus, > > > > On Wed, May 02, 2018 at 02:29:04PM +0200, Linus Walleij wrote: > >> On Wed, May 2, 2018 at 2:27 PM, Linus Walleij wrote: > >> > On Fri, Apr 27, 2018 at 9:01 PM, Dong Aisheng wrote: > >> > > >> >> Some i.MX SoCs (e.g. MX8QXP and MX8QM) contain a system controller > >> >> that is responsible for controlling the pad setting of the IPs that > >> >> are present. Communication between the host processor running an OS > >> >> and the system controller happens through a SCU protocol. > >> >> This patch adds SCU protocol based pinctrl drivers. > >> >> > >> >> Cc: Linus Walleij > >> >> Cc: Shawn Guo > >> >> Cc: Fabio Estevam > >> >> Cc: Stefan Agner > >> >> Cc: Pengutronix Kernel Team > >> >> Signed-off-by: Dong Aisheng > >> > > >> > Patch applied. > >> > >> Bah on second thought holding this back since I see thyere are > >> some discussions about the bindings in the next patch. > > > > Also note that this patch depends on the SCU base support posted elsewhere > > as Dong mentioned in his introductory mail. > > Aha is that a compile-time dependence? Yes. > > I guess it would be better if it is one big series if it is supposed > to be merged in one big series. The SCU is a coprocessor that provides pinctrl, clk, power domain and other misc stuff, so posting this as multiple series should be the way to go. Sascha -- Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | From mboxrd@z Thu Jan 1 00:00:00 1970 From: s.hauer@pengutronix.de (Sascha Hauer) Date: Wed, 2 May 2018 17:05:07 +0200 Subject: [PATCH 4/6] pinctrl: fsl: add scu based pinctrl support In-Reply-To: References: <1524855713-15527-1-git-send-email-aisheng.dong@nxp.com> <1524855713-15527-5-git-send-email-aisheng.dong@nxp.com> <20180502123638.qgolj3h6ycbx6aas@pengutronix.de> Message-ID: <20180502150507.pdqcrhsx3fkh3yof@pengutronix.de> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Wed, May 02, 2018 at 03:03:04PM +0200, Linus Walleij wrote: > On Wed, May 2, 2018 at 2:36 PM, Sascha Hauer wrote: > > Hi Linus, > > > > On Wed, May 02, 2018 at 02:29:04PM +0200, Linus Walleij wrote: > >> On Wed, May 2, 2018 at 2:27 PM, Linus Walleij wrote: > >> > On Fri, Apr 27, 2018 at 9:01 PM, Dong Aisheng wrote: > >> > > >> >> Some i.MX SoCs (e.g. MX8QXP and MX8QM) contain a system controller > >> >> that is responsible for controlling the pad setting of the IPs that > >> >> are present. Communication between the host processor running an OS > >> >> and the system controller happens through a SCU protocol. > >> >> This patch adds SCU protocol based pinctrl drivers. > >> >> > >> >> Cc: Linus Walleij > >> >> Cc: Shawn Guo > >> >> Cc: Fabio Estevam > >> >> Cc: Stefan Agner > >> >> Cc: Pengutronix Kernel Team > >> >> Signed-off-by: Dong Aisheng > >> > > >> > Patch applied. > >> > >> Bah on second thought holding this back since I see thyere are > >> some discussions about the bindings in the next patch. > > > > Also note that this patch depends on the SCU base support posted elsewhere > > as Dong mentioned in his introductory mail. > > Aha is that a compile-time dependence? Yes. > > I guess it would be better if it is one big series if it is supposed > to be merged in one big series. The SCU is a coprocessor that provides pinctrl, clk, power domain and other misc stuff, so posting this as multiple series should be the way to go. Sascha -- Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |