From mboxrd@z Thu Jan 1 00:00:00 1970 From: Shawn Guo Subject: Re: [PATCH v2 03/15] clk: imx7d: fix mipi dphy div parent Date: Thu, 3 May 2018 09:08:12 +0800 Message-ID: <20180503010810.GN3443@dragon> References: <20180423134750.30403-1-rui.silva@linaro.org> <20180423134750.30403-4-rui.silva@linaro.org> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Content-Disposition: inline In-Reply-To: <20180423134750.30403-4-rui.silva@linaro.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: driverdev-devel-bounces@linuxdriverproject.org Sender: "devel" To: Rui Miguel Silva , Anson Huang Cc: devel@driverdev.osuosl.org, devicetree@vger.kernel.org, sakari.ailus@linux.intel.com, Greg Kroah-Hartman , Ryan Harkin , Rob Herring , linux-imx@nxp.com, Philipp Zabel , Steve Longerbeam , Fabio Estevam , mchehab@kernel.org, linux-clk@vger.kernel.org, linux-media@vger.kernel.org List-Id: devicetree@vger.kernel.org Anson, Please have a look at this change. Shawn On Mon, Apr 23, 2018 at 02:47:38PM +0100, Rui Miguel Silva wrote: > Fix the mipi dphy root divider to mipi_dphy_pre_div, this would remove a orphan > clock and set the correct parent. > > before: > cat clk_orphan_summary > enable prepare protect > clock count count count rate accuracy phase > ---------------------------------------------------------------------------------------- > mipi_dphy_post_div 1 1 0 0 0 0 > mipi_dphy_root_clk 1 1 0 0 0 0 > > cat clk_dump | grep mipi_dphy > mipi_dphy_post_div 1 1 0 0 0 0 > mipi_dphy_root_clk 1 1 0 0 0 0 > > after: > cat clk_dump | grep mipi_dphy > mipi_dphy_src 1 1 0 24000000 0 0 > mipi_dphy_cg 1 1 0 24000000 0 0 > mipi_dphy_pre_div 1 1 0 24000000 0 0 > mipi_dphy_post_div 1 1 0 24000000 0 0 > mipi_dphy_root_clk 1 1 0 24000000 0 0 > > Cc: linux-clk@vger.kernel.org > Signed-off-by: Rui Miguel Silva > > Signed-off-by: Rui Miguel Silva > --- > drivers/clk/imx/clk-imx7d.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/clk/imx/clk-imx7d.c b/drivers/clk/imx/clk-imx7d.c > index 975a20d3cc94..f7f4db2e6fa6 100644 > --- a/drivers/clk/imx/clk-imx7d.c > +++ b/drivers/clk/imx/clk-imx7d.c > @@ -729,7 +729,7 @@ static void __init imx7d_clocks_init(struct device_node *ccm_node) > clks[IMX7D_LCDIF_PIXEL_ROOT_DIV] = imx_clk_divider2("lcdif_pixel_post_div", "lcdif_pixel_pre_div", base + 0xa300, 0, 6); > clks[IMX7D_MIPI_DSI_ROOT_DIV] = imx_clk_divider2("mipi_dsi_post_div", "mipi_dsi_pre_div", base + 0xa380, 0, 6); > clks[IMX7D_MIPI_CSI_ROOT_DIV] = imx_clk_divider2("mipi_csi_post_div", "mipi_csi_pre_div", base + 0xa400, 0, 6); > - clks[IMX7D_MIPI_DPHY_ROOT_DIV] = imx_clk_divider2("mipi_dphy_post_div", "mipi_csi_dphy_div", base + 0xa480, 0, 6); > + clks[IMX7D_MIPI_DPHY_ROOT_DIV] = imx_clk_divider2("mipi_dphy_post_div", "mipi_dphy_pre_div", base + 0xa480, 0, 6); > clks[IMX7D_SAI1_ROOT_DIV] = imx_clk_divider2("sai1_post_div", "sai1_pre_div", base + 0xa500, 0, 6); > clks[IMX7D_SAI2_ROOT_DIV] = imx_clk_divider2("sai2_post_div", "sai2_pre_div", base + 0xa580, 0, 6); > clks[IMX7D_SAI3_ROOT_DIV] = imx_clk_divider2("sai3_post_div", "sai3_pre_div", base + 0xa600, 0, 6); > -- > 2.17.0 > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-path: Received: from mail.kernel.org ([198.145.29.99]:42770 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751745AbeECBI3 (ORCPT ); Wed, 2 May 2018 21:08:29 -0400 Date: Thu, 3 May 2018 09:08:12 +0800 From: Shawn Guo To: Rui Miguel Silva , Anson Huang Cc: mchehab@kernel.org, sakari.ailus@linux.intel.com, Steve Longerbeam , Philipp Zabel , Rob Herring , linux-media@vger.kernel.org, devel@driverdev.osuosl.org, Fabio Estevam , devicetree@vger.kernel.org, Greg Kroah-Hartman , Ryan Harkin , linux-clk@vger.kernel.org, linux-imx@nxp.com Subject: Re: [PATCH v2 03/15] clk: imx7d: fix mipi dphy div parent Message-ID: <20180503010810.GN3443@dragon> References: <20180423134750.30403-1-rui.silva@linaro.org> <20180423134750.30403-4-rui.silva@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20180423134750.30403-4-rui.silva@linaro.org> Sender: linux-media-owner@vger.kernel.org List-ID: Anson, Please have a look at this change. Shawn On Mon, Apr 23, 2018 at 02:47:38PM +0100, Rui Miguel Silva wrote: > Fix the mipi dphy root divider to mipi_dphy_pre_div, this would remove a orphan > clock and set the correct parent. > > before: > cat clk_orphan_summary > enable prepare protect > clock count count count rate accuracy phase > ---------------------------------------------------------------------------------------- > mipi_dphy_post_div 1 1 0 0 0 0 > mipi_dphy_root_clk 1 1 0 0 0 0 > > cat clk_dump | grep mipi_dphy > mipi_dphy_post_div 1 1 0 0 0 0 > mipi_dphy_root_clk 1 1 0 0 0 0 > > after: > cat clk_dump | grep mipi_dphy > mipi_dphy_src 1 1 0 24000000 0 0 > mipi_dphy_cg 1 1 0 24000000 0 0 > mipi_dphy_pre_div 1 1 0 24000000 0 0 > mipi_dphy_post_div 1 1 0 24000000 0 0 > mipi_dphy_root_clk 1 1 0 24000000 0 0 > > Cc: linux-clk@vger.kernel.org > Signed-off-by: Rui Miguel Silva > > Signed-off-by: Rui Miguel Silva > --- > drivers/clk/imx/clk-imx7d.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/clk/imx/clk-imx7d.c b/drivers/clk/imx/clk-imx7d.c > index 975a20d3cc94..f7f4db2e6fa6 100644 > --- a/drivers/clk/imx/clk-imx7d.c > +++ b/drivers/clk/imx/clk-imx7d.c > @@ -729,7 +729,7 @@ static void __init imx7d_clocks_init(struct device_node *ccm_node) > clks[IMX7D_LCDIF_PIXEL_ROOT_DIV] = imx_clk_divider2("lcdif_pixel_post_div", "lcdif_pixel_pre_div", base + 0xa300, 0, 6); > clks[IMX7D_MIPI_DSI_ROOT_DIV] = imx_clk_divider2("mipi_dsi_post_div", "mipi_dsi_pre_div", base + 0xa380, 0, 6); > clks[IMX7D_MIPI_CSI_ROOT_DIV] = imx_clk_divider2("mipi_csi_post_div", "mipi_csi_pre_div", base + 0xa400, 0, 6); > - clks[IMX7D_MIPI_DPHY_ROOT_DIV] = imx_clk_divider2("mipi_dphy_post_div", "mipi_csi_dphy_div", base + 0xa480, 0, 6); > + clks[IMX7D_MIPI_DPHY_ROOT_DIV] = imx_clk_divider2("mipi_dphy_post_div", "mipi_dphy_pre_div", base + 0xa480, 0, 6); > clks[IMX7D_SAI1_ROOT_DIV] = imx_clk_divider2("sai1_post_div", "sai1_pre_div", base + 0xa500, 0, 6); > clks[IMX7D_SAI2_ROOT_DIV] = imx_clk_divider2("sai2_post_div", "sai2_pre_div", base + 0xa580, 0, 6); > clks[IMX7D_SAI3_ROOT_DIV] = imx_clk_divider2("sai3_post_div", "sai3_pre_div", base + 0xa600, 0, 6); > -- > 2.17.0 >