From: Chris Wilson <chris@chris-wilson.co.uk>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 31/71] drm/i915: Separate sideband declarations to intel_sideband.h
Date: Thu, 3 May 2018 07:37:17 +0100 [thread overview]
Message-ID: <20180503063757.22238-31-chris@chris-wilson.co.uk> (raw)
In-Reply-To: <20180503063757.22238-1-chris@chris-wilson.co.uk>
Split the sideback declarations out of the ginormous i915_drv.h
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/i915_debugfs.c | 2 +
drivers/gpu/drm/i915/i915_drv.h | 62 ---------------------
drivers/gpu/drm/i915/i915_sysfs.c | 2 +
drivers/gpu/drm/i915/intel_cdclk.c | 1 +
drivers/gpu/drm/i915/intel_display.c | 19 ++++---
drivers/gpu/drm/i915/intel_dp.c | 6 +-
drivers/gpu/drm/i915/intel_dpio_phy.c | 1 +
drivers/gpu/drm/i915/intel_dsi.c | 7 ++-
drivers/gpu/drm/i915/intel_dsi_pll.c | 4 +-
drivers/gpu/drm/i915/intel_dsi_vbt.c | 11 +++-
drivers/gpu/drm/i915/intel_hdmi.c | 5 +-
drivers/gpu/drm/i915/intel_pm.c | 7 ++-
drivers/gpu/drm/i915/intel_runtime_pm.c | 1 +
drivers/gpu/drm/i915/intel_sideband.c | 2 +
drivers/gpu/drm/i915/intel_sideband.h | 73 +++++++++++++++++++++++++
15 files changed, 123 insertions(+), 80 deletions(-)
create mode 100644 drivers/gpu/drm/i915/intel_sideband.h
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index ef9e7f590f5e..b61de2838bd7 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -29,8 +29,10 @@
#include <linux/debugfs.h>
#include <linux/sort.h>
#include <linux/sched/mm.h>
+
#include "intel_drv.h"
#include "intel_guc_submission.h"
+#include "intel_sideband.h"
static inline struct drm_i915_private *node_to_i915(struct drm_info_node *node)
{
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index e712cc9c82a5..ff810ee016a8 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -635,11 +635,6 @@ enum intel_pch {
PCH_NOP,
};
-enum intel_sbi_destination {
- SBI_ICLK,
- SBI_MPHY,
-};
-
#define QUIRK_LVDS_SSC_DISABLE (1<<1)
#define QUIRK_INVERT_BRIGHTNESS (1<<2)
#define QUIRK_BACKLIGHT_PRESENT (1<<3)
@@ -3455,63 +3450,6 @@ int sandybridge_pcode_write_timeout(struct drm_i915_private *dev_priv, u32 mbox,
int skl_pcode_request(struct drm_i915_private *dev_priv, u32 mbox, u32 request,
u32 reply_mask, u32 reply, int timeout_base_ms);
-/* intel_sideband.c */
-
-enum {
- VLV_IOSF_SB_BUNIT,
- VLV_IOSF_SB_CCK,
- VLV_IOSF_SB_CCU,
- VLV_IOSF_SB_DPIO,
- VLV_IOSF_SB_FLISDSI,
- VLV_IOSF_SB_GPIO,
- VLV_IOSF_SB_NC,
- VLV_IOSF_SB_PUNIT,
-};
-
-void vlv_iosf_sb_get(struct drm_i915_private *dev_priv, unsigned long ports);
-u32 vlv_iosf_sb_read(struct drm_i915_private *dev_priv, u8 port, u32 reg);
-void vlv_iosf_sb_write(struct drm_i915_private *dev_priv, u8 port, u32 reg, u32 val);
-void vlv_iosf_sb_put(struct drm_i915_private *dev_priv, unsigned long ports);
-
-void vlv_punit_get(struct drm_i915_private *dev_priv);
-u32 vlv_punit_read(struct drm_i915_private *dev_priv, u32 addr);
-int vlv_punit_write(struct drm_i915_private *dev_priv, u32 addr, u32 val);
-void vlv_punit_put(struct drm_i915_private *dev_priv);
-
-void vlv_nc_get(struct drm_i915_private *dev_priv);
-u32 vlv_nc_read(struct drm_i915_private *dev_priv, u8 addr);
-void vlv_nc_put(struct drm_i915_private *dev_priv);
-
-void vlv_cck_get(struct drm_i915_private *dev_priv);
-u32 vlv_cck_read(struct drm_i915_private *dev_priv, u32 reg);
-void vlv_cck_write(struct drm_i915_private *dev_priv, u32 reg, u32 val);
-void vlv_cck_put(struct drm_i915_private *dev_priv);
-
-void vlv_ccu_get(struct drm_i915_private *dev_priv);
-u32 vlv_ccu_read(struct drm_i915_private *dev_priv, u32 reg);
-void vlv_ccu_write(struct drm_i915_private *dev_priv, u32 reg, u32 val);
-void vlv_ccu_put(struct drm_i915_private *dev_priv);
-
-void vlv_bunit_get(struct drm_i915_private *dev_priv);
-u32 vlv_bunit_read(struct drm_i915_private *dev_priv, u32 reg);
-void vlv_bunit_write(struct drm_i915_private *dev_priv, u32 reg, u32 val);
-void vlv_bunit_put(struct drm_i915_private *dev_priv);
-
-void vlv_dpio_get(struct drm_i915_private *dev_priv);
-u32 vlv_dpio_read(struct drm_i915_private *dev_priv, enum pipe pipe, int reg);
-void vlv_dpio_write(struct drm_i915_private *dev_priv, enum pipe pipe, int reg, u32 val);
-void vlv_dpio_put(struct drm_i915_private *dev_priv);
-
-void vlv_flisdsi_get(struct drm_i915_private *dev_priv);
-u32 vlv_flisdsi_read(struct drm_i915_private *dev_priv, u32 reg);
-void vlv_flisdsi_write(struct drm_i915_private *dev_priv, u32 reg, u32 val);
-void vlv_flisdsi_put(struct drm_i915_private *dev_priv);
-
-u32 intel_sbi_read(struct drm_i915_private *dev_priv, u16 reg,
- enum intel_sbi_destination destination);
-void intel_sbi_write(struct drm_i915_private *dev_priv, u16 reg, u32 value,
- enum intel_sbi_destination destination);
-
/* intel_dpio_phy.c */
void bxt_port_to_phy_channel(struct drm_i915_private *dev_priv, enum port port,
enum dpio_phy *phy, enum dpio_channel *ch);
diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c
index c98375ba79b4..55554697133b 100644
--- a/drivers/gpu/drm/i915/i915_sysfs.c
+++ b/drivers/gpu/drm/i915/i915_sysfs.c
@@ -29,7 +29,9 @@
#include <linux/module.h>
#include <linux/stat.h>
#include <linux/sysfs.h>
+
#include "intel_drv.h"
+#include "intel_sideband.h"
#include "i915_drv.h"
static inline struct drm_i915_private *kdev_minor_to_i915(struct device *kdev)
diff --git a/drivers/gpu/drm/i915/intel_cdclk.c b/drivers/gpu/drm/i915/intel_cdclk.c
index ad0c14bbb2e5..14f44b30c55d 100644
--- a/drivers/gpu/drm/i915/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/intel_cdclk.c
@@ -22,6 +22,7 @@
*/
#include "intel_drv.h"
+#include "intel_sideband.h"
/**
* DOC: CDCLK / RAWCLK
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 1007e589baa0..cd1a848a21ff 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -31,23 +31,26 @@
#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/vgaarb.h>
+#include <linux/dma_remapping.h>
+#include <linux/reservation.h>
+
#include <drm/drm_edid.h>
#include <drm/drmP.h>
-#include "intel_drv.h"
-#include "intel_frontbuffer.h"
#include <drm/i915_drm.h>
-#include "i915_drv.h"
-#include "i915_gem_clflush.h"
-#include "intel_dsi.h"
-#include "i915_trace.h"
#include <drm/drm_atomic.h>
#include <drm/drm_atomic_helper.h>
#include <drm/drm_dp_helper.h>
#include <drm/drm_crtc_helper.h>
#include <drm/drm_plane_helper.h>
#include <drm/drm_rect.h>
-#include <linux/dma_remapping.h>
-#include <linux/reservation.h>
+
+#include "i915_drv.h"
+#include "i915_gem_clflush.h"
+#include "i915_trace.h"
+#include "intel_dsi.h"
+#include "intel_drv.h"
+#include "intel_frontbuffer.h"
+#include "intel_sideband.h"
/* Primary plane formats for gen <= 3 */
static const uint32_t i8xx_primary_formats[] = {
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 3737b18bb209..02dc25906b0f 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -31,7 +31,9 @@
#include <linux/types.h>
#include <linux/notifier.h>
#include <linux/reboot.h>
+
#include <asm/byteorder.h>
+
#include <drm/drmP.h>
#include <drm/drm_atomic_helper.h>
#include <drm/drm_crtc.h>
@@ -39,9 +41,11 @@
#include <drm/drm_dp_helper.h>
#include <drm/drm_edid.h>
#include <drm/drm_hdcp.h>
-#include "intel_drv.h"
#include <drm/i915_drm.h>
+
#include "i915_drv.h"
+#include "intel_drv.h"
+#include "intel_sideband.h"
#define DP_DPRX_ESI_LEN 14
diff --git a/drivers/gpu/drm/i915/intel_dpio_phy.c b/drivers/gpu/drm/i915/intel_dpio_phy.c
index 79c449aabc7f..f2f2a953a2d3 100644
--- a/drivers/gpu/drm/i915/intel_dpio_phy.c
+++ b/drivers/gpu/drm/i915/intel_dpio_phy.c
@@ -22,6 +22,7 @@
*/
#include "intel_drv.h"
+#include "intel_sideband.h"
/**
* DOC: DPIO
diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
index 355aa8717af2..626c6791d018 100644
--- a/drivers/gpu/drm/i915/intel_dsi.c
+++ b/drivers/gpu/drm/i915/intel_dsi.c
@@ -23,17 +23,20 @@
* Author: Jani Nikula <jani.nikula@intel.com>
*/
+#include <linux/slab.h>
+#include <linux/gpio/consumer.h>
+
#include <drm/drmP.h>
#include <drm/drm_atomic_helper.h>
#include <drm/drm_crtc.h>
#include <drm/drm_edid.h>
#include <drm/i915_drm.h>
#include <drm/drm_mipi_dsi.h>
-#include <linux/slab.h>
-#include <linux/gpio/consumer.h>
+
#include "i915_drv.h"
#include "intel_drv.h"
#include "intel_dsi.h"
+#include "intel_sideband.h"
/* return pixels in terms of txbyteclkhs */
static u16 txbyteclkhs(u16 pixels, int bpp, int lane_count,
diff --git a/drivers/gpu/drm/i915/intel_dsi_pll.c b/drivers/gpu/drm/i915/intel_dsi_pll.c
index b73336e7dcd2..ebb3dba75d06 100644
--- a/drivers/gpu/drm/i915/intel_dsi_pll.c
+++ b/drivers/gpu/drm/i915/intel_dsi_pll.c
@@ -26,9 +26,11 @@
*/
#include <linux/kernel.h>
-#include "intel_drv.h"
+
#include "i915_drv.h"
+#include "intel_drv.h"
#include "intel_dsi.h"
+#include "intel_sideband.h"
static const u16 lfsr_converts[] = {
426, 469, 234, 373, 442, 221, 110, 311, 411, /* 62 - 70 */
diff --git a/drivers/gpu/drm/i915/intel_dsi_vbt.c b/drivers/gpu/drm/i915/intel_dsi_vbt.c
index 515ab68f319c..a97dcd653696 100644
--- a/drivers/gpu/drm/i915/intel_dsi_vbt.c
+++ b/drivers/gpu/drm/i915/intel_dsi_vbt.c
@@ -24,18 +24,23 @@
*
*/
+#include <linux/gpio/consumer.h>
+#include <linux/slab.h>
+
+#include <asm/intel-mid.h>
+
#include <drm/drmP.h>
#include <drm/drm_crtc.h>
#include <drm/drm_edid.h>
#include <drm/i915_drm.h>
-#include <linux/gpio/consumer.h>
-#include <linux/slab.h>
+
#include <video/mipi_display.h>
-#include <asm/intel-mid.h>
#include <video/mipi_display.h>
+
#include "i915_drv.h"
#include "intel_drv.h"
#include "intel_dsi.h"
+#include "intel_sideband.h"
#define MIPI_TRANSFER_MODE_SHIFT 0
#define MIPI_VIRTUAL_CHANNEL_SHIFT 1
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
index 4257209c75f3..0a3ecebdbebd 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -30,16 +30,19 @@
#include <linux/slab.h>
#include <linux/delay.h>
#include <linux/hdmi.h>
+
#include <drm/drmP.h>
#include <drm/drm_atomic_helper.h>
#include <drm/drm_crtc.h>
#include <drm/drm_edid.h>
#include <drm/drm_hdcp.h>
#include <drm/drm_scdc_helper.h>
-#include "intel_drv.h"
#include <drm/i915_drm.h>
#include <drm/intel_lpe_audio.h>
+
#include "i915_drv.h"
+#include "intel_drv.h"
+#include "intel_sideband.h"
static struct drm_device *intel_hdmi_to_dev(struct intel_hdmi *intel_hdmi)
{
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index dda6fac09952..354c1a9f5dd4 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -26,12 +26,15 @@
*/
#include <linux/cpufreq.h>
+#include <linux/module.h>
+
+#include <drm/drm_atomic_helper.h>
#include <drm/drm_plane_helper.h>
+
#include "i915_drv.h"
#include "intel_drv.h"
+#include "intel_sideband.h"
#include "../../../platform/x86/intel_ips.h"
-#include <linux/module.h>
-#include <drm/drm_atomic_helper.h>
/**
* DOC: RC6
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
index 8b92be53b5dc..713124b94fb6 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -31,6 +31,7 @@
#include "i915_drv.h"
#include "intel_drv.h"
+#include "intel_sideband.h"
/**
* DOC: runtime pm
diff --git a/drivers/gpu/drm/i915/intel_sideband.c b/drivers/gpu/drm/i915/intel_sideband.c
index 2d4e48e9e1d5..87e34787939b 100644
--- a/drivers/gpu/drm/i915/intel_sideband.c
+++ b/drivers/gpu/drm/i915/intel_sideband.c
@@ -24,6 +24,8 @@
#include <asm/iosf_mbi.h>
+#include "intel_sideband.h"
+
#include "i915_drv.h"
#include "intel_drv.h"
diff --git a/drivers/gpu/drm/i915/intel_sideband.h b/drivers/gpu/drm/i915/intel_sideband.h
new file mode 100644
index 000000000000..7204648eb9d4
--- /dev/null
+++ b/drivers/gpu/drm/i915/intel_sideband.h
@@ -0,0 +1,73 @@
+/* SPDX-License-Identifier: MIT */
+
+#ifndef _INTEL_SIDEBAND_H_
+#define _INTEL_SIDEBAND_H_
+
+#include <linux/types.h>
+
+struct drm_i915_private;
+enum pipe;
+
+enum {
+ VLV_IOSF_SB_BUNIT,
+ VLV_IOSF_SB_CCK,
+ VLV_IOSF_SB_CCU,
+ VLV_IOSF_SB_DPIO,
+ VLV_IOSF_SB_FLISDSI,
+ VLV_IOSF_SB_GPIO,
+ VLV_IOSF_SB_NC,
+ VLV_IOSF_SB_PUNIT,
+};
+
+void vlv_iosf_sb_get(struct drm_i915_private *i915, unsigned long ports);
+u32 vlv_iosf_sb_read(struct drm_i915_private *i915, u8 port, u32 reg);
+void vlv_iosf_sb_write(struct drm_i915_private *i915,
+ u8 port, u32 reg, u32 val);
+void vlv_iosf_sb_put(struct drm_i915_private *i915, unsigned long ports);
+
+void vlv_punit_get(struct drm_i915_private *i915);
+u32 vlv_punit_read(struct drm_i915_private *i915, u32 addr);
+int vlv_punit_write(struct drm_i915_private *i915, u32 addr, u32 val);
+void vlv_punit_put(struct drm_i915_private *i915);
+
+void vlv_nc_get(struct drm_i915_private *i915);
+u32 vlv_nc_read(struct drm_i915_private *i915, u8 addr);
+void vlv_nc_put(struct drm_i915_private *i915);
+
+void vlv_cck_get(struct drm_i915_private *i915);
+u32 vlv_cck_read(struct drm_i915_private *i915, u32 reg);
+void vlv_cck_write(struct drm_i915_private *i915, u32 reg, u32 val);
+void vlv_cck_put(struct drm_i915_private *i915);
+
+void vlv_ccu_get(struct drm_i915_private *i915);
+u32 vlv_ccu_read(struct drm_i915_private *i915, u32 reg);
+void vlv_ccu_write(struct drm_i915_private *i915, u32 reg, u32 val);
+void vlv_ccu_put(struct drm_i915_private *i915);
+
+void vlv_bunit_get(struct drm_i915_private *i915);
+u32 vlv_bunit_read(struct drm_i915_private *i915, u32 reg);
+void vlv_bunit_write(struct drm_i915_private *i915, u32 reg, u32 val);
+void vlv_bunit_put(struct drm_i915_private *i915);
+
+void vlv_dpio_get(struct drm_i915_private *i915);
+u32 vlv_dpio_read(struct drm_i915_private *i915, enum pipe pipe, int reg);
+void vlv_dpio_write(struct drm_i915_private *i915,
+ enum pipe pipe, int reg, u32 val);
+void vlv_dpio_put(struct drm_i915_private *i915);
+
+void vlv_flisdsi_get(struct drm_i915_private *i915);
+u32 vlv_flisdsi_read(struct drm_i915_private *i915, u32 reg);
+void vlv_flisdsi_write(struct drm_i915_private *i915, u32 reg, u32 val);
+void vlv_flisdsi_put(struct drm_i915_private *i915);
+
+enum intel_sbi_destination {
+ SBI_ICLK,
+ SBI_MPHY,
+};
+
+u32 intel_sbi_read(struct drm_i915_private *i915, u16 reg,
+ enum intel_sbi_destination destination);
+void intel_sbi_write(struct drm_i915_private *i915, u16 reg, u32 value,
+ enum intel_sbi_destination destination);
+
+#endif /* _INTEL_SIDEBAND_H */
--
2.17.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2018-05-03 6:39 UTC|newest]
Thread overview: 65+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-05-03 6:36 [PATCH 01/71] drm/i915/execlists: Drop preemption arbitrations points along the ring Chris Wilson
2018-05-03 6:36 ` [PATCH 02/71] drm/i915/execlists: Emit i915_trace_request_out for preemption Chris Wilson
2018-05-03 6:36 ` [PATCH 03/71] drm/i915: Lazily unbind vma on close Chris Wilson
2018-05-03 16:59 ` Tvrtko Ursulin
2018-05-03 6:36 ` [PATCH 04/71] drm/i915: Keep one request in our ring_list Chris Wilson
2018-05-03 17:04 ` Tvrtko Ursulin
2018-05-03 6:36 ` [PATCH 05/71] drm/i915/execlists: Disable submission tasklets when rescheduling Chris Wilson
2018-05-03 17:49 ` Tvrtko Ursulin
2018-05-03 19:50 ` Chris Wilson
2018-05-04 9:15 ` Tvrtko Ursulin
2018-05-04 9:31 ` Chris Wilson
2018-05-03 6:36 ` [PATCH 06/71] drm/i915: Detect if we missed kicking the execlists tasklet Chris Wilson
2018-05-03 13:08 ` Chris Wilson
2018-05-03 6:36 ` [PATCH 07/71] drm/i915: Move request->ctx aside Chris Wilson
2018-05-03 6:36 ` [PATCH 08/71] drm/i915: Move fiddling with engine->last_retired_context Chris Wilson
2018-05-03 6:36 ` [PATCH 09/71] drm/i915: Store a pointer to intel_context in i915_request Chris Wilson
2018-05-04 10:31 ` Tvrtko Ursulin
2018-05-03 6:36 ` [PATCH 10/71] drm/i915/execlists: Refactor out complete_preempt_context() Chris Wilson
2018-05-03 6:36 ` [PATCH 11/71] drm/i915: Move engine reset prepare/finish to backends Chris Wilson
2018-05-03 6:36 ` [PATCH 12/71] drm/i915: Split execlists/guc reset preparations Chris Wilson
2018-05-03 6:36 ` [PATCH 13/71] drm/i915/execlists: Flush pending preemption events during reset Chris Wilson
2018-05-03 6:37 ` [PATCH 14/71] drm/i915: Combine tasklet_kill and tasklet_disable Chris Wilson
2018-05-03 6:37 ` [PATCH 15/71] drm/i915: Stop parking the signaler around reset Chris Wilson
2018-05-03 6:37 ` [PATCH 16/71] drm/i915: Be irqsafe inside reset Chris Wilson
2018-05-03 6:37 ` [PATCH 17/71] drm/i915/execlists: Make submission tasklet hardirq safe Chris Wilson
2018-05-03 6:37 ` [PATCH 18/71] drm/i915/guc: " Chris Wilson
2018-05-03 6:37 ` [PATCH 19/71] drm/i915: Allow init_breadcrumbs to be used from irq context Chris Wilson
2018-05-03 6:37 ` [PATCH 20/71] drm/i915/execlists: Force preemption via reset on timeout Chris Wilson
2018-05-03 6:37 ` [PATCH 21/71] drm/i915/execlists: Try preempt-reset from hardirq timer context Chris Wilson
2018-05-03 6:37 ` [PATCH 22/71] drm/i915/preemption: Select timeout when scheduling Chris Wilson
2018-05-03 6:37 ` [PATCH 23/71] drm/i915: Use a preemption timeout to enforce interactivity Chris Wilson
2018-05-03 6:37 ` [PATCH 24/71] drm/i915: Allow user control over preempt timeout on their important context Chris Wilson
2018-05-03 6:37 ` [PATCH 25/71] drm/i915: Disable preemption and sleeping while using the punit sideband Chris Wilson
2018-05-03 6:37 ` [PATCH 26/71] drm/i915: Lift acquiring the vlv punit magic to a common sb-get Chris Wilson
2018-05-03 6:37 ` [PATCH 27/71] drm/i915: Lift sideband locking for vlv_punit_(read|write) Chris Wilson
2018-05-03 6:37 ` [PATCH 28/71] drm/i915: Reduce RPS update frequency on Valleyview/Cherryview Chris Wilson
2018-05-03 6:37 ` [PATCH 29/71] Revert "drm/i915: Avoid tweaking evaluation thresholds on Baytrail v3" Chris Wilson
2018-05-03 6:37 ` [PATCH 30/71] drm/i915: Replace pcu_lock with sb_lock Chris Wilson
2018-05-03 6:37 ` Chris Wilson [this message]
2018-05-03 6:37 ` [PATCH 32/71] drm/i915: Merge sbi read/write into a single accessor Chris Wilson
2018-05-03 6:37 ` [PATCH 33/71] drm/i915: Merge sandybridge_pcode_(read|write) Chris Wilson
2018-05-03 6:37 ` [PATCH 34/71] drm/i915: Move sandybride pcode access to intel_sideband.c Chris Wilson
2018-05-03 6:37 ` [PATCH 35/71] drm/i915: Mark up Ironlake ips with rpm wakerefs Chris Wilson
2018-05-03 6:37 ` [PATCH 36/71] drm/i915: Record logical context support in driver caps Chris Wilson
2018-05-03 6:37 ` [PATCH 37/71] drm/i915: Generalize i915_gem_sanitize() to reset contexts Chris Wilson
2018-05-03 6:37 ` [PATCH 38/71] drm/i915: Enable render context support for Ironlake (gen5) Chris Wilson
2018-05-03 8:47 ` Chris Wilson
2018-05-03 6:37 ` [PATCH 39/71] drm/i915: Enable render context support for gen4 (Broadwater to Cantiga) Chris Wilson
2018-05-03 6:37 ` [PATCH 40/71] drm/i915: Split GT powermanagement functions to intel_gt_pm.c Chris Wilson
2018-05-03 6:37 ` [PATCH 41/71] drm/i915: Move rps worker " Chris Wilson
2018-05-03 6:37 ` [PATCH 42/71] drm/i915: Move all the RPS irq handlers to intel_gt_pm Chris Wilson
2018-05-03 6:37 ` [PATCH 43/71] drm/i915: Track HAS_RPS alongside HAS_RC6 in the device info Chris Wilson
2018-05-03 6:37 ` [PATCH 44/71] drm/i915: Remove defunct intel_suspend_gt_powersave() Chris Wilson
2018-05-03 6:37 ` [PATCH 45/71] drm/i915: Reorder GT interface code Chris Wilson
2018-05-03 6:37 ` [PATCH 46/71] drm/i915: Split control of rps and rc6 Chris Wilson
2018-05-03 6:37 ` [PATCH 47/71] drm/i915: Enabling rc6 and rps have different requirements, so separate them Chris Wilson
2018-05-03 6:37 ` [PATCH 48/71] drm/i915: Simplify rc6/rps enabling Chris Wilson
2018-05-03 6:37 ` [PATCH 49/71] drm/i915: Refactor frequency bounds computation Chris Wilson
2018-05-03 6:37 ` [PATCH 50/71] drm/i915: Rename rps min/max frequencies Chris Wilson
2018-05-03 6:37 ` [PATCH 51/71] drm/i915: Pull IPS into GT power management Chris Wilson
2018-05-03 10:13 ` [PATCH 01/71] drm/i915/execlists: Drop preemption arbitrations points along the ring Lionel Landwerlin
2018-05-03 10:18 ` Chris Wilson
2018-05-03 10:28 ` Lionel Landwerlin
2018-05-03 10:38 ` Chris Wilson
2018-05-03 16:37 ` Tvrtko Ursulin
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20180503063757.22238-31-chris@chris-wilson.co.uk \
--to=chris@chris-wilson.co.uk \
--cc=intel-gfx@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.