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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 10/24] target/arm: Implement v8M VLLDM and VLSTM
Date: Fri,  4 May 2018 18:15:26 +0100	[thread overview]
Message-ID: <20180504171540.25813-11-peter.maydell@linaro.org> (raw)
In-Reply-To: <20180504171540.25813-1-peter.maydell@linaro.org>

For v8M the instructions VLLDM and VLSTM support lazy saving
and restoring of the secure floating-point registers. Even
if the floating point extension is not implemented, these
instructions must act as NOPs in Secure state, so they can
be used as part of the secure-to-nonsecure call sequence.

Fixes: https://bugs.launchpad.net/qemu/+bug/1768295
Cc: qemu-stable@nongnu.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180503105730.5958-1-peter.maydell@linaro.org
---
 target/arm/translate.c | 17 ++++++++++++++++-
 1 file changed, 16 insertions(+), 1 deletion(-)

diff --git a/target/arm/translate.c b/target/arm/translate.c
index 9bc2ce1a0b..ad208867a7 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -10795,8 +10795,23 @@ static void disas_thumb2_insn(DisasContext *s, uint32_t insn)
         /* Coprocessor.  */
         if (arm_dc_feature(s, ARM_FEATURE_M)) {
             /* We don't currently implement M profile FP support,
-             * so this entire space should give a NOCP fault.
+             * so this entire space should give a NOCP fault, with
+             * the exception of the v8M VLLDM and VLSTM insns, which
+             * must be NOPs in Secure state and UNDEF in Nonsecure state.
              */
+            if (arm_dc_feature(s, ARM_FEATURE_V8) &&
+                (insn & 0xffa00f00) == 0xec200a00) {
+                /* 0b1110_1100_0x1x_xxxx_xxxx_1010_xxxx_xxxx
+                 *  - VLLDM, VLSTM
+                 * We choose to UNDEF if the RAZ bits are non-zero.
+                 */
+                if (!s->v8m_secure || (insn & 0x0040f0ff)) {
+                    goto illegal_op;
+                }
+                /* Just NOP since FP support is not implemented */
+                break;
+            }
+            /* All other insns: NOCP */
             gen_exception_insn(s, 4, EXCP_NOCP, syn_uncategorized(),
                                default_exception_el(s));
             break;
-- 
2.17.0

  parent reply	other threads:[~2018-05-04 17:15 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-04 17:15 [Qemu-devel] [PULL 00/24] target-arm queue Peter Maydell
2018-05-04 17:15 ` [Qemu-devel] [PULL 01/24] hw/arm/virt: Add linux, pci-domain property Peter Maydell
2018-05-04 17:15 ` [Qemu-devel] [PULL 02/24] target/arm: Correct MPUIR privilege level in register_cp_regs_for_features() conditional case Peter Maydell
2018-05-04 17:15 ` [Qemu-devel] [PULL 03/24] hw/char/cmsdk-apb-uart.c: Accept more input after character read Peter Maydell
2018-05-04 17:15 ` [Qemu-devel] [PULL 04/24] hw/usb/tusb6010: Convert away from old_mmio Peter Maydell
2018-05-04 17:15 ` [Qemu-devel] [PULL 05/24] hw/net/smc91c111: " Peter Maydell
2018-05-04 17:15 ` [Qemu-devel] [PULL 06/24] arm: boot: set boot_info starting from first_cpu Peter Maydell
2018-05-04 17:15 ` [Qemu-devel] [PULL 07/24] target/arm: Tidy conditions in handle_vec_simd_shri Peter Maydell
2018-05-04 17:15 ` [Qemu-devel] [PULL 08/24] target/arm: Tidy condition in disas_simd_two_reg_misc Peter Maydell
2018-05-04 17:15 ` [Qemu-devel] [PULL 09/24] hw/arm: Don't fail qtest due to missing SD card in -nodefaults mode Peter Maydell
2018-05-04 17:15 ` Peter Maydell [this message]
2018-05-04 17:15 ` [Qemu-devel] [PULL 11/24] hw/arm/smmu-common: smmu base device and datatypes Peter Maydell
2018-05-04 17:15 ` [Qemu-devel] [PULL 12/24] hw/arm/smmu-common: IOMMU memory region and address space setup Peter Maydell
2018-05-04 17:15 ` [Qemu-devel] [PULL 13/24] hw/arm/smmu-common: VMSAv8-64 page table walk Peter Maydell
2018-05-14 16:40   ` Peter Maydell
2018-05-04 17:15 ` [Qemu-devel] [PULL 14/24] hw/arm/smmuv3: Skeleton Peter Maydell
2018-05-04 17:15 ` [Qemu-devel] [PULL 15/24] hw/arm/smmuv3: Wired IRQ and GERROR helpers Peter Maydell
2018-05-04 17:15 ` [Qemu-devel] [PULL 16/24] hw/arm/smmuv3: Queue helpers Peter Maydell
2018-05-04 17:15 ` [Qemu-devel] [PULL 17/24] hw/arm/smmuv3: Implement MMIO write operations Peter Maydell
2018-05-04 17:15 ` [Qemu-devel] [PULL 18/24] hw/arm/smmuv3: Event queue recording helper Peter Maydell
2018-05-14 16:23   ` Peter Maydell
2018-05-14 16:41     ` Auger Eric
2018-05-04 17:15 ` [Qemu-devel] [PULL 19/24] hw/arm/smmuv3: Implement translate callback Peter Maydell
2018-05-04 17:15 ` [Qemu-devel] [PULL 20/24] hw/arm/smmuv3: Abort on vfio or vhost case Peter Maydell
2018-05-04 17:15 ` [Qemu-devel] [PULL 21/24] target/arm/kvm: Translate the MSI doorbell in kvm_arch_fixup_msi_route Peter Maydell
2018-05-04 17:15 ` [Qemu-devel] [PULL 22/24] hw/arm/virt: Add SMMUv3 to the virt board Peter Maydell
2018-05-04 17:15 ` [Qemu-devel] [PULL 23/24] hw/arm/virt-acpi-build: Add smmuv3 node in IORT table Peter Maydell
2018-05-04 17:15 ` [Qemu-devel] [PULL 24/24] hw/arm/virt: Introduce the iommu option Peter Maydell
2018-05-04 17:58 ` [Qemu-devel] [PULL 00/24] target-arm queue Peter Maydell
2018-05-06 16:00   ` Auger Eric

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