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From: Matthew Wilcox <willy@infradead.org>
To: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>
Cc: Andrew Morton <akpm@linux-foundation.org>,
	Michal Hocko <mhocko@kernel.org>,
	Linus Torvalds <torvalds@linux-foundation.org>,
	Andy Lutomirski <luto@amacapital.net>,
	x86@kernel.org, linux-mm@kvack.org, linux-kernel@vger.kernel.org
Subject: Re: Proof-of-concept: better(?) page-table manipulation API
Date: Fri, 4 May 2018 14:12:44 -0700	[thread overview]
Message-ID: <20180504211244.GD29829@bombadil.infradead.org> (raw)
In-Reply-To: <20180424154355.mfjgkf47kdp2by4e@black.fi.intel.com>

On Tue, Apr 24, 2018 at 06:43:56PM +0300, Kirill A. Shutemov wrote:
> +struct pt_ptr {
> +	unsigned long *ptr;
> +	int lvl;
> +};

On x86, you've got three kinds of paging scheme, referred to in the manual
as 32-bit, PAE and 4-level.  On 32-bit, you've got 3 levels (Directory,
Table and Entry), and you can encode those three levels in the bottom
two bits of the pointer.  With PAE and 4L, pointers are 64-bit aligned,
so you can encode up to eight levels in the bottom three bits of the
pointer.

> +struct pt_val {
> +	unsigned long val;
> +	int lvl;
> +};

I don't think it's possible to shrink this down to a single ulong.
_Maybe_ it is if you can squirm a single bit free from the !pte_present
case.

... this is only for x86 4L and maybe 32 paging, right?  It'd need to
use unsigned long val[2] for PAE.

I'm going to think about this some more.  There's a lot of potential here.

  reply	other threads:[~2018-05-04 21:12 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-04-24 15:43 Proof-of-concept: better(?) page-table manipulation API Kirill A. Shutemov
2018-05-04 21:12 ` Matthew Wilcox [this message]
2018-05-04 21:49   ` Kirill A. Shutemov
2018-05-07  4:51 ` Andy Lutomirski
2018-05-07 11:31   ` Kirill A. Shutemov
2018-05-07 12:23     ` Matthew Wilcox
2018-05-07 13:10       ` Kirill A. Shutemov
2018-05-08 21:04     ` Andy Lutomirski

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