From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47576) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fGTIx-0004M7-9t for qemu-devel@nongnu.org; Wed, 09 May 2018 13:55:12 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fGTIt-00052p-KX for qemu-devel@nongnu.org; Wed, 09 May 2018 13:55:07 -0400 Received: from mail-pf0-x241.google.com ([2607:f8b0:400e:c00::241]:40591) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fGTIt-00051k-Fo for qemu-devel@nongnu.org; Wed, 09 May 2018 13:55:03 -0400 Received: by mail-pf0-x241.google.com with SMTP id f189so25991559pfa.7 for ; Wed, 09 May 2018 10:55:03 -0700 (PDT) From: Richard Henderson Date: Wed, 9 May 2018 10:54:31 -0700 Message-Id: <20180509175458.15642-2-richard.henderson@linaro.org> In-Reply-To: <20180509175458.15642-1-richard.henderson@linaro.org> References: <20180509175458.15642-1-richard.henderson@linaro.org> Subject: [Qemu-devel] [PULL 01/28] target/riscv: avoid integer overflow in next_page PC check List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: David Hildenbrand , Alexander Graf , Stafford Horne , Cornelia Huck , Bastian Koppelmann , "Edgar E. Iglesias" , Paolo Bonzini , Michael Walle , Max Filippov , Richard Henderson , Michael Clark , Eduardo Habkost , Sagar Karandikar , peter.maydell@linaro.org, Aurelien Jarno , Yongbok Kim , qemu-s390x@nongnu.org, Artyom Tarasenko , Palmer Dabbelt , David Gibson , qemu-ppc@nongnu.org, qemu-arm@nongnu.org, Mark Cave-Ayland , Guan Xuetao , Peter Crosthwaite , "Emilio G. Cota" From: "Emilio G. Cota" If the PC is in the last page of the address space, next_page_start overflows to 0. Fix it. Reported-by: Richard Henderson Suggested-by: Richard Henderson Reviewed-by: Richard Henderson Reviewed-by: Michael Clark Acked-by: Bastian Koppelmann Cc: Michael Clark Cc: Palmer Dabbelt Cc: Sagar Karandikar Cc: Bastian Koppelmann Signed-off-by: Emilio G. Cota Signed-off-by: Richard Henderson --- target/riscv/translate.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/target/riscv/translate.c b/target/riscv/translate.c index c0e6a044d3..a98033ca77 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -1850,11 +1850,11 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb) CPURISCVState *env = cs->env_ptr; DisasContext ctx; target_ulong pc_start; - target_ulong next_page_start; + target_ulong page_start; int num_insns; int max_insns; pc_start = tb->pc; - next_page_start = (pc_start & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE; + page_start = pc_start & TARGET_PAGE_MASK; ctx.pc = pc_start; /* once we have GDB, the rest of the translate.c implementation should be @@ -1904,7 +1904,7 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb) if (cs->singlestep_enabled) { break; } - if (ctx.pc >= next_page_start) { + if (ctx.pc - page_start >= TARGET_PAGE_SIZE) { break; } if (tcg_op_buf_full()) { -- 2.17.0