From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ramon Fried Date: Sat, 12 May 2018 13:15:57 +0300 Subject: [U-Boot] [PATCH 6/7] db410: added pinctrl node and serial bindings In-Reply-To: <20180512101558.24375-1-ramon.fried@gmail.com> References: <20180512101558.24375-1-ramon.fried@gmail.com> Message-ID: <20180512101558.24375-7-ramon.fried@gmail.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Added TLMM pinctrl node for pin muxing & config. Additionally, added a serial node for uart. Signed-off-by: Ramon Fried --- arch/arm/dts/dragonboard410c.dts | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm/dts/dragonboard410c.dts b/arch/arm/dts/dragonboard410c.dts index d9d5831f4f..182a865b0a 100644 --- a/arch/arm/dts/dragonboard410c.dts +++ b/arch/arm/dts/dragonboard410c.dts @@ -8,6 +8,7 @@ /dts-v1/; #include "skeleton64.dtsi" +#include / { model = "Qualcomm Technologies, Inc. Dragonboard 410c"; @@ -38,6 +39,17 @@ ranges = <0x0 0x0 0x0 0xffffffff>; compatible = "simple-bus"; + pinctrl: qcom,tlmm at 1000000 { + compatible = "qcom,tlmm-apq8016"; + reg = <0x1000000 0x400000>; + + blsp1_uart: uart { + function = "blsp1_uart"; + pins = "GPIO_4", "GPIO_5"; + drive-strength = ; + bias-disable; + }; + }; clkc: qcom,gcc at 1800000 { compatible = "qcom,gcc-apq8016"; reg = <0x1800000 0x80000>; @@ -49,6 +61,8 @@ compatible = "qcom,msm-uartdm-v1.4"; reg = <0x78b0000 0x200>; clock = <&clkc 4>; + pinctrl-names = "uart"; + pinctrl-0 = <&blsp1_uart>; }; soc_gpios: pinctrl at 1000000 { -- 2.14.1