From mboxrd@z Thu Jan 1 00:00:00 1970 Return-path: Received: from aserp2120.oracle.com ([141.146.126.78]) by Galois.linutronix.de with esmtps (TLS1.2:RSA_AES_256_CBC_SHA256:256) (Exim 4.80) (envelope-from ) id 1fInEB-0003aY-B2 for speck@linutronix.de; Wed, 16 May 2018 05:35:48 +0200 Received: from pps.filterd (aserp2120.oracle.com [127.0.0.1]) by aserp2120.oracle.com (8.16.0.22/8.16.0.22) with SMTP id w4G3UuaT025648 for ; Wed, 16 May 2018 03:35:40 GMT Received: from userv0022.oracle.com (userv0022.oracle.com [156.151.31.74]) by aserp2120.oracle.com with ESMTP id 2hx29w2w4e-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK) for ; Wed, 16 May 2018 03:35:40 +0000 Received: from aserv0122.oracle.com (aserv0122.oracle.com [141.146.126.236]) by userv0022.oracle.com (8.14.4/8.14.4) with ESMTP id w4G3ZdQW010623 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK) for ; Wed, 16 May 2018 03:35:39 GMT Received: from abhmp0011.oracle.com (abhmp0011.oracle.com [141.146.116.17]) by aserv0122.oracle.com (8.14.4/8.14.4) with ESMTP id w4G3ZcS0009812 for ; Wed, 16 May 2018 03:35:39 GMT Date: Tue, 15 May 2018 23:35:37 -0400 From: Konrad Rzeszutek Wilk Subject: [MODERATED] Re: [patch 11/15] Hidden 11 Message-ID: <20180516033537.GA26939@char.us.oracle.com> References: <20180513140048.543641807@linutronix.de> <20180513140539.142157021@linutronix.de> MIME-Version: 1.0 In-Reply-To: <20180513140539.142157021@linutronix.de> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit To: speck@linutronix.de List-ID: On Sun, May 13, 2018 at 04:00:59PM +0200, speck for Thomas Gleixner wrote: > Subject: [patch 11/15] x86/bugs: Expose x86_spec_ctrl_base directly > From: Thomas Gleixner > > x86_spec_ctrl_base is the system wide default value for MSR_SPEC_CTRL. > x86_spec_ctrl_get_default() returns x86_spec_ctrl_base and was intended to > prevent modification to that variable. Though the variable is read only > after init and globaly visible already. > > Remove the function and export the variable instead. > > Signed-off-by: Thomas Gleixner ..snip.. > --- a/arch/x86/kernel/cpu/bugs.c > +++ b/arch/x86/kernel/cpu/bugs.c > @@ -36,12 +36,13 @@ static void __init ssb_select_mitigation > * writes to SPEC_CTRL contain whatever reserved bits have been set. > */ > u64 __ro_after_init x86_spec_ctrl_base; > +EXPORT_SYMBOL_GPL(x86_spec_ctrl_base); > > /* > * The vendor and possibly platform specific bits which can be modified in > * x86_spec_ctrl_base. > */ > -static u64 __ro_after_init x86_spec_ctrl_mask = ~SPEC_CTRL_IBRS; > +static u64 __ro_after_init x86_spec_ctrl_mask = SPEC_CTRL_IBRS; Why the flip? The commit description does not talk about this at all?