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From: Andrew Lunn <andrew@lunn.ch>
To: "Alvaro G. M." <alvaro.gamez@hazent.com>
Cc: netdev@vger.kernel.org
Subject: Re: Xilinx axienet + DP83620 in fiber mode won't set netif_carrier_on
Date: Wed, 16 May 2018 15:11:34 +0200	[thread overview]
Message-ID: <20180516131134.GF22000@lunn.ch> (raw)
In-Reply-To: <20180516091630.GA17469@salem.gmr.ssr.upm.es>

On Wed, May 16, 2018 at 11:16:31AM +0200, Alvaro G. M. wrote:
> Hi,
> 
> I have a custom board with a Xilinx FPGA running Microblaze and fitting a
> Xilinx Axi Ethernet IP core.  This core communicates through MII mode with a
> DP83620 PHY from Texas that supports both cabled and fiber interfaces, of
> which I'm using the latter.
> 
> Under these circumstances, I've noticed that the interface is pretty much
> dead except for receiving broadcast packages, so I tried to dig on the
> driver to find the cause. Please, beware that I'm not very familiar with the
> netdev subsystem, so I may be mistaken on lots of things.
> 
> It seems that of_phy_connect ends up calling netif_carrier_off:
> 
> phy_device.c:1036
> 	/* Initial carrier state is off as the phy is about to be
> 	 * (re)initialized.
> 	 */
> 	netif_carrier_off(phydev->attached_dev);
> 
> 	/* Do initial configuration here, now that
> 	 * we have certain key parameters
> 	 * (dev_flags and interface)
> 	 */
> 	err = phy_init_hw(phydev);
> 	if (err)
> 		goto error;
> 
> 	phy_resume(phydev);
> 
> However, neither xilinx_axienet_main.c nor dp83848.c ever runs
> netif_carrier_on.

Hi Alvaro

What should happen in general terms is that at some point the link to
the peer is established. phylib, the generic PHY code, polls the PHY
ever second, asking what the link state is. When the link changes from
down to up, phylib will call the link_adjust callback in the MAC, and
netif_carrier_on().

When the PHY reports the link has gone down, it does similar, calls
the adjust_link callback, and netif_carrier_off().

So what you need to do is find out why the PHY driver never reports
link up. Does the PHY even know when the link is up? Often SFF/SFP
modules have a Signal Detect pin, which is connected to a gpio. Do you
have something like that? If so, you should look at the PHYLINK code
and the SFP device which was added recently.

    Andrew

  reply	other threads:[~2018-05-16 13:11 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-16  9:16 Xilinx axienet + DP83620 in fiber mode won't set netif_carrier_on Alvaro G. M.
2018-05-16 13:11 ` Andrew Lunn [this message]
2018-05-16 14:24   ` Alvaro G. M.

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