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From: "José Roberto de Souza" <jose.souza@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>,
	Rodrigo Vivi <rodrigo.vivi@intel.com>
Subject: [PATCH v3 2/7] drm/i915/dp: Use intel_dp_aux_wait_done() to wait for previous aux xfer
Date: Thu, 17 May 2018 15:21:13 -0700	[thread overview]
Message-ID: <20180517222118.14246-2-jose.souza@intel.com> (raw)
In-Reply-To: <20180517222118.14246-1-jose.souza@intel.com>

This reduces the spaghetti that intel_dp_aux_xfer() and reuses code.
The only difference is that now it will wait up to 10ms instead of
3ms.

Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/intel_dp.c | 20 +++-----------------
 1 file changed, 3 insertions(+), 17 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 2cc58596ff5a..b86da48fd38e 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1102,23 +1102,9 @@ intel_dp_aux_xfer(struct intel_dp *intel_dp,
 	intel_dp_check_edp(intel_dp);
 
 	/* Try to wait for any previous AUX channel activity */
-	for (try = 0; try < 3; try++) {
-		status = I915_READ_NOTRACE(ch_ctl);
-		if ((status & DP_AUX_CH_CTL_SEND_BUSY) == 0)
-			break;
-		msleep(1);
-	}
-
-	if (try == 3) {
-		static u32 last_status = -1;
-		const u32 status = I915_READ(ch_ctl);
-
-		if (status != last_status) {
-			WARN(1, "dp_aux_ch not started status 0x%08x\n",
-			     status);
-			last_status = status;
-		}
-
+	status = intel_dp_aux_wait_done(intel_dp, has_aux_irq);
+	if (status & DP_AUX_CH_CTL_SEND_BUSY) {
+		DRM_WARN("dp_aux_ch not started status 0x%08x\n", status);
 		ret = -EBUSY;
 		goto out;
 	}
-- 
2.17.0

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  reply	other threads:[~2018-05-17 22:21 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-17 22:21 [PATCH v3 1/7] drm/i915/psr: Nuke PSR support for VLV and CHV José Roberto de Souza
2018-05-17 22:21 ` José Roberto de Souza [this message]
2018-06-06 23:47   ` [PATCH v3 2/7] drm/i915/dp: Use intel_dp_aux_wait_done() to wait for previous aux xfer Dhinakaran Pandiyan
2018-05-17 22:21 ` [PATCH v3 3/7] drm/i915/psr: Remove intel_crtc_state parameter from disable() José Roberto de Souza
2018-05-22 21:24   ` Dhinakaran Pandiyan
2018-05-17 22:21 ` [PATCH v3 4/7] drm/i915/psr: Begin to handle PSR/PSR2 errors set by sink José Roberto de Souza
2018-05-22 23:58   ` Dhinakaran Pandiyan
2018-06-05 22:45     ` Souza, Jose
2018-06-13 20:17       ` Dhinakaran Pandiyan
2018-06-13 20:02         ` Souza, Jose
2018-06-13 22:01           ` Dhinakaran Pandiyan
2018-05-17 22:21 ` [PATCH v3 5/7] drm/i915/psr: Handle PSR RFB storage error José Roberto de Souza
2018-06-13 23:00   ` Dhinakaran Pandiyan
2018-05-17 22:21 ` [PATCH v3 6/7] drm/i915/psr/bdw+: Enable CRC check in the static frame on the sink side José Roberto de Souza
2018-05-23  0:02   ` Dhinakaran Pandiyan
2018-05-17 22:21 ` [PATCH v3 7/7] drm/i915/psr: Avoid PSR exit max time timeout José Roberto de Souza
2018-05-17 22:38 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [v3,1/7] drm/i915/psr: Nuke PSR support for VLV and CHV Patchwork
2018-05-17 22:40 ` ✗ Fi.CI.SPARSE: " Patchwork
2018-05-17 22:55 ` ✓ Fi.CI.BAT: success " Patchwork
2018-05-18  4:28 ` ✗ Fi.CI.IGT: failure " Patchwork

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