From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751469AbeEVHe7 (ORCPT ); Tue, 22 May 2018 03:34:59 -0400 Received: from 4.mo7.mail-out.ovh.net ([178.32.122.254]:43957 "EHLO 4.mo7.mail-out.ovh.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751124AbeEVHe6 (ORCPT ); Tue, 22 May 2018 03:34:58 -0400 From: =?UTF-8?q?S=C3=A9bastien=20Szymanski?= To: linux-arm-kernel@lists.infradead.org Cc: "Rafael J . Wysocki" , Viresh Kumar , linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, Shawn Guo , Sascha Hauer , Fabio Estevam , Stefan Agner , Rob Herring , Mark Rutland , devicetree@vger.kernel.org, =?UTF-8?q?S=C3=A9bastien=20Szymanski?= Subject: [PATCH v3 1/3] cpufreq: imx6q: check speed grades for i.MX6ULL Date: Tue, 22 May 2018 08:28:51 +0200 Message-Id: <20180522062853.24799-1-sebastien.szymanski@armadeus.com> X-Mailer: git-send-email 2.16.1 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Ovh-Tracer-Id: 13126867014484710652 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrgedthedrgedtgddutdegucetufdoteggodetrfdotffvucfrrhhofhhilhgvmecuqfggjfdpvefjgfevmfevgfenuceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddm Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Check the max speed supported from the fuses for i.MX6ULL and update the operating points table accordingly. Signed-off-by: Sébastien Szymanski --- Changes for v3: - none Changes for v2: - none drivers/cpufreq/imx6q-cpufreq.c | 29 +++++++++++++++++++++++------ 1 file changed, 23 insertions(+), 6 deletions(-) diff --git a/drivers/cpufreq/imx6q-cpufreq.c b/drivers/cpufreq/imx6q-cpufreq.c index 83cf631fc9bc..f094687cae52 100644 --- a/drivers/cpufreq/imx6q-cpufreq.c +++ b/drivers/cpufreq/imx6q-cpufreq.c @@ -266,6 +266,8 @@ static void imx6q_opp_check_speed_grading(struct device *dev) } #define OCOTP_CFG3_6UL_SPEED_696MHZ 0x2 +#define OCOTP_CFG3_6ULL_SPEED_792MHZ 0x2 +#define OCOTP_CFG3_6ULL_SPEED_900MHZ 0x3 static void imx6ul_opp_check_speed_grading(struct device *dev) { @@ -287,16 +289,30 @@ static void imx6ul_opp_check_speed_grading(struct device *dev) * Speed GRADING[1:0] defines the max speed of ARM: * 2b'00: Reserved; * 2b'01: 528000000Hz; - * 2b'10: 696000000Hz; - * 2b'11: Reserved; + * 2b'10: 696000000Hz on i.MX6UL, 792000000Hz on i.MX6ULL; + * 2b'11: 900000000Hz on i.MX6ULL only; * We need to set the max speed of ARM according to fuse map. */ val = readl_relaxed(base + OCOTP_CFG3); val >>= OCOTP_CFG3_SPEED_SHIFT; val &= 0x3; - if (val != OCOTP_CFG3_6UL_SPEED_696MHZ) - if (dev_pm_opp_disable(dev, 696000000)) - dev_warn(dev, "failed to disable 696MHz OPP\n"); + + if (of_machine_is_compatible("fsl,imx6ul")) { + if (val != OCOTP_CFG3_6UL_SPEED_696MHZ) + if (dev_pm_opp_disable(dev, 696000000)) + dev_warn(dev, "failed to disable 696MHz OPP\n"); + } + + if (of_machine_is_compatible("fsl,imx6ull")) { + if (val != OCOTP_CFG3_6ULL_SPEED_792MHZ) + if (dev_pm_opp_disable(dev, 792000000)) + dev_warn(dev, "failed to disable 792MHz OPP\n"); + + if (val != OCOTP_CFG3_6ULL_SPEED_900MHZ) + if (dev_pm_opp_disable(dev, 900000000)) + dev_warn(dev, "failed to disable 900MHz OPP\n"); + } + iounmap(base); put_node: of_node_put(np); @@ -356,7 +372,8 @@ static int imx6q_cpufreq_probe(struct platform_device *pdev) goto put_reg; } - if (of_machine_is_compatible("fsl,imx6ul")) + if (of_machine_is_compatible("fsl,imx6ul") || + of_machine_is_compatible("fsl,imx6ull")) imx6ul_opp_check_speed_grading(cpu_dev); else imx6q_opp_check_speed_grading(cpu_dev); -- 2.16.1 From mboxrd@z Thu Jan 1 00:00:00 1970 From: =?UTF-8?q?S=C3=A9bastien=20Szymanski?= Subject: [PATCH v3 1/3] cpufreq: imx6q: check speed grades for i.MX6ULL Date: Tue, 22 May 2018 08:28:51 +0200 Message-ID: <20180522062853.24799-1-sebastien.szymanski@armadeus.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: linux-arm-kernel@lists.infradead.org Cc: Mark Rutland , devicetree@vger.kernel.org, linux-pm@vger.kernel.org, Viresh Kumar , "Rafael J . Wysocki" , linux-kernel@vger.kernel.org, Stefan Agner , Rob Herring , Sascha Hauer , Fabio Estevam , Shawn Guo List-Id: devicetree@vger.kernel.org Q2hlY2sgdGhlIG1heCBzcGVlZCBzdXBwb3J0ZWQgZnJvbSB0aGUgZnVzZXMgZm9yIGkuTVg2VUxM IGFuZCB1cGRhdGUgdGhlCm9wZXJhdGluZyBwb2ludHMgdGFibGUgYWNjb3JkaW5nbHkuCgpTaWdu ZWQtb2ZmLWJ5OiBTw6liYXN0aWVuIFN6eW1hbnNraSA8c2ViYXN0aWVuLnN6eW1hbnNraUBhcm1h ZGV1cy5jb20+Ci0tLQoKQ2hhbmdlcyBmb3IgdjM6CiAtIG5vbmUKCkNoYW5nZXMgZm9yIHYyOgog LSBub25lCgogZHJpdmVycy9jcHVmcmVxL2lteDZxLWNwdWZyZXEuYyB8IDI5ICsrKysrKysrKysr KysrKysrKysrKysrLS0tLS0tCiAxIGZpbGUgY2hhbmdlZCwgMjMgaW5zZXJ0aW9ucygrKSwgNiBk ZWxldGlvbnMoLSkKCmRpZmYgLS1naXQgYS9kcml2ZXJzL2NwdWZyZXEvaW14NnEtY3B1ZnJlcS5j IGIvZHJpdmVycy9jcHVmcmVxL2lteDZxLWNwdWZyZXEuYwppbmRleCA4M2NmNjMxZmM5YmMuLmYw OTQ2ODdjYWU1MiAxMDA2NDQKLS0tIGEvZHJpdmVycy9jcHVmcmVxL2lteDZxLWNwdWZyZXEuYwor KysgYi9kcml2ZXJzL2NwdWZyZXEvaW14NnEtY3B1ZnJlcS5jCkBAIC0yNjYsNiArMjY2LDggQEAg c3RhdGljIHZvaWQgaW14NnFfb3BwX2NoZWNrX3NwZWVkX2dyYWRpbmcoc3RydWN0IGRldmljZSAq ZGV2KQogfQogCiAjZGVmaW5lIE9DT1RQX0NGRzNfNlVMX1NQRUVEXzY5Nk1IWgkweDIKKyNkZWZp bmUgT0NPVFBfQ0ZHM182VUxMX1NQRUVEXzc5Mk1IWgkweDIKKyNkZWZpbmUgT0NPVFBfQ0ZHM182 VUxMX1NQRUVEXzkwME1IWgkweDMKIAogc3RhdGljIHZvaWQgaW14NnVsX29wcF9jaGVja19zcGVl ZF9ncmFkaW5nKHN0cnVjdCBkZXZpY2UgKmRldikKIHsKQEAgLTI4NywxNiArMjg5LDMwIEBAIHN0 YXRpYyB2b2lkIGlteDZ1bF9vcHBfY2hlY2tfc3BlZWRfZ3JhZGluZyhzdHJ1Y3QgZGV2aWNlICpk ZXYpCiAJICogU3BlZWQgR1JBRElOR1sxOjBdIGRlZmluZXMgdGhlIG1heCBzcGVlZCBvZiBBUk06 CiAJICogMmInMDA6IFJlc2VydmVkOwogCSAqIDJiJzAxOiA1MjgwMDAwMDBIejsKLQkgKiAyYicx MDogNjk2MDAwMDAwSHo7Ci0JICogMmInMTE6IFJlc2VydmVkOworCSAqIDJiJzEwOiA2OTYwMDAw MDBIeiBvbiBpLk1YNlVMLCA3OTIwMDAwMDBIeiBvbiBpLk1YNlVMTDsKKwkgKiAyYicxMTogOTAw MDAwMDAwSHogb24gaS5NWDZVTEwgb25seTsKIAkgKiBXZSBuZWVkIHRvIHNldCB0aGUgbWF4IHNw ZWVkIG9mIEFSTSBhY2NvcmRpbmcgdG8gZnVzZSBtYXAuCiAJICovCiAJdmFsID0gcmVhZGxfcmVs YXhlZChiYXNlICsgT0NPVFBfQ0ZHMyk7CiAJdmFsID4+PSBPQ09UUF9DRkczX1NQRUVEX1NISUZU OwogCXZhbCAmPSAweDM7Ci0JaWYgKHZhbCAhPSBPQ09UUF9DRkczXzZVTF9TUEVFRF82OTZNSFop Ci0JCWlmIChkZXZfcG1fb3BwX2Rpc2FibGUoZGV2LCA2OTYwMDAwMDApKQotCQkJZGV2X3dhcm4o ZGV2LCAiZmFpbGVkIHRvIGRpc2FibGUgNjk2TUh6IE9QUFxuIik7CisKKwlpZiAob2ZfbWFjaGlu ZV9pc19jb21wYXRpYmxlKCJmc2wsaW14NnVsIikpIHsKKwkJaWYgKHZhbCAhPSBPQ09UUF9DRkcz XzZVTF9TUEVFRF82OTZNSFopCisJCQlpZiAoZGV2X3BtX29wcF9kaXNhYmxlKGRldiwgNjk2MDAw MDAwKSkKKwkJCQlkZXZfd2FybihkZXYsICJmYWlsZWQgdG8gZGlzYWJsZSA2OTZNSHogT1BQXG4i KTsKKwl9CisKKwlpZiAob2ZfbWFjaGluZV9pc19jb21wYXRpYmxlKCJmc2wsaW14NnVsbCIpKSB7 CisJCWlmICh2YWwgIT0gT0NPVFBfQ0ZHM182VUxMX1NQRUVEXzc5Mk1IWikKKwkJCWlmIChkZXZf cG1fb3BwX2Rpc2FibGUoZGV2LCA3OTIwMDAwMDApKQorCQkJCWRldl93YXJuKGRldiwgImZhaWxl ZCB0byBkaXNhYmxlIDc5Mk1IeiBPUFBcbiIpOworCisJCWlmICh2YWwgIT0gT0NPVFBfQ0ZHM182 VUxMX1NQRUVEXzkwME1IWikKKwkJCWlmIChkZXZfcG1fb3BwX2Rpc2FibGUoZGV2LCA5MDAwMDAw MDApKQorCQkJCWRldl93YXJuKGRldiwgImZhaWxlZCB0byBkaXNhYmxlIDkwME1IeiBPUFBcbiIp OworCX0KKwogCWlvdW5tYXAoYmFzZSk7CiBwdXRfbm9kZToKIAlvZl9ub2RlX3B1dChucCk7CkBA IC0zNTYsNyArMzcyLDggQEAgc3RhdGljIGludCBpbXg2cV9jcHVmcmVxX3Byb2JlKHN0cnVjdCBw bGF0Zm9ybV9kZXZpY2UgKnBkZXYpCiAJCWdvdG8gcHV0X3JlZzsKIAl9CiAKLQlpZiAob2ZfbWFj aGluZV9pc19jb21wYXRpYmxlKCJmc2wsaW14NnVsIikpCisJaWYgKG9mX21hY2hpbmVfaXNfY29t cGF0aWJsZSgiZnNsLGlteDZ1bCIpIHx8CisJICAgIG9mX21hY2hpbmVfaXNfY29tcGF0aWJsZSgi ZnNsLGlteDZ1bGwiKSkKIAkJaW14NnVsX29wcF9jaGVja19zcGVlZF9ncmFkaW5nKGNwdV9kZXYp OwogCWVsc2UKIAkJaW14NnFfb3BwX2NoZWNrX3NwZWVkX2dyYWRpbmcoY3B1X2Rldik7Ci0tIAoy LjE2LjEKCgpfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwps aW51eC1hcm0ta2VybmVsIG1haWxpbmcgbGlzdApsaW51eC1hcm0ta2VybmVsQGxpc3RzLmluZnJh ZGVhZC5vcmcKaHR0cDovL2xpc3RzLmluZnJhZGVhZC5vcmcvbWFpbG1hbi9saXN0aW5mby9saW51 eC1hcm0ta2VybmVsCg== From mboxrd@z Thu Jan 1 00:00:00 1970 From: sebastien.szymanski@armadeus.com (=?UTF-8?q?S=C3=A9bastien=20Szymanski?=) Date: Tue, 22 May 2018 08:28:51 +0200 Subject: [PATCH v3 1/3] cpufreq: imx6q: check speed grades for i.MX6ULL Message-ID: <20180522062853.24799-1-sebastien.szymanski@armadeus.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Check the max speed supported from the fuses for i.MX6ULL and update the operating points table accordingly. Signed-off-by: S?bastien Szymanski --- Changes for v3: - none Changes for v2: - none drivers/cpufreq/imx6q-cpufreq.c | 29 +++++++++++++++++++++++------ 1 file changed, 23 insertions(+), 6 deletions(-) diff --git a/drivers/cpufreq/imx6q-cpufreq.c b/drivers/cpufreq/imx6q-cpufreq.c index 83cf631fc9bc..f094687cae52 100644 --- a/drivers/cpufreq/imx6q-cpufreq.c +++ b/drivers/cpufreq/imx6q-cpufreq.c @@ -266,6 +266,8 @@ static void imx6q_opp_check_speed_grading(struct device *dev) } #define OCOTP_CFG3_6UL_SPEED_696MHZ 0x2 +#define OCOTP_CFG3_6ULL_SPEED_792MHZ 0x2 +#define OCOTP_CFG3_6ULL_SPEED_900MHZ 0x3 static void imx6ul_opp_check_speed_grading(struct device *dev) { @@ -287,16 +289,30 @@ static void imx6ul_opp_check_speed_grading(struct device *dev) * Speed GRADING[1:0] defines the max speed of ARM: * 2b'00: Reserved; * 2b'01: 528000000Hz; - * 2b'10: 696000000Hz; - * 2b'11: Reserved; + * 2b'10: 696000000Hz on i.MX6UL, 792000000Hz on i.MX6ULL; + * 2b'11: 900000000Hz on i.MX6ULL only; * We need to set the max speed of ARM according to fuse map. */ val = readl_relaxed(base + OCOTP_CFG3); val >>= OCOTP_CFG3_SPEED_SHIFT; val &= 0x3; - if (val != OCOTP_CFG3_6UL_SPEED_696MHZ) - if (dev_pm_opp_disable(dev, 696000000)) - dev_warn(dev, "failed to disable 696MHz OPP\n"); + + if (of_machine_is_compatible("fsl,imx6ul")) { + if (val != OCOTP_CFG3_6UL_SPEED_696MHZ) + if (dev_pm_opp_disable(dev, 696000000)) + dev_warn(dev, "failed to disable 696MHz OPP\n"); + } + + if (of_machine_is_compatible("fsl,imx6ull")) { + if (val != OCOTP_CFG3_6ULL_SPEED_792MHZ) + if (dev_pm_opp_disable(dev, 792000000)) + dev_warn(dev, "failed to disable 792MHz OPP\n"); + + if (val != OCOTP_CFG3_6ULL_SPEED_900MHZ) + if (dev_pm_opp_disable(dev, 900000000)) + dev_warn(dev, "failed to disable 900MHz OPP\n"); + } + iounmap(base); put_node: of_node_put(np); @@ -356,7 +372,8 @@ static int imx6q_cpufreq_probe(struct platform_device *pdev) goto put_reg; } - if (of_machine_is_compatible("fsl,imx6ul")) + if (of_machine_is_compatible("fsl,imx6ul") || + of_machine_is_compatible("fsl,imx6ull")) imx6ul_opp_check_speed_grading(cpu_dev); else imx6q_opp_check_speed_grading(cpu_dev); -- 2.16.1