From: Saeed Mahameed <saeedm@mellanox.com>
To: "David S. Miller" <davem@davemloft.net>
Cc: netdev@vger.kernel.org, Huy Nguyen <huyn@mellanox.com>,
Saeed Mahameed <saeedm@mellanox.com>
Subject: [net-next V2 3/6] net/mlx5: Add pbmc and pptb in the port_access_reg_cap_mask
Date: Thu, 24 May 2018 14:38:17 -0700 [thread overview]
Message-ID: <20180524213820.5910-4-saeedm@mellanox.com> (raw)
In-Reply-To: <20180524213820.5910-1-saeedm@mellanox.com>
From: Huy Nguyen <huyn@mellanox.com>
Add pbmc and pptb in the port_access_reg_cap_mask. These two
bits determine if device supports receive buffer configuration.
Signed-off-by: Huy Nguyen <huyn@mellanox.com>
Reviewed-by: Parav Pandit <parav@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
---
include/linux/mlx5/device.h | 3 +++
include/linux/mlx5/mlx5_ifc.h | 12 ++++++++++++
2 files changed, 15 insertions(+)
diff --git a/include/linux/mlx5/device.h b/include/linux/mlx5/device.h
index 2bc27f8c5b87..db0332a6d23c 100644
--- a/include/linux/mlx5/device.h
+++ b/include/linux/mlx5/device.h
@@ -1152,6 +1152,9 @@ enum mlx5_qcam_feature_groups {
#define MLX5_CAP_PCAM_FEATURE(mdev, fld) \
MLX5_GET(pcam_reg, (mdev)->caps.pcam, feature_cap_mask.enhanced_features.fld)
+#define MLX5_CAP_PCAM_REG(mdev, reg) \
+ MLX5_GET(pcam_reg, (mdev)->caps.pcam, port_access_reg_cap_mask.regs_5000_to_507f.reg)
+
#define MLX5_CAP_MCAM_REG(mdev, reg) \
MLX5_GET(mcam_reg, (mdev)->caps.mcam, mng_access_reg_cap_mask.access_regs.reg)
diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h
index b4ea8a9914c4..f687989d336b 100644
--- a/include/linux/mlx5/mlx5_ifc.h
+++ b/include/linux/mlx5/mlx5_ifc.h
@@ -8003,6 +8003,17 @@ struct mlx5_ifc_pcam_enhanced_features_bits {
u8 ppcnt_statistical_group[0x1];
};
+struct mlx5_ifc_pcam_regs_5000_to_507f_bits {
+ u8 port_access_reg_cap_mask_127_to_96[0x20];
+ u8 port_access_reg_cap_mask_95_to_64[0x20];
+ u8 port_access_reg_cap_mask_63_to_32[0x20];
+
+ u8 port_access_reg_cap_mask_31_to_13[0x13];
+ u8 pbmc[0x1];
+ u8 pptb[0x1];
+ u8 port_access_reg_cap_mask_10_to_0[0xb];
+};
+
struct mlx5_ifc_pcam_reg_bits {
u8 reserved_at_0[0x8];
u8 feature_group[0x8];
@@ -8012,6 +8023,7 @@ struct mlx5_ifc_pcam_reg_bits {
u8 reserved_at_20[0x20];
union {
+ struct mlx5_ifc_pcam_regs_5000_to_507f_bits regs_5000_to_507f;
u8 reserved_at_0[0x80];
} port_access_reg_cap_mask;
--
2.17.0
next prev parent reply other threads:[~2018-05-24 21:38 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-05-24 21:38 [pull request][net-next V2 0/6] Mellanox, mlx5e updates 2018-05-19 Saeed Mahameed
2018-05-24 21:38 ` [net-next V2 1/6] net/dcb: Add dcbnl buffer attribute Saeed Mahameed
2018-05-24 21:38 ` [net-next V2 2/6] net/mlx5e: Move port speed code from en_ethtool.c to en/port.c Saeed Mahameed
2018-05-24 21:38 ` Saeed Mahameed [this message]
2018-05-24 21:38 ` [net-next V2 4/6] net/mlx5: PPTB and PBMC register firmware command support Saeed Mahameed
2018-05-24 21:38 ` [net-next V2 5/6] net/mlx5e: Receive buffer configuration Saeed Mahameed
2018-05-24 21:38 ` [net-next V2 6/6] net/mlx5e: Receive buffer support for DCBX Saeed Mahameed
2018-05-25 20:42 ` [pull request][net-next V2 0/6] Mellanox, mlx5e updates 2018-05-19 David Miller
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