From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga17.intel.com ([192.55.52.151]) by Galois.linutronix.de with esmtps (TLS1.2:DHE_RSA_AES_256_CBC_SHA256:256) (Exim 4.80) (envelope-from ) id 1fMFPr-0005Fn-Ug for speck@linutronix.de; Fri, 25 May 2018 18:18:08 +0200 Date: Fri, 25 May 2018 09:18:02 -0700 From: Andi Kleen Subject: [MODERATED] Re: [PATCH v6 6/8] L1TFv6 3 Message-ID: <20180525161802.GW4486@tassilo.jf.intel.com> References: <20180524210234.D1EA061155@crypto-ml.lab.linutronix.de> <20180524223715.GT4486@tassilo.jf.intel.com> <7b5c5343-fdf0-f84e-7da3-1549dd95e7da@citrix.com> MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit To: speck@linutronix.de List-ID: > But we'll see. The desktop chips have smaller PA limits. But then you tend > to be limited by just memory channels anyway - ie a desktop chip might be > limited to "just" 39 bits of physical memory, but in practice the RAM > limit is much much lower simply due to memory controllers. The only systems that should be able to hit it are systems with a lot of sockets (>8S) -Andi