From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from localhost ([127.0.0.1] helo=nanos.tec.linutronix.de) by Galois.linutronix.de with esmtp (Exim 4.80) (envelope-from ) id 1fQeAZ-0005Rn-Pr for speck@linutronix.de; Wed, 06 Jun 2018 21:32:32 +0200 Message-ID: <20180606192807.847202262@linutronix.de> Date: Wed, 06 Jun 2018 21:27:25 +0200 From: Thomas Gleixner Subject: [patch V2 11/12] x86/cpu/AMD: Evaluate smp_num_siblings early References: <20180606192714.754943543@linutronix.de> MIME-Version: 1 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit To: speck@linutronix.de List-ID: Subject: [patch V2 11/12] x86/cpu/AMD: Evaluate smp_num_siblings early From: Thomas Gleixner To support force disabling of SMT it's required to know the number of thread siblings early. amd_get_topology() cannot be called before the APIC driver is selected, so split out the part which initializes smp_num_siblings and invoke it from amd_early_init(). Signed-off-by: Thomas Gleixner --- arch/x86/kernel/cpu/amd.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) --- a/arch/x86/kernel/cpu/amd.c +++ b/arch/x86/kernel/cpu/amd.c @@ -315,6 +315,18 @@ static void legacy_fixup_core_id(struct c->cpu_core_id %= cus_per_node; } + +static void amd_get_topology_early(struct cpuinfo_x86 *c) +{ + if (boot_cpu_has(X86_FEATURE_TOPOEXT) && + c->extended_cpuid_level >= 0x80000008) { + u32 eax, ebx, ecx, edx; + + cpuid(0x8000001e, &eax, &ebx, &ecx, &edx); + smp_num_siblings = ((ebx >> 8) & 0xff) + 1; + } +} + /* * Fixup core topology information for * (1) AMD multi-node processors @@ -681,6 +693,8 @@ static void early_init_amd(struct cpuinf set_cpu_bug(c, X86_BUG_AMD_E400); early_detect_mem_encrypt(c); + + amd_get_topology_early(c); } static void init_amd_k8(struct cpuinfo_x86 *c)