* [PATCH] drm/i915/gtt: Invalidate GGTT caches after writing the gen6 page directories
@ 2018-06-05 20:16 Chris Wilson
2018-06-05 20:36 ` ✗ Fi.CI.BAT: failure for " Patchwork
2018-06-06 18:07 ` [PATCH] " kbuild test robot
0 siblings, 2 replies; 3+ messages in thread
From: Chris Wilson @ 2018-06-05 20:16 UTC (permalink / raw)
To: intel-gfx
When we update the gen6 ppgtt page directories, we do so by writing the
new address into a reserved slot in the GGTT. It appears that when the
GPU reads that entry from the gsm, it uses its small cache and that we
need to invalidate that cache after writing. We don't see an issue
currently as we prefill the ppgtt page directories on creation; and only
create the single aliasing_ppgtt long before we start using the GGTT
(and so before the cache mayhave a conflicting entry).
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: Matthew Auld <matthew.william.auld@gmail.com>
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 163c71784014..b232452ff5b9 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -1687,8 +1687,8 @@ static inline void gen6_write_pde(const struct i915_hw_ppgtt *ppgtt,
const struct i915_page_table *pt)
{
/* Caller needs to make sure the write completes if necessary */
- writel_relaxed(GEN6_PDE_ADDR_ENCODE(px_dma(pt)) | GEN6_PDE_VALID,
- ppgtt->pd_addr + pde);
+ iowrite32(GEN6_PDE_ADDR_ENCODE(px_dma(pt)) | GEN6_PDE_VALID,
+ ppgtt->pd_addr + pde);
}
/* Write all the page tables found in the ppgtt structure to incrementing page
@@ -1703,7 +1703,7 @@ static void gen6_write_page_range(struct i915_hw_ppgtt *ppgtt,
gen6_write_pde(ppgtt, pde, pt);
mark_tlbs_dirty(ppgtt);
- wmb();
+ gen6_ggtt_invalidate(ppgtt->vm.i915);
}
static inline u32 get_pd_offset(struct i915_hw_ppgtt *ppgtt)
@@ -1919,7 +1919,7 @@ static int gen6_alloc_va_range(struct i915_address_space *vm,
if (flush) {
mark_tlbs_dirty(ppgtt);
- wmb();
+ gen6_ggtt_invalidate(ppgtt->vm.i915);
}
return 0;
--
2.17.1
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^ permalink raw reply related [flat|nested] 3+ messages in thread
* ✗ Fi.CI.BAT: failure for drm/i915/gtt: Invalidate GGTT caches after writing the gen6 page directories
2018-06-05 20:16 [PATCH] drm/i915/gtt: Invalidate GGTT caches after writing the gen6 page directories Chris Wilson
@ 2018-06-05 20:36 ` Patchwork
2018-06-06 18:07 ` [PATCH] " kbuild test robot
1 sibling, 0 replies; 3+ messages in thread
From: Patchwork @ 2018-06-05 20:36 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/gtt: Invalidate GGTT caches after writing the gen6 page directories
URL : https://patchwork.freedesktop.org/series/44312/
State : failure
== Summary ==
CHK include/config/kernel.release
CHK include/generated/uapi/linux/version.h
CHK include/generated/utsrelease.h
CHK include/generated/bounds.h
CHK include/generated/timeconst.h
CHK include/generated/asm-offsets.h
CALL scripts/checksyscalls.sh
DESCEND objtool
CHK scripts/mod/devicetable-offsets.h
CHK include/generated/compile.h
CHK kernel/config_data.h
CC [M] drivers/gpu/drm/i915/i915_gem_gtt.o
drivers/gpu/drm/i915/i915_gem_gtt.c: In function ‘gen6_write_page_range’:
drivers/gpu/drm/i915/i915_gem_gtt.c:1706:28: error: ‘struct i915_hw_ppgtt’ has no member named ‘vm’
gen6_ggtt_invalidate(ppgtt->vm.i915);
^~
drivers/gpu/drm/i915/i915_gem_gtt.c: In function ‘gen6_alloc_va_range’:
drivers/gpu/drm/i915/i915_gem_gtt.c:1922:29: error: ‘struct i915_hw_ppgtt’ has no member named ‘vm’
gen6_ggtt_invalidate(ppgtt->vm.i915);
^~
scripts/Makefile.build:312: recipe for target 'drivers/gpu/drm/i915/i915_gem_gtt.o' failed
make[4]: *** [drivers/gpu/drm/i915/i915_gem_gtt.o] Error 1
scripts/Makefile.build:559: recipe for target 'drivers/gpu/drm/i915' failed
make[3]: *** [drivers/gpu/drm/i915] Error 2
scripts/Makefile.build:559: recipe for target 'drivers/gpu/drm' failed
make[2]: *** [drivers/gpu/drm] Error 2
scripts/Makefile.build:559: recipe for target 'drivers/gpu' failed
make[1]: *** [drivers/gpu] Error 2
Makefile:1063: recipe for target 'drivers' failed
make: *** [drivers] Error 2
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^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] drm/i915/gtt: Invalidate GGTT caches after writing the gen6 page directories
2018-06-05 20:16 [PATCH] drm/i915/gtt: Invalidate GGTT caches after writing the gen6 page directories Chris Wilson
2018-06-05 20:36 ` ✗ Fi.CI.BAT: failure for " Patchwork
@ 2018-06-06 18:07 ` kbuild test robot
1 sibling, 0 replies; 3+ messages in thread
From: kbuild test robot @ 2018-06-06 18:07 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx, kbuild-all
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Hi Chris,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on v4.17 next-20180605]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Chris-Wilson/drm-i915-gtt-Invalidate-GGTT-caches-after-writing-the-gen6-page-directories/20180607-003348
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: x86_64-randconfig-x007-201822 (attached as .config)
compiler: gcc-7 (Debian 7.3.0-16) 7.3.0
reproduce:
# save the attached .config to linux build tree
make ARCH=x86_64
All errors (new ones prefixed by >>):
drivers/gpu/drm/i915/i915_gem_gtt.c: In function 'gen6_write_page_range':
>> drivers/gpu/drm/i915/i915_gem_gtt.c:1747:28: error: 'struct i915_hw_ppgtt' has no member named 'vm'
gen6_ggtt_invalidate(ppgtt->vm.i915);
^~
drivers/gpu/drm/i915/i915_gem_gtt.c: In function 'gen6_alloc_va_range':
drivers/gpu/drm/i915/i915_gem_gtt.c:1963:29: error: 'struct i915_hw_ppgtt' has no member named 'vm'
gen6_ggtt_invalidate(ppgtt->vm.i915);
^~
vim +1747 drivers/gpu/drm/i915/i915_gem_gtt.c
1734
1735 /* Write all the page tables found in the ppgtt structure to incrementing page
1736 * directories. */
1737 static void gen6_write_page_range(struct i915_hw_ppgtt *ppgtt,
1738 u32 start, u32 length)
1739 {
1740 struct i915_page_table *pt;
1741 unsigned int pde;
1742
1743 gen6_for_each_pde(pt, &ppgtt->pd, start, length, pde)
1744 gen6_write_pde(ppgtt, pde, pt);
1745
1746 mark_tlbs_dirty(ppgtt);
> 1747 gen6_ggtt_invalidate(ppgtt->vm.i915);
1748 }
1749
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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2018-06-05 20:16 [PATCH] drm/i915/gtt: Invalidate GGTT caches after writing the gen6 page directories Chris Wilson
2018-06-05 20:36 ` ✗ Fi.CI.BAT: failure for " Patchwork
2018-06-06 18:07 ` [PATCH] " kbuild test robot
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