From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from smtp.codeaurora.org by pdx-caf-mail.web.codeaurora.org (Dovecot) with LMTP id QRMjNh40GVu0UAAAmS7hNA ; Thu, 07 Jun 2018 13:33:18 +0000 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id CD24C608B8; Thu, 7 Jun 2018 13:33:18 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI autolearn=ham autolearn_force=no version=3.4.0 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by smtp.codeaurora.org (Postfix) with ESMTP id 6831E606DD; Thu, 7 Jun 2018 13:33:18 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 6831E606DD Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932742AbeFGNdQ (ORCPT + 25 others); Thu, 7 Jun 2018 09:33:16 -0400 Received: from mga17.intel.com ([192.55.52.151]:57512 "EHLO mga17.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932152AbeFGNdP (ORCPT ); Thu, 7 Jun 2018 09:33:15 -0400 X-Amp-Result: UNKNOWN X-Amp-Original-Verdict: FILE UNKNOWN X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga107.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 07 Jun 2018 06:33:14 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.49,486,1520924400"; d="scan'208";a="62093103" Received: from um.fi.intel.com (HELO um) ([10.237.72.212]) by fmsmga001.fm.intel.com with ESMTP; 07 Jun 2018 06:33:08 -0700 Received: from ash by um with local (Exim 4.91) (envelope-from ) id 1fQv2I-0004Hj-Kw; Thu, 07 Jun 2018 16:33:06 +0300 Date: Thu, 7 Jun 2018 16:33:06 +0300 From: Alexander Shishkin To: Luwei Kang Cc: kvm@vger.kernel.org, tglx@linutronix.de, mingo@redhat.com, hpa@zytor.com, x86@kernel.org, chao.p.peng@linux.intel.com, thomas.lendacky@amd.com, bp@suse.de, Kan.liang@intel.com, Janakarajan.Natarajan@amd.com, dwmw@amazon.co.uk, linux-kernel@vger.kernel.org, alexander.shishkin@linux.intel.com, peterz@infradead.org, mathieu.poirier@linaro.org, kstewart@linuxfoundation.org, gregkh@linuxfoundation.org, pbonzini@redhat.com, rkrcmar@redhat.com, david@redhat.com, bsd@redhat.com, yu.c.zhang@linux.intel.com, joro@8bytes.org Subject: Re: [PATCH v9 03/12] perf/x86/intel/pt: Add new bit definitions for Intel PT MSRs Message-ID: <20180607133306.vcrtxidfzv7x7e73@um.fi.intel.com> References: <1526964735-16566-1-git-send-email-luwei.kang@intel.com> <1526964735-16566-4-git-send-email-luwei.kang@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1526964735-16566-4-git-send-email-luwei.kang@intel.com> User-Agent: NeoMutt/20180323 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, May 22, 2018 at 12:52:06PM +0800, Luwei Kang wrote: > These bit definitions are use for emulate MSRs read/write > for KVM. For example, IA32_RTIT_CTL.FabricEn[bit 6] is available > only when CPUID.(EAX=14H, ECX=0):ECX[bit 3] = 1. If KVM guest > try to set this bit with CPUID.(EAX=14H, ECX=0):ECX[bit3] = 0 > a #GP would be injected to KVM guest. Do we have anything in the guest that this feature will work with? Regards, -- Alex