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Miller" , Christoph Muellner Subject: Re: [PATCH 04/24] 32-bit userspace ABI: introduce ARCH_32BIT_OFF_T config option Message-ID: <20180611112736.GA19952@yury-thinkpad> References: <20180516081910.10067-1-ynorov@caviumnetworks.com> <20180516081910.10067-5-ynorov@caviumnetworks.com> <20180608173207.nwoi25jee52gpdwy@armageddon.cambridge.arm.com> <20180609074227.GA6810@yury-thinkpad> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.9.4 (2018-02-28) X-Originating-IP: [5.63.162.243] X-ClientProxiedBy: HE1PR02CA0112.eurprd02.prod.outlook.com (2603:10a6:7:29::41) To BN7PR07MB4371.namprd07.prod.outlook.com (2603:10b6:406:b5::11) X-MS-PublicTrafficType: Email X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:(7020095)(4652020)(5600026)(4534165)(4627221)(201703031133081)(201702281549075)(2017052603328)(7153060)(7193020);SRVR:BN7PR07MB4371; X-Microsoft-Exchange-Diagnostics: 1;BN7PR07MB4371;3:pfhhU+Hlu+oZ8JmqVnTMf/eQYt0x1Th38XtzLSPdIaPPxHpUJ/YTwRlnoI3YmD5fKSFCz+J5INDKKL0JXexq0YxPjUxeA2DGr4bAuYQR+3dSkzwyH9YpQ+tjxbAqx9GmAoHUz9bm3rS8rm1sGfVHLxesCWPvzANaUEDjSCrxYXcOFU2W/cH+p2piLubZi6x1R8yPUdz10C6qKxlkOsDdEyITnIKEe86FMbBYZmWNZkmAwfHM+uq5UCETCkmUbQrQ;25:SBZf6X+XUkmINoGUfsGjb6RQtYfXPpWrHwHSoLaZOIUfMCx1Gl1cHONHH4cwJOgSsRmx5D2Ckk6QXugSCF+0sOZERDZAhebNp2Jwjk1fIDvXFOdj9aeFpbioA622BzFqwGdNlh3FOH8tYB2MHmX3I/k+B4et2FPoZ2z7KzcnJiq0v6RxSC/cnt4e/UI2zo1IbgzPu5pxqrHWwFW6rPxI5EmmjXqgrmFVHsr0f8Xv7prPD9mKA/CdUr/S0cD8iJ03tU2KroODayLDBhv4lyPazg6z+b0OScH5dRdwfidCAdnsId+edeRHuH8my0+rvMpBtO2iktvsnuPkfwy8DI4z8g==;31:bWK2l2m7LGQTOslpxk9B5NftSiLwBv6ZJgt7muWj4aT4VSmbgQFVgo1FfzWdtKHvkUGJQFMv0VexMpbQTVvex6WOgwHtU8YGl7ql9dop1tcfGrY2Eq/87FS+mYsNEhclrS8sdV48CnsmnZ4bxa00t2JF9i/RJ5cxFOz4Aj3EqIIRVTbu9mnrvUL5PRSBZmfAv8avgt5OSU4bEJxbx/SwRZjf5iYA3iGS/+iZfubhJ6M= X-MS-TrafficTypeDiagnostic: BN7PR07MB4371: X-Microsoft-Exchange-Diagnostics: 1;BN7PR07MB4371;20:g2WNXsuLsWgIXvmWON5YvW2eZknB0efzB+9kwrj8wehF7amp0YGUmvNWFSUnpMKlZdqanI/4MJRMCpQ5q5yerFEHHw1MDy7r1Izyr5oChGyp9xvbwPfAXViuAn1Xwqe0jUmTIHOFUE8taYtllPICB3b5A4mhoKsQ75UyIvcz3DhAM9qG0fKPTm+yrp12ZlyJpKLUY5TaEVpeWS/o8fc7XNP4Le5yUG2UF23xv9PPVTuTbwX2m/0iUKHyw7HNSFu5CWpI/d1IX2fHJlMMl1yO2G9saTvZiaioPr2RRZw8JXUjEHJcLL+2pAYjuyzibS0i+ORDMhUniFOhkblQ91Tb57HjjVRcxAtl+42wUF67of+o9Uqc40YFO1OClyaXzH1YIFiQvpmMBHLBF3ahR5Bt89+7wvGfIavza16VG0wlI7I0dkD+FFaw4nqnYx2j4jNJJx6sweMsfvmlAOLfyBpybsyiWdCdTLoh+3d2WiUdQeba+7ZtIVFiu/mOZ2FNPQGTB643FGZ5VlsYTGAA0GatB03WRZ1SGhCzCW5w+gU3SQ8ktyZfhWmbS7vD/q1Bfe8CS494sb1mjTIser/p+DyqYrQYmbF5zZUHJaC7ZJrEMOs=;4:AXhrPXUBsd4FANG9Gy5vZSR7ROfZIwemykwxs+x3lQFTf840I6Cc5Rae4KVOIQ4jTunGYYfR6GQK1Nw0rUVVddx1TwAv99VVtBgV3YFlEZkHxWnXv7p9sKPyEH0NWRg9+6BxIy6jpZxxHQz0Tixhurqwsz3tLsg5yISsDnx6aAInC6PHUY5uxSiuO0VpAXkwQdBsyvKhUfxkUgAwvIQCCdy0pld71xq/qym/yX1G1R2DpDq423KucQNZ5CbzdK2u77q50UaMcxbWWeXvUOKnqw== X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:; 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This > >> > + is the requirement for modern ABIs. Some existing architectures > >> > + already have 32-bit off_t. This option is enabled for all such > >> > + architectures explicitly. Namely: arc, arm, blackfin, cris, frv, > >> > + h8300, hexagon, m32r, m68k, metag, microblaze, mips32, mn10300, > >> > + nios2, openrisc, parisc32, powerpc32, score, sh, sparc, tile32, > >> > + unicore32, x86_32 and xtensa. This is the complete list. Any > >> > + new 32-bit architecture should declare 64-bit off_t type on user > >> > + side and so should not enable this option. > >> > >> Do you know if this is the case for riscv and nds32, merged in the > >> meantime? If not, I suggest you drop this patch altogether and just > >> define force_o_largefile() for arm64/ilp32 as we don't seem to stick to > >> "all new 32-bit architectures should have 64-bit off_t". > > > > I wrote this patch at request of Arnd Bergmann. This is actually his > > words that all new 32-bit architectures should have 64-bit off_t. So > > I was surprized when riscv was merged with 32-bit off_t (and I didn't > > follow nds32). > > > > If this rule is still in force, we'd better add new exceptions to this > > patch. Otherwise, we can drop it. > > > > Arnd, could you please comment it? > > I completely forgot about it and had assumed that it was merged long > ago, sorry about that. Hi Arnd, There are 3 patches like this in ILP32 series that change ABI for new targets. I've submitted them in separated series: https://lkml.org/lkml/2017/9/25/574 They all seems to be acked by you. If you ready to upstream the series, I can rebase it and add riscv32 and nds32 exceptions. If Palmer and riscv people will decide to follow new rules, we can easily drop the exception. Yury From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.1 (2015-04-28) on archive.lwn.net X-Spam-Level: X-Spam-Status: No, score=-5.6 required=5.0 tests=DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by archive.lwn.net (Postfix) with ESMTP id 370EC7D048 for ; Mon, 11 Jun 2018 11:28:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932825AbeFKL2H (ORCPT ); Mon, 11 Jun 2018 07:28:07 -0400 Received: from mail-sn1nam01on0089.outbound.protection.outlook.com ([104.47.32.89]:2085 "EHLO NAM01-SN1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S932765AbeFKL2E (ORCPT ); Mon, 11 Jun 2018 07:28:04 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=CAVIUMNETWORKS.onmicrosoft.com; s=selector1-cavium-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=/tt20yBFDMxXD3V3KJricrrA+NlZgMUMYOg/9789LXE=; b=f3W53pIrnZ2nHC2LSBO+VURItncsBzvEAe4TBKQsH3XpfskDYrdrrb4pgzyiXCmVHga32EG5WhHRcKdEmknFKaG1GpQC0a7Zo6RsLIu+fXFZOBFlSBu6IrcX5qYxCvncqEFMsmwBTPmZ7joSvSbuA+jtcRK+SZZnvB3tibcz3MM= Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=Yuri.Norov@cavium.com; Received: from localhost (5.63.162.243) by BN7PR07MB4371.namprd07.prod.outlook.com (2603:10b6:406:b5::11) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.841.17; Mon, 11 Jun 2018 11:27:57 +0000 Date: Mon, 11 Jun 2018 14:27:36 +0300 From: Yury Norov To: Arnd Bergmann Cc: Catalin Marinas , Linux ARM , Linux Kernel Mailing List , "open list:DOCUMENTATION" , linux-arch , Linux API , Szabolcs Nagy , Heiko Carstens , Philipp Tomsich , Joseph Myers , Steve Ellcey , Prasun Kapoor , Andreas Schwab , Alexander Graf , Bamvor Zhangjian , Geert Uytterhoeven , Dave Martin , Adam Borowski , Manuel Montezelo , James Hogan , Chris Metcalf , Andrew Pinski , Lin Yongting , Alexey Klimov , Mark Brown , Maxim Kuvyrkov , Florian Weimer , Nathan_Lynch , James Morse , Ramana Radhakrishnan , Martin Schwidefsky , "David S . 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This > >> > + is the requirement for modern ABIs. Some existing architectures > >> > + already have 32-bit off_t. This option is enabled for all such > >> > + architectures explicitly. Namely: arc, arm, blackfin, cris, frv, > >> > + h8300, hexagon, m32r, m68k, metag, microblaze, mips32, mn10300, > >> > + nios2, openrisc, parisc32, powerpc32, score, sh, sparc, tile32, > >> > + unicore32, x86_32 and xtensa. This is the complete list. Any > >> > + new 32-bit architecture should declare 64-bit off_t type on user > >> > + side and so should not enable this option. > >> > >> Do you know if this is the case for riscv and nds32, merged in the > >> meantime? If not, I suggest you drop this patch altogether and just > >> define force_o_largefile() for arm64/ilp32 as we don't seem to stick to > >> "all new 32-bit architectures should have 64-bit off_t". > > > > I wrote this patch at request of Arnd Bergmann. This is actually his > > words that all new 32-bit architectures should have 64-bit off_t. So > > I was surprized when riscv was merged with 32-bit off_t (and I didn't > > follow nds32). > > > > If this rule is still in force, we'd better add new exceptions to this > > patch. Otherwise, we can drop it. > > > > Arnd, could you please comment it? > > I completely forgot about it and had assumed that it was merged long > ago, sorry about that. Hi Arnd, There are 3 patches like this in ILP32 series that change ABI for new targets. I've submitted them in separated series: https://lkml.org/lkml/2017/9/25/574 They all seems to be acked by you. If you ready to upstream the series, I can rebase it and add riscv32 and nds32 exceptions. If Palmer and riscv people will decide to follow new rules, we can easily drop the exception. Yury -- To unsubscribe from this list: send the line "unsubscribe linux-doc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html From mboxrd@z Thu Jan 1 00:00:00 1970 From: Yury Norov Subject: Re: [PATCH 04/24] 32-bit userspace ABI: introduce ARCH_32BIT_OFF_T config option Date: Mon, 11 Jun 2018 14:27:36 +0300 Message-ID: <20180611112736.GA19952@yury-thinkpad> References: <20180516081910.10067-1-ynorov@caviumnetworks.com> <20180516081910.10067-5-ynorov@caviumnetworks.com> <20180608173207.nwoi25jee52gpdwy@armageddon.cambridge.arm.com> <20180609074227.GA6810@yury-thinkpad> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Content-Disposition: inline In-Reply-To: Sender: linux-kernel-owner@vger.kernel.org To: Arnd Bergmann Cc: Catalin Marinas , Linux ARM , Linux Kernel Mailing List , "open list:DOCUMENTATION" , linux-arch , Linux API , Szabolcs Nagy , Heiko Carstens , Philipp Tomsich , Joseph Myers , Steve Ellcey , Prasun Kapoor , Andreas Schwab , Alexander Graf , Bamvor Zhangjian , Geert Uytterhoeven , Dave Martin , Adam Borowski List-Id: linux-api@vger.kernel.org On Mon, Jun 11, 2018 at 09:48:02AM +0200, Arnd Bergmann wrote: > On Sat, Jun 9, 2018 at 9:42 AM, Yury Norov wrote: > > On Fri, Jun 08, 2018 at 06:32:07PM +0100, Catalin Marinas wrote: > >> On Wed, May 16, 2018 at 11:18:49AM +0300, Yury Norov wrote: > >> > diff --git a/arch/Kconfig b/arch/Kconfig > >> > index 76c0b54443b1..ee079244dc3c 100644 > >> > --- a/arch/Kconfig > >> > +++ b/arch/Kconfig > >> > @@ -264,6 +264,21 @@ config ARCH_THREAD_STACK_ALLOCATOR > >> > config ARCH_WANTS_DYNAMIC_TASK_STRUCT > >> > bool > >> > > >> > +config ARCH_32BIT_OFF_T > >> > + bool > >> > + depends on !64BIT > >> > + help > >> > + All new 32-bit architectures should have 64-bit off_t type on > >> > + userspace side which corresponds to the loff_t kernel type. This > >> > + is the requirement for modern ABIs. Some existing architectures > >> > + already have 32-bit off_t. This option is enabled for all such > >> > + architectures explicitly. Namely: arc, arm, blackfin, cris, frv, > >> > + h8300, hexagon, m32r, m68k, metag, microblaze, mips32, mn10300, > >> > + nios2, openrisc, parisc32, powerpc32, score, sh, sparc, tile32, > >> > + unicore32, x86_32 and xtensa. This is the complete list. Any > >> > + new 32-bit architecture should declare 64-bit off_t type on user > >> > + side and so should not enable this option. > >> > >> Do you know if this is the case for riscv and nds32, merged in the > >> meantime? If not, I suggest you drop this patch altogether and just > >> define force_o_largefile() for arm64/ilp32 as we don't seem to stick to > >> "all new 32-bit architectures should have 64-bit off_t". > > > > I wrote this patch at request of Arnd Bergmann. This is actually his > > words that all new 32-bit architectures should have 64-bit off_t. So > > I was surprized when riscv was merged with 32-bit off_t (and I didn't > > follow nds32). > > > > If this rule is still in force, we'd better add new exceptions to this > > patch. Otherwise, we can drop it. > > > > Arnd, could you please comment it? > > I completely forgot about it and had assumed that it was merged long > ago, sorry about that. Hi Arnd, There are 3 patches like this in ILP32 series that change ABI for new targets. I've submitted them in separated series: https://lkml.org/lkml/2017/9/25/574 They all seems to be acked by you. If you ready to upstream the series, I can rebase it and add riscv32 and nds32 exceptions. If Palmer and riscv people will decide to follow new rules, we can easily drop the exception. Yury From mboxrd@z Thu Jan 1 00:00:00 1970 From: ynorov@caviumnetworks.com (Yury Norov) Date: Mon, 11 Jun 2018 14:27:36 +0300 Subject: [PATCH 04/24] 32-bit userspace ABI: introduce ARCH_32BIT_OFF_T config option In-Reply-To: References: <20180516081910.10067-1-ynorov@caviumnetworks.com> <20180516081910.10067-5-ynorov@caviumnetworks.com> <20180608173207.nwoi25jee52gpdwy@armageddon.cambridge.arm.com> <20180609074227.GA6810@yury-thinkpad> Message-ID: <20180611112736.GA19952@yury-thinkpad> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Mon, Jun 11, 2018 at 09:48:02AM +0200, Arnd Bergmann wrote: > On Sat, Jun 9, 2018 at 9:42 AM, Yury Norov wrote: > > On Fri, Jun 08, 2018 at 06:32:07PM +0100, Catalin Marinas wrote: > >> On Wed, May 16, 2018 at 11:18:49AM +0300, Yury Norov wrote: > >> > diff --git a/arch/Kconfig b/arch/Kconfig > >> > index 76c0b54443b1..ee079244dc3c 100644 > >> > --- a/arch/Kconfig > >> > +++ b/arch/Kconfig > >> > @@ -264,6 +264,21 @@ config ARCH_THREAD_STACK_ALLOCATOR > >> > config ARCH_WANTS_DYNAMIC_TASK_STRUCT > >> > bool > >> > > >> > +config ARCH_32BIT_OFF_T > >> > + bool > >> > + depends on !64BIT > >> > + help > >> > + All new 32-bit architectures should have 64-bit off_t type on > >> > + userspace side which corresponds to the loff_t kernel type. This > >> > + is the requirement for modern ABIs. Some existing architectures > >> > + already have 32-bit off_t. This option is enabled for all such > >> > + architectures explicitly. Namely: arc, arm, blackfin, cris, frv, > >> > + h8300, hexagon, m32r, m68k, metag, microblaze, mips32, mn10300, > >> > + nios2, openrisc, parisc32, powerpc32, score, sh, sparc, tile32, > >> > + unicore32, x86_32 and xtensa. This is the complete list. Any > >> > + new 32-bit architecture should declare 64-bit off_t type on user > >> > + side and so should not enable this option. > >> > >> Do you know if this is the case for riscv and nds32, merged in the > >> meantime? If not, I suggest you drop this patch altogether and just > >> define force_o_largefile() for arm64/ilp32 as we don't seem to stick to > >> "all new 32-bit architectures should have 64-bit off_t". > > > > I wrote this patch at request of Arnd Bergmann. This is actually his > > words that all new 32-bit architectures should have 64-bit off_t. So > > I was surprized when riscv was merged with 32-bit off_t (and I didn't > > follow nds32). > > > > If this rule is still in force, we'd better add new exceptions to this > > patch. Otherwise, we can drop it. > > > > Arnd, could you please comment it? > > I completely forgot about it and had assumed that it was merged long > ago, sorry about that. Hi Arnd, There are 3 patches like this in ILP32 series that change ABI for new targets. I've submitted them in separated series: https://lkml.org/lkml/2017/9/25/574 They all seems to be acked by you. If you ready to upstream the series, I can rebase it and add riscv32 and nds32 exceptions. If Palmer and riscv people will decide to follow new rules, we can easily drop the exception. Yury