From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from gloria.sntech.de ([95.129.55.99]:54436 "EHLO gloria.sntech.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932914AbeFLNUs (ORCPT ); Tue, 12 Jun 2018 09:20:48 -0400 From: Heiko Stuebner To: dri-devel@lists.freedesktop.org Cc: linux-rockchip@lists.infradead.org, ezequiel@collabora.com, tfiga@chromium.org, robin.murphy@arm.com, marc.zyngier@arm.com, jeffy.chen@rock-chips.com, hjc@rock-chips.com, enric.balletbo@collabora.co.uk, tomeu.vizoso@collabora.co.uk, Heiko Stuebner , stable@vger.kernel.org Subject: [PATCH v4 1/2] drm/rockchip: vop: split out core clock enablement into separate functions Date: Tue, 12 Jun 2018 15:20:27 +0200 Message-Id: <20180612132028.27490-2-heiko@sntech.de> In-Reply-To: <20180612132028.27490-1-heiko@sntech.de> References: <20180612132028.27490-1-heiko@sntech.de> Sender: stable-owner@vger.kernel.org List-ID: Judging from the iommu code, both the hclk and aclk are necessary for register access. Split them off into separate functions from the regular vop enablement, so that we can use them elsewhere as well. Fixes: d0b912bd4c23 ("iommu/rockchip: Request irqs in rk_iommu_probe()") Cc: stable@vger.kernel.org Signed-off-by: Heiko Stuebner Tested-by: Ezequiel Garcia --- drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 44 +++++++++++++++------ 1 file changed, 31 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c index 2121345a61af..9a1f272e41c7 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c @@ -486,6 +486,31 @@ static void vop_line_flag_irq_disable(struct vop *vop) spin_unlock_irqrestore(&vop->irq_lock, flags); } +static int vop_core_clks_enable(struct vop *vop) +{ + int ret; + + ret = clk_enable(vop->hclk); + if (ret < 0) + return ret; + + ret = clk_enable(vop->aclk); + if (ret < 0) + goto err_disable_hclk; + + return 0; + +err_disable_hclk: + clk_disable(vop->hclk); + return ret; +} + +static void vop_core_clks_disable(struct vop *vop) +{ + clk_disable(vop->aclk); + clk_disable(vop->hclk); +} + static int vop_enable(struct drm_crtc *crtc) { struct vop *vop = to_vop(crtc); @@ -497,17 +522,13 @@ static int vop_enable(struct drm_crtc *crtc) return ret; } - ret = clk_enable(vop->hclk); + ret = vop_core_clks_enable(vop); if (WARN_ON(ret < 0)) goto err_put_pm_runtime; ret = clk_enable(vop->dclk); if (WARN_ON(ret < 0)) - goto err_disable_hclk; - - ret = clk_enable(vop->aclk); - if (WARN_ON(ret < 0)) - goto err_disable_dclk; + goto err_disable_core; /* * Slave iommu shares power, irq and clock with vop. It was associated @@ -519,7 +540,7 @@ static int vop_enable(struct drm_crtc *crtc) if (ret) { DRM_DEV_ERROR(vop->dev, "failed to attach dma mapping, %d\n", ret); - goto err_disable_aclk; + goto err_disable_dclk; } spin_lock(&vop->reg_lock); @@ -558,12 +579,10 @@ static int vop_enable(struct drm_crtc *crtc) return 0; -err_disable_aclk: - clk_disable(vop->aclk); err_disable_dclk: clk_disable(vop->dclk); -err_disable_hclk: - clk_disable(vop->hclk); +err_disable_core: + vop_core_clks_disable(vop); err_put_pm_runtime: pm_runtime_put_sync(vop->dev); return ret; @@ -609,8 +628,7 @@ static void vop_crtc_atomic_disable(struct drm_crtc *crtc, rockchip_drm_dma_detach_device(vop->drm_dev, vop->dev); clk_disable(vop->dclk); - clk_disable(vop->aclk); - clk_disable(vop->hclk); + vop_core_clks_disable(vop); pm_runtime_put(vop->dev); mutex_unlock(&vop->vop_lock); -- 2.17.0 From mboxrd@z Thu Jan 1 00:00:00 1970 From: Heiko Stuebner Subject: [PATCH v4 1/2] drm/rockchip: vop: split out core clock enablement into separate functions Date: Tue, 12 Jun 2018 15:20:27 +0200 Message-ID: <20180612132028.27490-2-heiko@sntech.de> References: <20180612132028.27490-1-heiko@sntech.de> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <20180612132028.27490-1-heiko@sntech.de> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: dri-devel@lists.freedesktop.org Cc: marc.zyngier@arm.com, robin.murphy@arm.com, jeffy.chen@rock-chips.com, stable@vger.kernel.org, tfiga@chromium.org, linux-rockchip@lists.infradead.org, enric.balletbo@collabora.co.uk, tomeu.vizoso@collabora.co.uk, ezequiel@collabora.com List-Id: linux-rockchip.vger.kernel.org SnVkZ2luZyBmcm9tIHRoZSBpb21tdSBjb2RlLCBib3RoIHRoZSBoY2xrIGFuZCBhY2xrIGFyZSBu ZWNlc3NhcnkgZm9yCnJlZ2lzdGVyIGFjY2Vzcy4gU3BsaXQgdGhlbSBvZmYgaW50byBzZXBhcmF0 ZSBmdW5jdGlvbnMgZnJvbSB0aGUgcmVndWxhcgp2b3AgZW5hYmxlbWVudCwgc28gdGhhdCB3ZSBj YW4gdXNlIHRoZW0gZWxzZXdoZXJlIGFzIHdlbGwuCgpGaXhlczogZDBiOTEyYmQ0YzIzICgiaW9t bXUvcm9ja2NoaXA6IFJlcXVlc3QgaXJxcyBpbiBya19pb21tdV9wcm9iZSgpIikKQ2M6IHN0YWJs ZUB2Z2VyLmtlcm5lbC5vcmcKU2lnbmVkLW9mZi1ieTogSGVpa28gU3R1ZWJuZXIgPGhlaWtvQHNu dGVjaC5kZT4KVGVzdGVkLWJ5OiBFemVxdWllbCBHYXJjaWEgPGV6ZXF1aWVsQGNvbGxhYm9yYS5j b20+Ci0tLQogZHJpdmVycy9ncHUvZHJtL3JvY2tjaGlwL3JvY2tjaGlwX2RybV92b3AuYyB8IDQ0 ICsrKysrKysrKysrKysrKy0tLS0tLQogMSBmaWxlIGNoYW5nZWQsIDMxIGluc2VydGlvbnMoKyks IDEzIGRlbGV0aW9ucygtKQoKZGlmZiAtLWdpdCBhL2RyaXZlcnMvZ3B1L2RybS9yb2NrY2hpcC9y b2NrY2hpcF9kcm1fdm9wLmMgYi9kcml2ZXJzL2dwdS9kcm0vcm9ja2NoaXAvcm9ja2NoaXBfZHJt X3ZvcC5jCmluZGV4IDIxMjEzNDVhNjFhZi4uOWExZjI3MmU0MWM3IDEwMDY0NAotLS0gYS9kcml2 ZXJzL2dwdS9kcm0vcm9ja2NoaXAvcm9ja2NoaXBfZHJtX3ZvcC5jCisrKyBiL2RyaXZlcnMvZ3B1 L2RybS9yb2NrY2hpcC9yb2NrY2hpcF9kcm1fdm9wLmMKQEAgLTQ4Niw2ICs0ODYsMzEgQEAgc3Rh dGljIHZvaWQgdm9wX2xpbmVfZmxhZ19pcnFfZGlzYWJsZShzdHJ1Y3Qgdm9wICp2b3ApCiAJc3Bp bl91bmxvY2tfaXJxcmVzdG9yZSgmdm9wLT5pcnFfbG9jaywgZmxhZ3MpOwogfQogCitzdGF0aWMg aW50IHZvcF9jb3JlX2Nsa3NfZW5hYmxlKHN0cnVjdCB2b3AgKnZvcCkKK3sKKwlpbnQgcmV0Owor CisJcmV0ID0gY2xrX2VuYWJsZSh2b3AtPmhjbGspOworCWlmIChyZXQgPCAwKQorCQlyZXR1cm4g cmV0OworCisJcmV0ID0gY2xrX2VuYWJsZSh2b3AtPmFjbGspOworCWlmIChyZXQgPCAwKQorCQln b3RvIGVycl9kaXNhYmxlX2hjbGs7CisKKwlyZXR1cm4gMDsKKworZXJyX2Rpc2FibGVfaGNsazoK KwljbGtfZGlzYWJsZSh2b3AtPmhjbGspOworCXJldHVybiByZXQ7Cit9CisKK3N0YXRpYyB2b2lk IHZvcF9jb3JlX2Nsa3NfZGlzYWJsZShzdHJ1Y3Qgdm9wICp2b3ApCit7CisJY2xrX2Rpc2FibGUo dm9wLT5hY2xrKTsKKwljbGtfZGlzYWJsZSh2b3AtPmhjbGspOworfQorCiBzdGF0aWMgaW50IHZv cF9lbmFibGUoc3RydWN0IGRybV9jcnRjICpjcnRjKQogewogCXN0cnVjdCB2b3AgKnZvcCA9IHRv X3ZvcChjcnRjKTsKQEAgLTQ5NywxNyArNTIyLDEzIEBAIHN0YXRpYyBpbnQgdm9wX2VuYWJsZShz dHJ1Y3QgZHJtX2NydGMgKmNydGMpCiAJCXJldHVybiByZXQ7CiAJfQogCi0JcmV0ID0gY2xrX2Vu YWJsZSh2b3AtPmhjbGspOworCXJldCA9IHZvcF9jb3JlX2Nsa3NfZW5hYmxlKHZvcCk7CiAJaWYg KFdBUk5fT04ocmV0IDwgMCkpCiAJCWdvdG8gZXJyX3B1dF9wbV9ydW50aW1lOwogCiAJcmV0ID0g Y2xrX2VuYWJsZSh2b3AtPmRjbGspOwogCWlmIChXQVJOX09OKHJldCA8IDApKQotCQlnb3RvIGVy cl9kaXNhYmxlX2hjbGs7Ci0KLQlyZXQgPSBjbGtfZW5hYmxlKHZvcC0+YWNsayk7Ci0JaWYgKFdB Uk5fT04ocmV0IDwgMCkpCi0JCWdvdG8gZXJyX2Rpc2FibGVfZGNsazsKKwkJZ290byBlcnJfZGlz YWJsZV9jb3JlOwogCiAJLyoKIAkgKiBTbGF2ZSBpb21tdSBzaGFyZXMgcG93ZXIsIGlycSBhbmQg Y2xvY2sgd2l0aCB2b3AuICBJdCB3YXMgYXNzb2NpYXRlZApAQCAtNTE5LDcgKzU0MCw3IEBAIHN0 YXRpYyBpbnQgdm9wX2VuYWJsZShzdHJ1Y3QgZHJtX2NydGMgKmNydGMpCiAJaWYgKHJldCkgewog CQlEUk1fREVWX0VSUk9SKHZvcC0+ZGV2LAogCQkJICAgICAgImZhaWxlZCB0byBhdHRhY2ggZG1h IG1hcHBpbmcsICVkXG4iLCByZXQpOwotCQlnb3RvIGVycl9kaXNhYmxlX2FjbGs7CisJCWdvdG8g ZXJyX2Rpc2FibGVfZGNsazsKIAl9CiAKIAlzcGluX2xvY2soJnZvcC0+cmVnX2xvY2spOwpAQCAt NTU4LDEyICs1NzksMTAgQEAgc3RhdGljIGludCB2b3BfZW5hYmxlKHN0cnVjdCBkcm1fY3J0YyAq Y3J0YykKIAogCXJldHVybiAwOwogCi1lcnJfZGlzYWJsZV9hY2xrOgotCWNsa19kaXNhYmxlKHZv cC0+YWNsayk7CiBlcnJfZGlzYWJsZV9kY2xrOgogCWNsa19kaXNhYmxlKHZvcC0+ZGNsayk7Ci1l cnJfZGlzYWJsZV9oY2xrOgotCWNsa19kaXNhYmxlKHZvcC0+aGNsayk7CitlcnJfZGlzYWJsZV9j b3JlOgorCXZvcF9jb3JlX2Nsa3NfZGlzYWJsZSh2b3ApOwogZXJyX3B1dF9wbV9ydW50aW1lOgog CXBtX3J1bnRpbWVfcHV0X3N5bmModm9wLT5kZXYpOwogCXJldHVybiByZXQ7CkBAIC02MDksOCAr NjI4LDcgQEAgc3RhdGljIHZvaWQgdm9wX2NydGNfYXRvbWljX2Rpc2FibGUoc3RydWN0IGRybV9j cnRjICpjcnRjLAogCXJvY2tjaGlwX2RybV9kbWFfZGV0YWNoX2RldmljZSh2b3AtPmRybV9kZXYs IHZvcC0+ZGV2KTsKIAogCWNsa19kaXNhYmxlKHZvcC0+ZGNsayk7Ci0JY2xrX2Rpc2FibGUodm9w LT5hY2xrKTsKLQljbGtfZGlzYWJsZSh2b3AtPmhjbGspOworCXZvcF9jb3JlX2Nsa3NfZGlzYWJs ZSh2b3ApOwogCXBtX3J1bnRpbWVfcHV0KHZvcC0+ZGV2KTsKIAltdXRleF91bmxvY2soJnZvcC0+ dm9wX2xvY2spOwogCi0tIAoyLjE3LjAKCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fCmRyaS1kZXZlbCBtYWlsaW5nIGxpc3QKZHJpLWRldmVsQGxpc3RzLmZy ZWVkZXNrdG9wLm9yZwpodHRwczovL2xpc3RzLmZyZWVkZXNrdG9wLm9yZy9tYWlsbWFuL2xpc3Rp bmZvL2RyaS1kZXZlbAo=