From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail.linutronix.de (146.0.238.70:993) by crypto-ml.lab.linutronix.de with IMAP4-SSL for ; 22 Jun 2018 16:56:56 -0000 Received: from mga03.intel.com ([134.134.136.65]) by Galois.linutronix.de with esmtps (TLS1.2:DHE_RSA_AES_256_CBC_SHA256:256) (Exim 4.80) (envelope-from ) id 1fWPMl-0000VT-0b for speck@linutronix.de; Fri, 22 Jun 2018 18:56:55 +0200 Date: Fri, 22 Jun 2018 09:56:52 -0700 From: Andi Kleen Subject: [MODERATED] Re: [PATCH 8/8] L1TFv8 6 Message-ID: <20180622165652.GX30690@tassilo.jf.intel.com> References: <20180614150632.E064C61183@crypto-ml.lab.linutronix.de> <4ad5c4d2-7721-729e-3af6-6c8ed84dda9f@suse.cz> <260fce1e-c5fe-cace-56a8-a83c2a41f115@suse.cz> MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit To: speck@linutronix.de List-ID: > Because the macro machinery doesn't expect the arch-dependent swap entry > format to be 32bit and pte to be 64bit, the results is even more macros, > sorry about that. Seems ugly and complicated. Perhaps it's better to just sacrifice the three bits. Doubt anyone will really need it anyways, especially not on 32bit systems. -Andi