From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jani Nikula Subject: [PATCH] drm/i915: encourage BIT() macro usage in register definitions Date: Wed, 27 Jun 2018 17:41:13 +0300 Message-ID: <20180627144113.6989-1-jani.nikula@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by gabe.freedesktop.org (Postfix) with ESMTPS id E4F546E058 for ; Wed, 27 Jun 2018 14:41:27 +0000 (UTC) List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: intel-gfx@lists.freedesktop.org Cc: jani.nikula@intel.com, Paulo Zanoni List-Id: intel-gfx@lists.freedesktop.org VGhlcmUncyBhbHJlYWR5IHNvbWUgQklUKCkgdXNhZ2UgaGVyZSBhbmQgdGhlcmUsIGVtYnJhY2Ug aXQuCgpDYzogUGF1bG8gWmFub25pIDxwYXVsby5yLnphbm9uaUBpbnRlbC5jb20+ClNpZ25lZC1v ZmYtYnk6IEphbmkgTmlrdWxhIDxqYW5pLm5pa3VsYUBpbnRlbC5jb20+Ci0tLQogZHJpdmVycy9n cHUvZHJtL2k5MTUvaTkxNV9yZWcuaCB8IDkgKysrKystLS0tCiAxIGZpbGUgY2hhbmdlZCwgNSBp bnNlcnRpb25zKCspLCA0IGRlbGV0aW9ucygtKQoKZGlmZiAtLWdpdCBhL2RyaXZlcnMvZ3B1L2Ry bS9pOTE1L2k5MTVfcmVnLmggYi9kcml2ZXJzL2dwdS9kcm0vaTkxNS9pOTE1X3JlZy5oCmluZGV4 IDQ3NjExOGY0NmNmMy4uNjRiOWMyNzAwNDVkIDEwMDY0NAotLS0gYS9kcml2ZXJzL2dwdS9kcm0v aTkxNS9pOTE1X3JlZy5oCisrKyBiL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2k5MTVfcmVnLmgKQEAg LTY1LDkgKzY1LDEwIEBACiAgKiBidXQgZG8gbm90ZSB0aGF0IHRoZSBtYWNyb3MgbWF5IGJlIG5l ZWRlZCB0byByZWFkIGFzIHdlbGwgYXMgd3JpdGUgdGhlCiAgKiByZWdpc3RlciBjb250ZW50cy4K ICAqCi0gKiBEZWZpbmUgYml0cyB1c2luZyBgYCgxIDw8IE4pYGAgaW5zdGVhZCBvZiBgYEJJVChO KWBgLiBXZSBtYXkgY2hhbmdlIHRoaXMgaW4KLSAqIHRoZSBmdXR1cmUsIGJ1dCB0aGlzIGlzIHRo ZSBwcmV2YWlsaW5nIHN0eWxlLiBEbyAqKm5vdCoqIGFkZCBgYF9CSVRgYCBzdWZmaXgKLSAqIHRv IHRoZSBuYW1lLgorICogRGVmaW5lIGJpdHMgdXNpbmcgYGBCSVQoTilgYCBpbnN0ZWFkIG9mIGBg KDEgPDwgTilgYC4gRG8gKipub3QqKiBhZGQgYGBfQklUYGAKKyAqIHN1ZmZpeCB0byB0aGUgbmFt ZS4gRXhjZXB0aW9uIHRvIGBgQklUKClgYCB1c2FnZTogVmFsdWUgMSBmb3IgYSBiaXQgZmllbGQK KyAqIHNob3VsZCBiZSBkZWZpbmVkIHVzaW5nIGBgKDEgPDwgTilgYCB0byBiZSBpbiBsaW5lIHdp dGggb3RoZXIgdmFsdWVzIHN1Y2ggYXMKKyAqIGBgKDIgPDwgTilgYCBmb3IgdGhlIHNhbWUgZmll bGQuCiAgKgogICogR3JvdXAgdGhlIHJlZ2lzdGVyIGFuZCBpdHMgY29udGVudHMgdG9nZXRoZXIg d2l0aG91dCBibGFuayBsaW5lcywgc2VwYXJhdGUKICAqIGZyb20gb3RoZXIgcmVnaXN0ZXJzIGFu ZCB0aGVpciBjb250ZW50cyB3aXRoIG9uZSBibGFuayBsaW5lLgpAQCAtMTA1LDcgKzEwNiw3IEBA CiAgKiAgI2RlZmluZSBfRk9PX0EgICAgICAgICAgICAgICAgICAgICAgMHhmMDAwCiAgKiAgI2Rl ZmluZSBfRk9PX0IgICAgICAgICAgICAgICAgICAgICAgMHhmMDAxCiAgKiAgI2RlZmluZSBGT08o cGlwZSkgICAgICAgICAgICAgICAgICAgX01NSU9fUElQRShwaXBlLCBfRk9PX0EsIF9GT09fQikK LSAqICAjZGVmaW5lICAgRk9PX0VOQUJMRSAgICAgICAgICAgICAgICAoMSA8PCAzMSkKKyAqICAj ZGVmaW5lICAgRk9PX0VOQUJMRSAgICAgICAgICAgICAgICBCSVQoMzEpCiAgKiAgI2RlZmluZSAg IEZPT19NT0RFX01BU0sgICAgICAgICAgICAgKDB4ZiA8PCAxNikKICAqICAjZGVmaW5lICAgRk9P X01PREVfU0hJRlQgICAgICAgICAgICAxNgogICogICNkZWZpbmUgICBGT09fTU9ERV9CQVIgICAg ICAgICAgICAgICgwIDw8IDE2KQotLSAKMi4xMS4wCgpfX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fXwpJbnRlbC1nZnggbWFpbGluZyBsaXN0CkludGVsLWdmeEBs aXN0cy5mcmVlZGVza3RvcC5vcmcKaHR0cHM6Ly9saXN0cy5mcmVlZGVza3RvcC5vcmcvbWFpbG1h bi9saXN0aW5mby9pbnRlbC1nZngK