From mboxrd@z Thu Jan 1 00:00:00 1970 From: Miquel Raynal Subject: Re: [PATCH v3 01/17] platform-msi: allow creation of MSI domain without interrupt number Date: Fri, 29 Jun 2018 09:40:35 +0200 Message-ID: <20180629094035.5199fe89@xps13> References: <20180622151432.1566-1-miquel.raynal@bootlin.com> <20180622151432.1566-2-miquel.raynal@bootlin.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: Marc Zyngier Cc: Mark Rutland , Andrew Lunn , Jason Cooper , devicetree@vger.kernel.org, Antoine Tenart , Catalin Marinas , Gregory Clement , Haim Boot , Will Deacon , Maxime Chevallier , Nadav Haklai , Rob Herring , Thomas Petazzoni , Thomas Gleixner , Hanna Hawa , linux-arm-kernel@lists.infradead.org, Sebastian Hesselbarth List-Id: devicetree@vger.kernel.org SGkgTWFyYywKCk1hcmMgWnluZ2llciA8bWFyYy56eW5naWVyQGFybS5jb20+IHdyb3RlIG9uIFRo dSwgMjggSnVuIDIwMTggMTI6MTI6MDQKKzAxMDA6Cgo+IE9uIDIyLzA2LzE4IDE2OjE0LCBNaXF1 ZWwgUmF5bmFsIHdyb3RlOgo+ID4gcGxhdGZvcm1fbXNpX2FsbG9jX3ByaXZfZGF0YSgpIGNoZWNr cyB0aGF0IGEgbnVtYmVyIG9mIGludGVycnVwdHMgaXMKPiA+IGFsd2F5cyBnaXZlbi4gVGhpcyBl eHRyYS1jaGVjayBoYXMgbm8gcmVhbCBpbXBhY3QgYW5kIGp1c3QgcHJldmVudHMKPiA+IHVzZWxl c3NseSB0aGUgdXNlciB0byBjcmVhdGUgYW4gTVNJIHRyZWUgZG9tYWluOiByZW1vdmUgaXQuCj4g PiAKPiA+IFNpZ25lZC1vZmYtYnk6IE1pcXVlbCBSYXluYWwgPG1pcXVlbC5yYXluYWxAYm9vdGxp bi5jb20+Cj4gPiAtLS0KPiA+ICBkcml2ZXJzL2Jhc2UvcGxhdGZvcm0tbXNpLmMgfCAyICstCj4g PiAgMSBmaWxlIGNoYW5nZWQsIDEgaW5zZXJ0aW9uKCspLCAxIGRlbGV0aW9uKC0pCj4gPiAKPiA+ IGRpZmYgLS1naXQgYS9kcml2ZXJzL2Jhc2UvcGxhdGZvcm0tbXNpLmMgYi9kcml2ZXJzL2Jhc2Uv cGxhdGZvcm0tbXNpLmMKPiA+IGluZGV4IDYwZDZjYzYxOGYxYy4uOWYwMDFmNGNjYzBmIDEwMDY0 NAo+ID4gLS0tIGEvZHJpdmVycy9iYXNlL3BsYXRmb3JtLW1zaS5jCj4gPiArKysgYi9kcml2ZXJz L2Jhc2UvcGxhdGZvcm0tbXNpLmMKPiA+IEBAIC0yMDMsNyArMjAzLDcgQEAgcGxhdGZvcm1fbXNp X2FsbG9jX3ByaXZfZGF0YShzdHJ1Y3QgZGV2aWNlICpkZXYsIHVuc2lnbmVkIGludCBudmVjLAo+ ID4gIAkgKiBhY2NvcmRpbmdseSAod2hpY2ggd291bGQgaW1wYWN0IHRoZSBtYXggbnVtYmVyIG9m IE1TSQo+ID4gIAkgKiBjYXBhYmxlIGRldmljZXMpLgo+ID4gIAkgKi8KPiA+IC0JaWYgKCFkZXYt Pm1zaV9kb21haW4gfHwgIXdyaXRlX21zaV9tc2cgfHwgIW52ZWMgfHwgbnZlYyA+IE1BWF9ERVZf TVNJUykKPiA+ICsJaWYgKCFkZXYtPm1zaV9kb21haW4gfHwgIXdyaXRlX21zaV9tc2cgfHwgbnZl YyA+IE1BWF9ERVZfTVNJUykKPiA+ICAJCXJldHVybiBFUlJfUFRSKC1FSU5WQUwpOwo+ID4gIAo+ ID4gIAlpZiAoZGV2LT5tc2lfZG9tYWluLT5idXNfdG9rZW4gIT0gRE9NQUlOX0JVU19QTEFURk9S TV9NU0kpIHsKPiA+ICAgCj4gCj4gSHVoLi4uIEl0J3Mgbm90IHRoYXQgc2ltcGxlLgo+IAo+IFll cywgaXQgYWxsb3dzIHlvdSB0byBnZXQgYSB0cmVlIHZpYSBwbGF0Zm9ybV9tc2lfY3JlYXRlX2Rl dmljZV9kb21haW4KPiAoYXNzdW1pbmcgdGhhdCdzIHdoeSB5b3UncmUgY2hhbmdpbmcgaXQgLS0g eW91ciBjb21taXQgbWVzc2FnZSBkb2Vzbid0Cj4gc2F5IG11Y2gpCgpJbmRlZWQuIFRoYXQgd2Fz IGV4YWN0bHkgbXkgaW50ZW50aW9uLgoKPiBidXQgaXQgYWxzbyBoYXMgc29tZSBpbXBhY3Qgb24g dGhlIHdheSBtc2lfZG9tYWluX3ByZXBhcmVfaXJxcwo+IHdvcmtzIChzZWUgaG93IGl0IGlzIGNh bGxlZCBmcm9tIHBsYXRmb3JtX21zaV9jcmVhdGVfZGV2aWNlX2RvbWFpbikuCj4gCj4gSW1wb3J0 YW50bHksIHRoZSBtc2lfcHJlcGFyZSBjYWxsYmFjayB0YWtlcyBudmVjIGFzIGEgcGFyYW1ldGVy LCBhbmQKPiB0aGF0IGVuZHMgdXAgdHJpY2tsaW5nIGRvd24gdG8gdGhlIGlycWNoaXAsIG9yIHdo YXRldmVyIHdpbGwgc2V0dXAgdGhlCj4gTVNJIGRvbWFpbi4gVGhpbmdzIGxpa2UgdGhlIEdJQ3Yz IElUUyBkbyByZWx5IG9uIHRoYXQgdG8gY2FydmUgb3V0IHRoZQo+IExQSSBzcGFjZSB0aGF0IHN1 YnNlcXVlbnRseSBnZXRzIHVzZWQgdG8gcG9wdWxhdGUgdGhlIGRvbWFpbi4KPiAKPiBTbyBubywg eW91IGNhbid0IGRvIGl0IGxpa2UgdGhhdC4gSWYgeW91IHJlYWxseSB3YW50IGEgdHJlZSwgYWRk IGEKPiBoZWxwZXIgdGhhdCBkb2VzIHNvLgoKU28gaWYgSSB1bmRlcnN0YW5kIGNvcnJlY3RseSwg d2hhdCBzaG91bGQgYmUgZG9uZSBpcyB3cml0dGluZyBhIG5ldwpoZWxwZXIgdGhhdCB3b3VsZCBk byBzb21ldGhpbmcgc2ltaWxhciB0bwpwbGF0Zm9ybV9tc2lfY3JlYXRlX2RldmljZV9kb21haW4o KSwgYnV0IGNyZWF0aW5nIGluc3RlYWQgYSB0cmVlIGRvbWFpbgphbmQgc3RpbGwgZ2l2aW5nIG1z aV9kb21haW5fcHJlcGFyZV9pcnFzKCkgYSBtZWFuaW5nZnVsIG51bWJlciAoYXMKbnZlYykgdGhh dCB3b3VsZCBiZSB0aGUgbWF4aW11bSBudW1iZXIgb2YgTVNJcyB0aGF0IGNvdWxkIGJlIGFsbG9j YXRlZC4KQW0gSSByaWdodCBoZXJlPwoKClRoYW5rcywKTWlxdcOobAoKX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KbGludXgtYXJtLWtlcm5lbCBtYWlsaW5n IGxpc3QKbGludXgtYXJtLWtlcm5lbEBsaXN0cy5pbmZyYWRlYWQub3JnCmh0dHA6Ly9saXN0cy5p bmZyYWRlYWQub3JnL21haWxtYW4vbGlzdGluZm8vbGludXgtYXJtLWtlcm5lbAo= From mboxrd@z Thu Jan 1 00:00:00 1970 From: miquel.raynal@bootlin.com (Miquel Raynal) Date: Fri, 29 Jun 2018 09:40:35 +0200 Subject: [PATCH v3 01/17] platform-msi: allow creation of MSI domain without interrupt number In-Reply-To: References: <20180622151432.1566-1-miquel.raynal@bootlin.com> <20180622151432.1566-2-miquel.raynal@bootlin.com> Message-ID: <20180629094035.5199fe89@xps13> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Hi Marc, Marc Zyngier wrote on Thu, 28 Jun 2018 12:12:04 +0100: > On 22/06/18 16:14, Miquel Raynal wrote: > > platform_msi_alloc_priv_data() checks that a number of interrupts is > > always given. This extra-check has no real impact and just prevents > > uselessly the user to create an MSI tree domain: remove it. > > > > Signed-off-by: Miquel Raynal > > --- > > drivers/base/platform-msi.c | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/drivers/base/platform-msi.c b/drivers/base/platform-msi.c > > index 60d6cc618f1c..9f001f4ccc0f 100644 > > --- a/drivers/base/platform-msi.c > > +++ b/drivers/base/platform-msi.c > > @@ -203,7 +203,7 @@ platform_msi_alloc_priv_data(struct device *dev, unsigned int nvec, > > * accordingly (which would impact the max number of MSI > > * capable devices). > > */ > > - if (!dev->msi_domain || !write_msi_msg || !nvec || nvec > MAX_DEV_MSIS) > > + if (!dev->msi_domain || !write_msi_msg || nvec > MAX_DEV_MSIS) > > return ERR_PTR(-EINVAL); > > > > if (dev->msi_domain->bus_token != DOMAIN_BUS_PLATFORM_MSI) { > > > > Huh... It's not that simple. > > Yes, it allows you to get a tree via platform_msi_create_device_domain > (assuming that's why you're changing it -- your commit message doesn't > say much) Indeed. That was exactly my intention. > but it also has some impact on the way msi_domain_prepare_irqs > works (see how it is called from platform_msi_create_device_domain). > > Importantly, the msi_prepare callback takes nvec as a parameter, and > that ends up trickling down to the irqchip, or whatever will setup the > MSI domain. Things like the GICv3 ITS do rely on that to carve out the > LPI space that subsequently gets used to populate the domain. > > So no, you can't do it like that. If you really want a tree, add a > helper that does so. So if I understand correctly, what should be done is writting a new helper that would do something similar to platform_msi_create_device_domain(), but creating instead a tree domain and still giving msi_domain_prepare_irqs() a meaningful number (as nvec) that would be the maximum number of MSIs that could be allocated. Am I right here? Thanks, Miqu?l