From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.2 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_PASS,URIBL_BLOCKED,USER_AGENT_MUTT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2A371C3279B for ; Wed, 4 Jul 2018 15:50:30 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id D92F424361 for ; Wed, 4 Jul 2018 15:50:29 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org D92F424361 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752667AbeGDPu0 (ORCPT ); Wed, 4 Jul 2018 11:50:26 -0400 Received: from foss.arm.com ([217.140.101.70]:39660 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752158AbeGDPuZ (ORCPT ); Wed, 4 Jul 2018 11:50:25 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B1B657A9; Wed, 4 Jul 2018 08:50:24 -0700 (PDT) Received: from edgewater-inn.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 823233F5AD; Wed, 4 Jul 2018 08:50:24 -0700 (PDT) Received: by edgewater-inn.cambridge.arm.com (Postfix, from userid 1000) id 7B6091AE189D; Wed, 4 Jul 2018 16:51:04 +0100 (BST) Date: Wed, 4 Jul 2018 16:51:04 +0100 From: Will Deacon To: Suzuki K Poulose Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu, james.morse@arm.com, marc.zyngier@arm.com, cdall@kernel.org, eric.auger@redhat.com, julien.grall@arm.com, catalin.marinas@arm.com, punit.agrawal@arm.com, qemu-devel@nongnu.org, Peter Maydel , Paolo Bonzini , Radim =?utf-8?B?S3LEjW3DocWZ?= Subject: Re: [PATCH v3 15/20] kvm: arm/arm64: Allow tuning the physical address size for VM Message-ID: <20180704155104.GN4828@arm.com> References: <1530270944-11351-1-git-send-email-suzuki.poulose@arm.com> <1530270944-11351-16-git-send-email-suzuki.poulose@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <1530270944-11351-16-git-send-email-suzuki.poulose@arm.com> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Suzuki, On Fri, Jun 29, 2018 at 12:15:35PM +0100, Suzuki K Poulose wrote: > Allow specifying the physical address size for a new VM via > the kvm_type argument for KVM_CREATE_VM ioctl. This allows > us to finalise the stage2 page table format as early as possible > and hence perform the right checks on the memory slots without > complication. The size is encoded as Log2(PA_Size) in the bits[7:0] > of the type field and can encode more information in the future if > required. The IPA size is still capped at 40bits. > > Cc: Marc Zyngier > Cc: Christoffer Dall > Cc: Peter Maydel > Cc: Paolo Bonzini > Cc: Radim Krčmář > Signed-off-by: Suzuki K Poulose > --- > arch/arm/include/asm/kvm_mmu.h | 2 ++ > arch/arm64/include/asm/kvm_arm.h | 10 +++------- > arch/arm64/include/asm/kvm_mmu.h | 2 ++ > include/uapi/linux/kvm.h | 10 ++++++++++ > virt/kvm/arm/arm.c | 24 ++++++++++++++++++++++-- > 5 files changed, 39 insertions(+), 9 deletions(-) [...] > diff --git a/include/uapi/linux/kvm.h b/include/uapi/linux/kvm.h > index 4df9bb6..fa4cab0 100644 > --- a/include/uapi/linux/kvm.h > +++ b/include/uapi/linux/kvm.h > @@ -751,6 +751,16 @@ struct kvm_ppc_resize_hpt { > #define KVM_S390_SIE_PAGE_OFFSET 1 > > /* > + * On arm/arm64, machine type can be used to request the physical > + * address size for the VM. Bits [7-0] have been reserved for the > + * PA size shift (i.e, log2(PA_Size)). For backward compatibility, > + * value 0 implies the default IPA size, which is 40bits. > + */ > +#define KVM_VM_TYPE_ARM_PHYS_SHIFT_MASK 0xff > +#define KVM_VM_TYPE_ARM_PHYS_SHIFT(x) \ > + ((x) & KVM_VM_TYPE_ARM_PHYS_SHIFT_MASK) This seems like you're allocating quite a lot of bits in a non-extensible interface to a fairly esoteric parameter. Would it be better to add another ioctl, or condense the number of sizes you support instead? Will From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60358) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fak34-0007VM-D7 for qemu-devel@nongnu.org; Wed, 04 Jul 2018 11:50:31 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fak31-0000jp-A8 for qemu-devel@nongnu.org; Wed, 04 Jul 2018 11:50:30 -0400 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:47116 helo=foss.arm.com) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fak30-0000jL-Sw for qemu-devel@nongnu.org; Wed, 04 Jul 2018 11:50:27 -0400 Date: Wed, 4 Jul 2018 16:51:04 +0100 From: Will Deacon Message-ID: <20180704155104.GN4828@arm.com> References: <1530270944-11351-1-git-send-email-suzuki.poulose@arm.com> <1530270944-11351-16-git-send-email-suzuki.poulose@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <1530270944-11351-16-git-send-email-suzuki.poulose@arm.com> Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH v3 15/20] kvm: arm/arm64: Allow tuning the physical address size for VM List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Suzuki K Poulose Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu, james.morse@arm.com, marc.zyngier@arm.com, cdall@kernel.org, eric.auger@redhat.com, julien.grall@arm.com, catalin.marinas@arm.com, punit.agrawal@arm.com, qemu-devel@nongnu.org, Peter Maydel , Paolo Bonzini , Radim =?utf-8?B?S3LEjW3DocWZ?= Hi Suzuki, On Fri, Jun 29, 2018 at 12:15:35PM +0100, Suzuki K Poulose wrote: > Allow specifying the physical address size for a new VM via > the kvm_type argument for KVM_CREATE_VM ioctl. This allows > us to finalise the stage2 page table format as early as possible > and hence perform the right checks on the memory slots without > complication. The size is encoded as Log2(PA_Size) in the bits[7:0] > of the type field and can encode more information in the future if > required. The IPA size is still capped at 40bits. >=20 > Cc: Marc Zyngier > Cc: Christoffer Dall > Cc: Peter Maydel > Cc: Paolo Bonzini > Cc: Radim Kr=C4=8Dm=C3=A1=C5=99 > Signed-off-by: Suzuki K Poulose > --- > arch/arm/include/asm/kvm_mmu.h | 2 ++ > arch/arm64/include/asm/kvm_arm.h | 10 +++------- > arch/arm64/include/asm/kvm_mmu.h | 2 ++ > include/uapi/linux/kvm.h | 10 ++++++++++ > virt/kvm/arm/arm.c | 24 ++++++++++++++++++++++-- > 5 files changed, 39 insertions(+), 9 deletions(-) [...] > diff --git a/include/uapi/linux/kvm.h b/include/uapi/linux/kvm.h > index 4df9bb6..fa4cab0 100644 > --- a/include/uapi/linux/kvm.h > +++ b/include/uapi/linux/kvm.h > @@ -751,6 +751,16 @@ struct kvm_ppc_resize_hpt { > #define KVM_S390_SIE_PAGE_OFFSET 1 > =20 > /* > + * On arm/arm64, machine type can be used to request the physical > + * address size for the VM. Bits [7-0] have been reserved for the > + * PA size shift (i.e, log2(PA_Size)). For backward compatibility, > + * value 0 implies the default IPA size, which is 40bits. > + */ > +#define KVM_VM_TYPE_ARM_PHYS_SHIFT_MASK 0xff > +#define KVM_VM_TYPE_ARM_PHYS_SHIFT(x) \ > + ((x) & KVM_VM_TYPE_ARM_PHYS_SHIFT_MASK) This seems like you're allocating quite a lot of bits in a non-extensible interface to a fairly esoteric parameter. Would it be better to add anoth= er ioctl, or condense the number of sizes you support instead? Will From mboxrd@z Thu Jan 1 00:00:00 1970 From: will.deacon@arm.com (Will Deacon) Date: Wed, 4 Jul 2018 16:51:04 +0100 Subject: [PATCH v3 15/20] kvm: arm/arm64: Allow tuning the physical address size for VM In-Reply-To: <1530270944-11351-16-git-send-email-suzuki.poulose@arm.com> References: <1530270944-11351-1-git-send-email-suzuki.poulose@arm.com> <1530270944-11351-16-git-send-email-suzuki.poulose@arm.com> Message-ID: <20180704155104.GN4828@arm.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Hi Suzuki, On Fri, Jun 29, 2018 at 12:15:35PM +0100, Suzuki K Poulose wrote: > Allow specifying the physical address size for a new VM via > the kvm_type argument for KVM_CREATE_VM ioctl. This allows > us to finalise the stage2 page table format as early as possible > and hence perform the right checks on the memory slots without > complication. The size is encoded as Log2(PA_Size) in the bits[7:0] > of the type field and can encode more information in the future if > required. The IPA size is still capped at 40bits. > > Cc: Marc Zyngier > Cc: Christoffer Dall > Cc: Peter Maydel > Cc: Paolo Bonzini > Cc: Radim Kr?m?? > Signed-off-by: Suzuki K Poulose > --- > arch/arm/include/asm/kvm_mmu.h | 2 ++ > arch/arm64/include/asm/kvm_arm.h | 10 +++------- > arch/arm64/include/asm/kvm_mmu.h | 2 ++ > include/uapi/linux/kvm.h | 10 ++++++++++ > virt/kvm/arm/arm.c | 24 ++++++++++++++++++++++-- > 5 files changed, 39 insertions(+), 9 deletions(-) [...] > diff --git a/include/uapi/linux/kvm.h b/include/uapi/linux/kvm.h > index 4df9bb6..fa4cab0 100644 > --- a/include/uapi/linux/kvm.h > +++ b/include/uapi/linux/kvm.h > @@ -751,6 +751,16 @@ struct kvm_ppc_resize_hpt { > #define KVM_S390_SIE_PAGE_OFFSET 1 > > /* > + * On arm/arm64, machine type can be used to request the physical > + * address size for the VM. Bits [7-0] have been reserved for the > + * PA size shift (i.e, log2(PA_Size)). For backward compatibility, > + * value 0 implies the default IPA size, which is 40bits. > + */ > +#define KVM_VM_TYPE_ARM_PHYS_SHIFT_MASK 0xff > +#define KVM_VM_TYPE_ARM_PHYS_SHIFT(x) \ > + ((x) & KVM_VM_TYPE_ARM_PHYS_SHIFT_MASK) This seems like you're allocating quite a lot of bits in a non-extensible interface to a fairly esoteric parameter. Would it be better to add another ioctl, or condense the number of sizes you support instead? Will