From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 07D76ECDE5F for ; Sat, 21 Jul 2018 17:48:57 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B54DB20849 for ; Sat, 21 Jul 2018 17:48:56 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org B54DB20849 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=bootlin.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728253AbeGUSmS (ORCPT ); Sat, 21 Jul 2018 14:42:18 -0400 Received: from mail.bootlin.com ([62.4.15.54]:49984 "EHLO mail.bootlin.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728011AbeGUSmR (ORCPT ); Sat, 21 Jul 2018 14:42:17 -0400 Received: by mail.bootlin.com (Postfix, from userid 110) id EA21B20737; Sat, 21 Jul 2018 19:48:44 +0200 (CEST) Received: from bbrezillon (unknown [37.173.79.60]) by mail.bootlin.com (Postfix) with ESMTPSA id 32D2D206F3; Sat, 21 Jul 2018 19:48:32 +0200 (CEST) Date: Sat, 21 Jul 2018 19:48:29 +0200 From: Boris Brezillon To: Miquel Raynal Cc: Wenyou Yang , Josh Wu , Tudor Ambarus , Richard Weinberger , David Woodhouse , Brian Norris , Marek Vasut , Nicolas Ferre , Alexandre Belloni , Kamal Dasu , Masahiro Yamada , Han Xu , Harvey Hunt , Vladimir Zapolskiy , Sylvain Lemieux , Xiaolei Li , Matthias Brugger , Maxime Ripard , Chen-Yu Tsai , Marc Gonzalez , Mans Rullgard , Stefan Agner , linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, bcm-kernel-feedback-list@broadcom.com, linux-mediatek@lists.infradead.org Subject: Re: [PATCH v4 19/35] mtd: rawnand: sh_flctl: move all NAND chip related setup in one function Message-ID: <20180721194829.44e9b29f@bbrezillon> In-Reply-To: <20180720151527.16038-20-miquel.raynal@bootlin.com> References: <20180720151527.16038-1-miquel.raynal@bootlin.com> <20180720151527.16038-20-miquel.raynal@bootlin.com> X-Mailer: Claws Mail 3.15.0-dirty (GTK+ 2.24.31; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, 20 Jul 2018 17:15:11 +0200 Miquel Raynal wrote: > @@ -1007,6 +1007,16 @@ static int flctl_chip_init_tail(struct mtd_info *mtd) > struct sh_flctl *flctl = mtd_to_flctl(mtd); > struct nand_chip *chip = &flctl->chip; > > + if (chip->options & NAND_BUSWIDTH_16) { > + /* > + * NAND_BUSWIDTH_16 may have been set by nand_scan_ident(). > + * Add the SEL_16BIT flag in pdata->flcmncr_val and re-assign > + * flctl->flcmncr_base to pdata->flcmncr_val. > + */ > + flctl->pdata->flcmncr_val |= SEL_16BIT; > + flctl->flcmncr_base = flctl->pdata->flcmncr_val; pdata->flcmncr_val is not used after this point. I think you can just do flctl->flcmncr_base |= SEL_16BIT; and get rid of the ftcl->pdata field you add in this patch. > + } > + From mboxrd@z Thu Jan 1 00:00:00 1970 From: Boris Brezillon Subject: Re: [PATCH v4 19/35] mtd: rawnand: sh_flctl: move all NAND chip related setup in one function Date: Sat, 21 Jul 2018 19:48:29 +0200 Message-ID: <20180721194829.44e9b29f@bbrezillon> References: <20180720151527.16038-1-miquel.raynal@bootlin.com> <20180720151527.16038-20-miquel.raynal@bootlin.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <20180720151527.16038-20-miquel.raynal@bootlin.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: Miquel Raynal Cc: Alexandre Belloni , Mans Rullgard , Maxime Ripard , Stefan Agner , linux-kernel@vger.kernel.org, Masahiro Yamada , linux-mtd@lists.infradead.org, Kamal Dasu , Josh Wu , Marc Gonzalez , Marek Vasut , Chen-Yu Tsai , bcm-kernel-feedback-list@broadcom.com, Sylvain Lemieux , Wenyou Yang , Tudor Ambarus , Vladimir Zapolskiy , Harvey Hunt , linux-mediatek@lists.infradead.org, Matthias Brugger , Han Xu , Xiaolei Li , linux-arm-kernel@lists.infradead.org, Richard List-Id: linux-mediatek@lists.infradead.org On Fri, 20 Jul 2018 17:15:11 +0200 Miquel Raynal wrote: > @@ -1007,6 +1007,16 @@ static int flctl_chip_init_tail(struct mtd_info *mtd) > struct sh_flctl *flctl = mtd_to_flctl(mtd); > struct nand_chip *chip = &flctl->chip; > > + if (chip->options & NAND_BUSWIDTH_16) { > + /* > + * NAND_BUSWIDTH_16 may have been set by nand_scan_ident(). > + * Add the SEL_16BIT flag in pdata->flcmncr_val and re-assign > + * flctl->flcmncr_base to pdata->flcmncr_val. > + */ > + flctl->pdata->flcmncr_val |= SEL_16BIT; > + flctl->flcmncr_base = flctl->pdata->flcmncr_val; pdata->flcmncr_val is not used after this point. I think you can just do flctl->flcmncr_base |= SEL_16BIT; and get rid of the ftcl->pdata field you add in this patch. > + } > + From mboxrd@z Thu Jan 1 00:00:00 1970 From: boris.brezillon@bootlin.com (Boris Brezillon) Date: Sat, 21 Jul 2018 19:48:29 +0200 Subject: [PATCH v4 19/35] mtd: rawnand: sh_flctl: move all NAND chip related setup in one function In-Reply-To: <20180720151527.16038-20-miquel.raynal@bootlin.com> References: <20180720151527.16038-1-miquel.raynal@bootlin.com> <20180720151527.16038-20-miquel.raynal@bootlin.com> Message-ID: <20180721194829.44e9b29f@bbrezillon> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Fri, 20 Jul 2018 17:15:11 +0200 Miquel Raynal wrote: > @@ -1007,6 +1007,16 @@ static int flctl_chip_init_tail(struct mtd_info *mtd) > struct sh_flctl *flctl = mtd_to_flctl(mtd); > struct nand_chip *chip = &flctl->chip; > > + if (chip->options & NAND_BUSWIDTH_16) { > + /* > + * NAND_BUSWIDTH_16 may have been set by nand_scan_ident(). > + * Add the SEL_16BIT flag in pdata->flcmncr_val and re-assign > + * flctl->flcmncr_base to pdata->flcmncr_val. > + */ > + flctl->pdata->flcmncr_val |= SEL_16BIT; > + flctl->flcmncr_base = flctl->pdata->flcmncr_val; pdata->flcmncr_val is not used after this point. I think you can just do flctl->flcmncr_base |= SEL_16BIT; and get rid of the ftcl->pdata field you add in this patch. > + } > +