From mboxrd@z Thu Jan 1 00:00:00 1970 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 Subject: [v7,4/7] dt-bindings: fsl-qdma: Add NXP Layerscpae qDMA controller bindings From: Wen He Message-Id: <20180725112919.31340-4-wen.he_1@nxp.com> Date: Wed, 25 Jul 2018 19:29:16 +0800 To: vkoul@kernel.org, dmaengine@vger.kernel.org Cc: robh+dt@kernel.org, devicetree@vger.kernel.org, leoyang.li@nxp.com, jiafei.pan@nxp.com, jiaheng.fan@nxp.com, wen.he_1@nxp.com List-ID: RG9jdW1lbnQgdGhlIGRldmljZXRyZWUgYmluZGluZ3MgZm9yIE5YUCBMYXllcnNjYXBlIHFETUEg Y29udHJvbGxlcgp3aGljaCBjb3VsZCBiZSBmb3VuZCBvbiBOWFAgUW9ySVEgTGF5ZXJzY2FwZSBT b0NzLgoKU2lnbmVkLW9mZi1ieTogV2VuIEhlIDx3ZW4uaGVfMUBueHAuY29tPgpSZXZpZXdlZC1i eTogUm9iIEhlcnJpbmcgPHJvYmhAa2VybmVsLm9yZz4KLS0tCiBEb2N1bWVudGF0aW9uL2Rldmlj ZXRyZWUvYmluZGluZ3MvZG1hL2ZzbC1xZG1hLnR4dCB8ICAgNDEgKysrKysrKysrKysrKysrKysr KysKIDEgZmlsZXMgY2hhbmdlZCwgNDEgaW5zZXJ0aW9ucygrKSwgMCBkZWxldGlvbnMoLSkKIGNy ZWF0ZSBtb2RlIDEwMDY0NCBEb2N1bWVudGF0aW9uL2RldmljZXRyZWUvYmluZGluZ3MvZG1hL2Zz bC1xZG1hLnR4dAoKZGlmZiAtLWdpdCBhL0RvY3VtZW50YXRpb24vZGV2aWNldHJlZS9iaW5kaW5n cy9kbWEvZnNsLXFkbWEudHh0IGIvRG9jdW1lbnRhdGlvbi9kZXZpY2V0cmVlL2JpbmRpbmdzL2Rt YS9mc2wtcWRtYS50eHQKbmV3IGZpbGUgbW9kZSAxMDA2NDQKaW5kZXggMDAwMDAwMC4uOTliM2Q3 NAotLS0gL2Rldi9udWxsCisrKyBiL0RvY3VtZW50YXRpb24vZGV2aWNldHJlZS9iaW5kaW5ncy9k bWEvZnNsLXFkbWEudHh0CkBAIC0wLDAgKzEsNDEgQEAKK05YUCBMYXllcnNjYXBlIFNvQyBxRE1B IENvbnRyb2xsZXIKKz09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT0KKworVGhpcyBk ZXZpY2UgZm9sbG93cyB0aGUgZ2VuZXJpYyBETUEgYmluZGluZ3MgZGVmaW5lZCBpbiBkbWEvZG1h LnR4dC4KKworUmVxdWlyZWQgcHJvcGVydGllczoKKworLSBjb21wYXRpYmxlOgkJTXVzdCBiZSBv bmUgb2YKKwkJCSAiZnNsLGxzMTAyMWEtcWRtYSI6IGZvciBMUzEwMjFBIEJvYXJkCisJCQkgImZz bCxsczEwNDNhLXFkbWEiOiBmb3IgbHMxMDQzQSBCb2FyZAorCQkJICJmc2wsbHMxMDQ2YS1xZG1h IjogZm9yIGxzMTA0NkEgQm9hcmQKKy0gcmVnOgkJCVNob3VsZCBjb250YWluIHRoZSByZWdpc3Rl cidzIGJhc2UgYWRkcmVzcyBhbmQgbGVuZ3RoLgorLSBpbnRlcnJ1cHRzOgkJU2hvdWxkIGNvbnRh aW4gYSByZWZlcmVuY2UgdG8gdGhlIGludGVycnVwdCB1c2VkIGJ5IHRoaXMKKwkJCWRldmljZS4K Ky0gaW50ZXJydXB0LW5hbWVzOglTaG91bGQgY29udGFpbiBpbnRlcnJ1cHQgbmFtZXM6CisJCQkg InFkbWEtZXJyb3IiOiB0aGUgZXJyb3IgaW50ZXJydXB0CisJCQkgInFkbWEtcXVldWUiOiB0aGUg cXVldWUgaW50ZXJydXB0CistIGZzbCxxdWV1ZXM6CQlTaG91bGQgY29udGFpbiBudW1iZXIgb2Yg cXVldWVzIHN1cHBvcnRlZC4KKworT3B0aW9uYWwgcHJvcGVydGllczoKKworLSBkbWEtY2hhbm5l bHM6CQlOdW1iZXIgb2YgRE1BIGNoYW5uZWxzIHN1cHBvcnRlZCBieSB0aGUgY29udHJvbGxlci4K Ky0gYmlnLWVuZGlhbjoJCUlmIHByZXNlbnQgcmVnaXN0ZXJzIGFuZCBoYXJkd2FyZSBzY2F0dGVy L2dhdGhlciBkZXNjcmlwdG9ycworCQkJb2YgdGhlIHFETUEgYXJlIGltcGxlbWVudGVkIGluIGJp ZyBlbmRpYW4gbW9kZSwgb3RoZXJ3aXNlIGluIGxpdHRsZQorCQkJbW9kZS4KKworRXhhbXBsZXM6 CisKKwlxZG1hOiBkbWEtY29udHJvbGxlckA4MzkwMDAwIHsKKwkJY29tcGF0aWJsZSA9ICJmc2ws bHMxMDIxYS1xZG1hIjsKKwkJcmVnID0gPDB4MCAweDgzOTgwMDAgMHgwIDB4MjAwMCAvKiBDb250 cm9sbGVyIHJlZ2lzdGVycyAqLworCQkgICAgICAgMHgwIDB4ODM5YTAwMCAweDAgMHgyMDAwPjsg LyogQmxvY2sgcmVnaXN0ZXJzICovCisJCWludGVycnVwdHMgPSA8R0lDX1NQSSAxODUgSVJRX1RZ UEVfTEVWRUxfSElHSD4sCisJCQkJPEdJQ19TUEkgNzYgSVJRX1RZUEVfTEVWRUxfSElHSD47CisJ CWludGVycnVwdC1uYW1lcyA9ICJxZG1hLWVycm9yIiwgInFkbWEtcXVldWUiOworCQlkbWEtY2hh bm5lbHMgPSA8OD47CisJCXF1ZXVlcyA9IDwyPjsKKwkJYmlnLWVuZGlhbjsKKwl9OworCitETUEg Y2xpZW50cyBtdXN0IHVzZSB0aGUgZm9ybWF0IGRlc2NyaWJlZCBpbiBkbWEvZG1hLnR4dCBmaWxl Lgo= From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: From: Wen He Subject: [v7 4/7] dt-bindings: fsl-qdma: Add NXP Layerscpae qDMA controller bindings Date: Wed, 25 Jul 2018 19:29:16 +0800 Message-Id: <20180725112919.31340-4-wen.he_1@nxp.com> In-Reply-To: <20180725112919.31340-1-wen.he_1@nxp.com> References: <20180725112919.31340-1-wen.he_1@nxp.com> To: vkoul@kernel.org, dmaengine@vger.kernel.org Cc: robh+dt@kernel.org, devicetree@vger.kernel.org, leoyang.li@nxp.com, jiafei.pan@nxp.com, jiaheng.fan@nxp.com, wen.he_1@nxp.com List-ID: Document the devicetree bindings for NXP Layerscape qDMA controller which could be found on NXP QorIQ Layerscape SoCs. Signed-off-by: Wen He Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/dma/fsl-qdma.txt | 41 ++++++++++++++++++++ 1 files changed, 41 insertions(+), 0 deletions(-) create mode 100644 Documentation/devicetree/bindings/dma/fsl-qdma.txt diff --git a/Documentation/devicetree/bindings/dma/fsl-qdma.txt b/Documentation/devicetree/bindings/dma/fsl-qdma.txt new file mode 100644 index 0000000..99b3d74 --- /dev/null +++ b/Documentation/devicetree/bindings/dma/fsl-qdma.txt @@ -0,0 +1,41 @@ +NXP Layerscape SoC qDMA Controller +================================== + +This device follows the generic DMA bindings defined in dma/dma.txt. + +Required properties: + +- compatible: Must be one of + "fsl,ls1021a-qdma": for LS1021A Board + "fsl,ls1043a-qdma": for ls1043A Board + "fsl,ls1046a-qdma": for ls1046A Board +- reg: Should contain the register's base address and length. +- interrupts: Should contain a reference to the interrupt used by this + device. +- interrupt-names: Should contain interrupt names: + "qdma-error": the error interrupt + "qdma-queue": the queue interrupt +- fsl,queues: Should contain number of queues supported. + +Optional properties: + +- dma-channels: Number of DMA channels supported by the controller. +- big-endian: If present registers and hardware scatter/gather descriptors + of the qDMA are implemented in big endian mode, otherwise in little + mode. + +Examples: + + qdma: dma-controller@8390000 { + compatible = "fsl,ls1021a-qdma"; + reg = <0x0 0x8398000 0x0 0x2000 /* Controller registers */ + 0x0 0x839a000 0x0 0x2000>; /* Block registers */ + interrupts = , + ; + interrupt-names = "qdma-error", "qdma-queue"; + dma-channels = <8>; + queues = <2>; + big-endian; + }; + +DMA clients must use the format described in dma/dma.txt file. -- 1.7.1