Re: [Query]: DSA Understanding

[Andrew Lunn <andrew@lunn.ch>]

> Yes I am using fixed phy on slave1, following is my dts:

Posting the original DTS file is better, not the decompiled version.

> 
>         ethernet@48484000 {
>             compatible = "ti,dra7-cpsw", "ti,cpsw";
>             ti,hwmods = "gmac";
>             clocks = <0x124 0x125>;
>             clock-names = "fck", "cpts";
>             cpdma_channels = <0x8>;
>             ale_entries = <0x400>;
>             bd_ram_size = <0x2000>;
>             mac_control = <0x20>;
>             slaves = <0x2>;
>             active_slave = <0x0>;
>             cpts_clock_mult = <0x784cfe14>;
>             cpts_clock_shift = <0x1d>;
>             reg = <0x48484000 0x1000 0x48485200 0x2e00>;
>             #address-cells = <0x1>;
>             #size-cells = <0x1>;
>             ti,no-idle;
>             interrupts = <0x0 0x14e 0x4 0x0 0x14f 0x4 0x0 0x150 0x4
> 0x0 0x151 0x4>;
>             ranges;
>             syscon = <0x8>;
>             status = "okay";
>             pinctrl-names = "default", "sleep";
>             pinctrl-0 = <0x126 0x127>;
>             pinctrl-1 = <0x128 0x129>;
>             dual_emac;
>             linux,phandle = <0x500>;
>             phandle = <0x500>;

So here is 0x500

> 
>             mdio@48485000 {
>                 compatible = "ti,cpsw-mdio", "ti,davinci_mdio";
>                 #address-cells = <0x1>;
>                 #size-cells = <0x0>;
>                 ti,hwmods = "davinci_mdio";
>                 bus_freq = <0xf4240>;
>                 reg = <0x48485000 0x100>;
>                 status = "okay";
>                 pinctrl-names = "default", "sleep";
>                 pinctrl-0 = <0x12a>;
>                 pinctrl-1 = <0x12b>;
> 
>                 ethernet-phy@1 {
>                     reg = <0x1>;
>                     linux,phandle = <0x12c>;
>                     phandle = <0x12c>;
>                 };
>             };
> 
>             slave@48480200 {
>                 mac-address = [00 00 00 00 00 00];
>                 status = "okay";
>                 phy-handle = <0x12c>;
>                 phy-mode = "rgmii";
>                 dual_emac_res_vlan = <0x1>;
>             };
> 
>             slave@48480300 {
>                 mac-address = [00 00 00 00 00 00];
>                 status = "okay";
>                 phy-mode = "rgmii";
>                 dual_emac_res_vlan = <0x2>;
>                 linux,phandle = <0xf3>;
>                 phandle = <0xf3>;

This is the actual interface you are using and it has a phandle of
0xf3.

> 
>                 fixed-link {
>                     speed = <0x3e8>;
>                     full-duplex;
>                 };
>             };
> 
>             cpsw-phy-sel@4a002554 {
>                 compatible = "ti,dra7xx-cpsw-phy-sel";
>                 reg = <0x4a002554 0x4>;
>                 reg-names = "gmii-sel";
>             };
>         };
> 
>         spi@480ba000 {
>             compatible = "ti,omap4-mcspi";
>             reg = <0x480ba000 0x200>;
>             interrupts = <0x0 0x2b 0x4>;
>             #address-cells = <0x1>;
>             #size-cells = <0x0>;
>             ti,hwmods = "mcspi4";
>             ti,spi-num-cs = <0x1>;
>             dmas = <0xb2 0x46 0xb2 0x47>;
>             dma-names = "tx0", "rx0";
>             status = "okay";
>             ti,pindir-d0-out-d1-in;
> 
>             ksz9477@0 {
>                 compatible = "microchip,ksz9477";
>                 reg = <0x0>;
>                 spi-max-frequency = <0x2dc6c00>;
>                 spi-cpha;
>                 spi-cpol;
> 
>                 ports {
>                     #address-cells = <0x1>;
>                     #size-cells = <0x0>;
> 
>                     port@0 {
>                         reg = <0x0>;
>                         label = "lan0";
>                     };
> 
>                     port@1 {
>                         reg = <0x1>;
>                         label = "lan1";
>                     };
> 
>                     port@2 {
>                         reg = <0x2>;
>                         label = "lan2";
>                     };
> 
>                     port@3 {
>                         reg = <0x3>;
>                         label = "lan3";
>                     };
> 
>                     port@4 {
>                         reg = <0x4>;
>                         label = "lan4";
>                     };
> 
>                     port@5 {
>                         reg = <0x5>;
>                         label = "cpu";
>                         ethernet = <0x500>;

So here you are pointing to the container node, not the actual
interface. You talk of having to patch DSA. That i would say is
wrong. You should be using the phandle of the actual interface.

>                     };
> 
>                     port@6 {
>                         reg = <0x6>;
>                         label = "lan6";
>                     };
>                 };
>             };
>         };
> 
> Where port 6 of ksz9897 chip is connected to slave 1 (eth1) of cpsw
> via rgmii interface. Following is the dmesg log:
> 
> [    2.596958] Microchip KSZ9477 dsa-0.0:00: attached PHY driver
> [Microchip KSZ9477] (mii_bus:phy_addr=dsa-0.0:00, irq=POLL)
> [    2.714959] Microchip KSZ9477 dsa-0.0:01: attached PHY driver
> [Microchip KSZ9477] (mii_bus:phy_addr=dsa-0.0:01, irq=POLL)
> [    2.832958] Microchip KSZ9477 dsa-0.0:02: attached PHY driver
> [Microchip KSZ9477] (mii_bus:phy_addr=dsa-0.0:02, irq=POLL)
> [    2.950960] Microchip KSZ9477 dsa-0.0:03: attached PHY driver
> [Microchip KSZ9477] (mii_bus:phy_addr=dsa-0.0:03, irq=POLL)
> [    3.068958] Microchip KSZ9477 dsa-0.0:04: attached PHY driver
> [Microchip KSZ9477] (mii_bus:phy_addr=dsa-0.0:04, irq=POLL)
> [    3.080953] Generic PHY dsa-0.0:06: attached PHY driver [Generic
> PHY] (mii_bus:phy_addr=dsa-0.0:06, irq=POLL)

You might also need a fixed-link for the cpu port of the switch.

What do the statistics counters show? Is it trying to send/receiver
frames out eth1? Are bad frames received? Maybe you need to set rgmii
delays?

	Andrew