[PATCH 1/2] ia64: use asm-generic/io.h

[PATCH 1/2] ia64: use asm-generic/io.h

[Arnd Bergmann]

asm-generic/io.h provides a generic implementation of all I/O accessors,
which the architectures can override.

Since ia64 does not provide readsl/writesl etc, any driver using those
fails to build, and including asm-generic/io.h will provide the
missing interfaces, as well as any other future interfaces that get
added there. We need to #define a couple of symbols to themselves
in the ia64 to ensure that we use the ia64 specific version of those
rather than the generic one.

There should be no other effect than adding {read,write}s{b,w,l}()
as well as {in,out}s{b,w,l}_p(), which were also not provided
by ia64 but are provided by the generic header for historic reasons.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
 arch/ia64/include/asm/io.h | 13 ++++++++++++-
 1 file changed, 12 insertions(+), 1 deletion(-)

diff --git a/arch/ia64/include/asm/io.h b/arch/ia64/include/asm/io.h
index fb0651961e2c..6f952171abf9 100644
--- a/arch/ia64/include/asm/io.h
+++ b/arch/ia64/include/asm/io.h
@@ -83,12 +83,14 @@ virt_to_phys (volatile void *address)
 {
 	return (unsigned long) address - PAGE_OFFSET;
 }
+#define virt_to_phys virt_to_phys
 
 static inline void*
 phys_to_virt (unsigned long address)
 {
 	return (void *) (address + PAGE_OFFSET);
 }
+#define phys_to_virt phys_to_virt
 
 #define ARCH_HAS_VALID_PHYS_ADDR_RANGE
 extern u64 kern_mem_attribute (unsigned long phys_addr, unsigned long size);
@@ -433,9 +435,11 @@ static inline void __iomem * ioremap_cache (unsigned long phys_addr, unsigned lo
 {
 	return ioremap(phys_addr, size);
 }
+#define ioremap ioremap
+#define ioremap_nocache ioremap_nocache
 #define ioremap_cache ioremap_cache
 #define ioremap_uc ioremap_nocache
-
+#define iounmap iounmap
 
 /*
  * String version of IO memory access ops:
@@ -444,6 +448,13 @@ extern void memcpy_fromio(void *dst, const volatile void __iomem *src, long n);
 extern void memcpy_toio(volatile void __iomem *dst, const void *src, long n);
 extern void memset_io(volatile void __iomem *s, int c, long n);
 
+#define memcpy_fromio memcpy_fromio
+#define memcpy_toio memcpy_toio
+#define memset_io memset_io
+#define xlate_dev_kmem_ptr xlate_dev_kmem_ptr
+#define xlate_dev_mem_ptr xlate_dev_mem_ptr
+#include <asm-generic/io.h>
+
 # endif /* __KERNEL__ */
 
 #endif /* _ASM_IA64_IO_H */
-- 
2.9.0

[PATCH 1/2] ia64: use asm-generic/io.h

[Arnd Bergmann]

asm-generic/io.h provides a generic implementation of all I/O accessors,
which the architectures can override.

Since ia64 does not provide readsl/writesl etc, any driver using those
fails to build, and including asm-generic/io.h will provide the
missing interfaces, as well as any other future interfaces that get
added there. We need to #define a couple of symbols to themselves
in the ia64 to ensure that we use the ia64 specific version of those
rather than the generic one.

There should be no other effect than adding {read,write}s{b,w,l}()
as well as {in,out}s{b,w,l}_p(), which were also not provided
by ia64 but are provided by the generic header for historic reasons.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
 arch/ia64/include/asm/io.h | 13 ++++++++++++-
 1 file changed, 12 insertions(+), 1 deletion(-)

diff --git a/arch/ia64/include/asm/io.h b/arch/ia64/include/asm/io.h
index fb0651961e2c..6f952171abf9 100644
--- a/arch/ia64/include/asm/io.h
+++ b/arch/ia64/include/asm/io.h
@@ -83,12 +83,14 @@ virt_to_phys (volatile void *address)
 {
 	return (unsigned long) address - PAGE_OFFSET;
 }
+#define virt_to_phys virt_to_phys
 
 static inline void*
 phys_to_virt (unsigned long address)
 {
 	return (void *) (address + PAGE_OFFSET);
 }
+#define phys_to_virt phys_to_virt
 
 #define ARCH_HAS_VALID_PHYS_ADDR_RANGE
 extern u64 kern_mem_attribute (unsigned long phys_addr, unsigned long size);
@@ -433,9 +435,11 @@ static inline void __iomem * ioremap_cache (unsigned long phys_addr, unsigned lo
 {
 	return ioremap(phys_addr, size);
 }
+#define ioremap ioremap
+#define ioremap_nocache ioremap_nocache
 #define ioremap_cache ioremap_cache
 #define ioremap_uc ioremap_nocache
-
+#define iounmap iounmap
 
 /*
  * String version of IO memory access ops:
@@ -444,6 +448,13 @@ extern void memcpy_fromio(void *dst, const volatile void __iomem *src, long n);
 extern void memcpy_toio(volatile void __iomem *dst, const void *src, long n);
 extern void memset_io(volatile void __iomem *s, int c, long n);
 
+#define memcpy_fromio memcpy_fromio
+#define memcpy_toio memcpy_toio
+#define memset_io memset_io
+#define xlate_dev_kmem_ptr xlate_dev_kmem_ptr
+#define xlate_dev_mem_ptr xlate_dev_mem_ptr
+#include <asm-generic/io.h>
+
 # endif /* __KERNEL__ */
 
 #endif /* _ASM_IA64_IO_H */
-- 
2.9.0

[PATCH 2/2] sparc64: add reads{b,w,l}/writes{b,w,l}

[Arnd Bergmann]

Some drivers need these for compile-testing. On most architectures
they come from asm-generic/io.h, but not on sparc64, which has its
own definitions.

Since we already have ioread*_rep()/iowrite*_rep() that have the
same behavior on sparc64 (i.e. all PCI I/O space is memory mapped),
we can rename the existing helpers and add macros to define them
to the same implementation.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
 arch/sparc/include/asm/io_64.h | 19 +++++++++++++------
 1 file changed, 13 insertions(+), 6 deletions(-)

diff --git a/arch/sparc/include/asm/io_64.h b/arch/sparc/include/asm/io_64.h
index 9a1e9cbc7e6d..b162c23ae8c2 100644
--- a/arch/sparc/include/asm/io_64.h
+++ b/arch/sparc/include/asm/io_64.h
@@ -243,35 +243,42 @@ void insb(unsigned long, void *, unsigned long);
 void insw(unsigned long, void *, unsigned long);
 void insl(unsigned long, void *, unsigned long);
 
-static inline void ioread8_rep(void __iomem *port, void *buf, unsigned long count)
+static inline void readsb(void __iomem *port, void *buf, unsigned long count)
 {
 	insb((unsigned long __force)port, buf, count);
 }
-static inline void ioread16_rep(void __iomem *port, void *buf, unsigned long count)
+static inline void readsw(void __iomem *port, void *buf, unsigned long count)
 {
 	insw((unsigned long __force)port, buf, count);
 }
 
-static inline void ioread32_rep(void __iomem *port, void *buf, unsigned long count)
+static inline void readsl(void __iomem *port, void *buf, unsigned long count)
 {
 	insl((unsigned long __force)port, buf, count);
 }
 
-static inline void iowrite8_rep(void __iomem *port, const void *buf, unsigned long count)
+static inline void writesb(void __iomem *port, const void *buf, unsigned long count)
 {
 	outsb((unsigned long __force)port, buf, count);
 }
 
-static inline void iowrite16_rep(void __iomem *port, const void *buf, unsigned long count)
+static inline void writesw(void __iomem *port, const void *buf, unsigned long count)
 {
 	outsw((unsigned long __force)port, buf, count);
 }
 
-static inline void iowrite32_rep(void __iomem *port, const void *buf, unsigned long count)
+static inline void writesl(void __iomem *port, const void *buf, unsigned long count)
 {
 	outsl((unsigned long __force)port, buf, count);
 }
 
+#define ioread8_rep(p,d,l)	readsb(p,d,l)
+#define ioread16_rep(p,d,l)	readsw(p,d,l)
+#define ioread32_rep(p,d,l)	readsl(p,d,l)
+#define iowrite8_rep(p,d,l)	writesb(p,d,l)
+#define iowrite16_rep(p,d,l)	writesw(p,d,l)
+#define iowrite32_rep(p,d,l)	writesl(p,d,l)
+
 /* Valid I/O Space regions are anywhere, because each PCI bus supported
  * can live in an arbitrary area of the physical address range.
  */
-- 
2.9.0

[PATCH 2/2] sparc64: add reads{b,w,l}/writes{b,w,l}

[Arnd Bergmann]

Some drivers need these for compile-testing. On most architectures
they come from asm-generic/io.h, but not on sparc64, which has its
own definitions.

Since we already have ioread*_rep()/iowrite*_rep() that have the
same behavior on sparc64 (i.e. all PCI I/O space is memory mapped),
we can rename the existing helpers and add macros to define them
to the same implementation.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
 arch/sparc/include/asm/io_64.h | 19 +++++++++++++------
 1 file changed, 13 insertions(+), 6 deletions(-)

diff --git a/arch/sparc/include/asm/io_64.h b/arch/sparc/include/asm/io_64.h
index 9a1e9cbc7e6d..b162c23ae8c2 100644
--- a/arch/sparc/include/asm/io_64.h
+++ b/arch/sparc/include/asm/io_64.h
@@ -243,35 +243,42 @@ void insb(unsigned long, void *, unsigned long);
 void insw(unsigned long, void *, unsigned long);
 void insl(unsigned long, void *, unsigned long);
 
-static inline void ioread8_rep(void __iomem *port, void *buf, unsigned long count)
+static inline void readsb(void __iomem *port, void *buf, unsigned long count)
 {
 	insb((unsigned long __force)port, buf, count);
 }
-static inline void ioread16_rep(void __iomem *port, void *buf, unsigned long count)
+static inline void readsw(void __iomem *port, void *buf, unsigned long count)
 {
 	insw((unsigned long __force)port, buf, count);
 }
 
-static inline void ioread32_rep(void __iomem *port, void *buf, unsigned long count)
+static inline void readsl(void __iomem *port, void *buf, unsigned long count)
 {
 	insl((unsigned long __force)port, buf, count);
 }
 
-static inline void iowrite8_rep(void __iomem *port, const void *buf, unsigned long count)
+static inline void writesb(void __iomem *port, const void *buf, unsigned long count)
 {
 	outsb((unsigned long __force)port, buf, count);
 }
 
-static inline void iowrite16_rep(void __iomem *port, const void *buf, unsigned long count)
+static inline void writesw(void __iomem *port, const void *buf, unsigned long count)
 {
 	outsw((unsigned long __force)port, buf, count);
 }
 
-static inline void iowrite32_rep(void __iomem *port, const void *buf, unsigned long count)
+static inline void writesl(void __iomem *port, const void *buf, unsigned long count)
 {
 	outsl((unsigned long __force)port, buf, count);
 }
 
+#define ioread8_rep(p,d,l)	readsb(p,d,l)
+#define ioread16_rep(p,d,l)	readsw(p,d,l)
+#define ioread32_rep(p,d,l)	readsl(p,d,l)
+#define iowrite8_rep(p,d,l)	writesb(p,d,l)
+#define iowrite16_rep(p,d,l)	writesw(p,d,l)
+#define iowrite32_rep(p,d,l)	writesl(p,d,l)
+
 /* Valid I/O Space regions are anywhere, because each PCI bus supported
  * can live in an arbitrary area of the physical address range.
  */
-- 
2.9.0

Re: [PATCH 2/2] sparc64: add reads{b,w,l}/writes{b,w,l}

[David Miller]

From: Arnd Bergmann <arnd@arndb.de>
Date: Wed, 11 Jul 2018 14:08:06 +0200

> Some drivers need these for compile-testing. On most architectures
> they come from asm-generic/io.h, but not on sparc64, which has its
> own definitions.
> 
> Since we already have ioread*_rep()/iowrite*_rep() that have the
> same behavior on sparc64 (i.e. all PCI I/O space is memory mapped),
> we can rename the existing helpers and add macros to define them
> to the same implementation.
> 
> Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Acked-by: David S. Miller <davem@davemloft.net>

Re: [PATCH 2/2] sparc64: add reads{b,w,l}/writes{b,w,l}

[David Miller]

From: Arnd Bergmann <arnd@arndb.de>
Date: Wed, 11 Jul 2018 14:08:06 +0200

> Some drivers need these for compile-testing. On most architectures
> they come from asm-generic/io.h, but not on sparc64, which has its
> own definitions.
> 
> Since we already have ioread*_rep()/iowrite*_rep() that have the
> same behavior on sparc64 (i.e. all PCI I/O space is memory mapped),
> we can rename the existing helpers and add macros to define them
> to the same implementation.
> 
> Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Acked-by: David S. Miller <davem@davemloft.net>

Re: [PATCH 2/2] sparc64: add reads{b,w,l}/writes{b,w,l}

[Boris Brezillon]

+Miquel who's in charge of the NAND tree for this release

On Wed, 11 Jul 2018 14:08:06 +0200
Arnd Bergmann <arnd@arndb.de> wrote:

> Some drivers need these for compile-testing. On most architectures
> they come from asm-generic/io.h, but not on sparc64, which has its
> own definitions.
> 
> Since we already have ioread*_rep()/iowrite*_rep() that have the
> same behavior on sparc64 (i.e. all PCI I/O space is memory mapped),
> we can rename the existing helpers and add macros to define them
> to the same implementation.
> 
> Signed-off-by: Arnd Bergmann <arnd@arndb.de>

I tried to compile a sparc64 kernel with COMPILE_TEST=y plus the
orion and s3c2410 NAND drivers enabled and it compiles fine (it does
without this patch). So it seems to fix the compilation error reported
by kbuild robots.

Tested-by: Boris Brezillon <boris.brezillon@bootlin>
(only compile-tested)

Dave gave his A-b, so, if everyone is okay with that, I'd like this
patch to go trough the NAND tree.

Thanks,

Boris

> ---
>  arch/sparc/include/asm/io_64.h | 19 +++++++++++++------
>  1 file changed, 13 insertions(+), 6 deletions(-)
> 
> diff --git a/arch/sparc/include/asm/io_64.h b/arch/sparc/include/asm/io_64.h
> index 9a1e9cbc7e6d..b162c23ae8c2 100644
> --- a/arch/sparc/include/asm/io_64.h
> +++ b/arch/sparc/include/asm/io_64.h
> @@ -243,35 +243,42 @@ void insb(unsigned long, void *, unsigned long);
>  void insw(unsigned long, void *, unsigned long);
>  void insl(unsigned long, void *, unsigned long);
>  
> -static inline void ioread8_rep(void __iomem *port, void *buf, unsigned long count)
> +static inline void readsb(void __iomem *port, void *buf, unsigned long count)
>  {
>  	insb((unsigned long __force)port, buf, count);
>  }
> -static inline void ioread16_rep(void __iomem *port, void *buf, unsigned long count)
> +static inline void readsw(void __iomem *port, void *buf, unsigned long count)
>  {
>  	insw((unsigned long __force)port, buf, count);
>  }
>  
> -static inline void ioread32_rep(void __iomem *port, void *buf, unsigned long count)
> +static inline void readsl(void __iomem *port, void *buf, unsigned long count)
>  {
>  	insl((unsigned long __force)port, buf, count);
>  }
>  
> -static inline void iowrite8_rep(void __iomem *port, const void *buf, unsigned long count)
> +static inline void writesb(void __iomem *port, const void *buf, unsigned long count)
>  {
>  	outsb((unsigned long __force)port, buf, count);
>  }
>  
> -static inline void iowrite16_rep(void __iomem *port, const void *buf, unsigned long count)
> +static inline void writesw(void __iomem *port, const void *buf, unsigned long count)
>  {
>  	outsw((unsigned long __force)port, buf, count);
>  }
>  
> -static inline void iowrite32_rep(void __iomem *port, const void *buf, unsigned long count)
> +static inline void writesl(void __iomem *port, const void *buf, unsigned long count)
>  {
>  	outsl((unsigned long __force)port, buf, count);
>  }
>  
> +#define ioread8_rep(p,d,l)	readsb(p,d,l)
> +#define ioread16_rep(p,d,l)	readsw(p,d,l)
> +#define ioread32_rep(p,d,l)	readsl(p,d,l)
> +#define iowrite8_rep(p,d,l)	writesb(p,d,l)
> +#define iowrite16_rep(p,d,l)	writesw(p,d,l)
> +#define iowrite32_rep(p,d,l)	writesl(p,d,l)
> +
>  /* Valid I/O Space regions are anywhere, because each PCI bus supported
>   * can live in an arbitrary area of the physical address range.
>   */

Re: [PATCH 2/2] sparc64: add reads{b,w,l}/writes{b,w,l}

[Boris Brezillon]

+Miquel who's in charge of the NAND tree for this release

On Wed, 11 Jul 2018 14:08:06 +0200
Arnd Bergmann <arnd@arndb.de> wrote:

> Some drivers need these for compile-testing. On most architectures
> they come from asm-generic/io.h, but not on sparc64, which has its
> own definitions.
> 
> Since we already have ioread*_rep()/iowrite*_rep() that have the
> same behavior on sparc64 (i.e. all PCI I/O space is memory mapped),
> we can rename the existing helpers and add macros to define them
> to the same implementation.
> 
> Signed-off-by: Arnd Bergmann <arnd@arndb.de>

I tried to compile a sparc64 kernel with COMPILE_TEST=y plus the
orion and s3c2410 NAND drivers enabled and it compiles fine (it does
without this patch). So it seems to fix the compilation error reported
by kbuild robots.

Tested-by: Boris Brezillon <boris.brezillon@bootlin>
(only compile-tested)

Dave gave his A-b, so, if everyone is okay with that, I'd like this
patch to go trough the NAND tree.

Thanks,

Boris

> ---
>  arch/sparc/include/asm/io_64.h | 19 +++++++++++++------
>  1 file changed, 13 insertions(+), 6 deletions(-)
> 
> diff --git a/arch/sparc/include/asm/io_64.h b/arch/sparc/include/asm/io_64.h
> index 9a1e9cbc7e6d..b162c23ae8c2 100644
> --- a/arch/sparc/include/asm/io_64.h
> +++ b/arch/sparc/include/asm/io_64.h
> @@ -243,35 +243,42 @@ void insb(unsigned long, void *, unsigned long);
>  void insw(unsigned long, void *, unsigned long);
>  void insl(unsigned long, void *, unsigned long);
>  
> -static inline void ioread8_rep(void __iomem *port, void *buf, unsigned long count)
> +static inline void readsb(void __iomem *port, void *buf, unsigned long count)
>  {
>  	insb((unsigned long __force)port, buf, count);
>  }
> -static inline void ioread16_rep(void __iomem *port, void *buf, unsigned long count)
> +static inline void readsw(void __iomem *port, void *buf, unsigned long count)
>  {
>  	insw((unsigned long __force)port, buf, count);
>  }
>  
> -static inline void ioread32_rep(void __iomem *port, void *buf, unsigned long count)
> +static inline void readsl(void __iomem *port, void *buf, unsigned long count)
>  {
>  	insl((unsigned long __force)port, buf, count);
>  }
>  
> -static inline void iowrite8_rep(void __iomem *port, const void *buf, unsigned long count)
> +static inline void writesb(void __iomem *port, const void *buf, unsigned long count)
>  {
>  	outsb((unsigned long __force)port, buf, count);
>  }
>  
> -static inline void iowrite16_rep(void __iomem *port, const void *buf, unsigned long count)
> +static inline void writesw(void __iomem *port, const void *buf, unsigned long count)
>  {
>  	outsw((unsigned long __force)port, buf, count);
>  }
>  
> -static inline void iowrite32_rep(void __iomem *port, const void *buf, unsigned long count)
> +static inline void writesl(void __iomem *port, const void *buf, unsigned long count)
>  {
>  	outsl((unsigned long __force)port, buf, count);
>  }
>  
> +#define ioread8_rep(p,d,l)	readsb(p,d,l)
> +#define ioread16_rep(p,d,l)	readsw(p,d,l)
> +#define ioread32_rep(p,d,l)	readsl(p,d,l)
> +#define iowrite8_rep(p,d,l)	writesb(p,d,l)
> +#define iowrite16_rep(p,d,l)	writesw(p,d,l)
> +#define iowrite32_rep(p,d,l)	writesl(p,d,l)
> +
>  /* Valid I/O Space regions are anywhere, because each PCI bus supported
>   * can live in an arbitrary area of the physical address range.
>   */

Re: [PATCH 1/2] ia64: use asm-generic/io.h

[Boris Brezillon]

+Miquel

On Wed, 11 Jul 2018 14:08:05 +0200
Arnd Bergmann <arnd@arndb.de> wrote:

> asm-generic/io.h provides a generic implementation of all I/O accessors,
> which the architectures can override.
> 
> Since ia64 does not provide readsl/writesl etc, any driver using those
> fails to build, and including asm-generic/io.h will provide the
> missing interfaces, as well as any other future interfaces that get
> added there. We need to #define a couple of symbols to themselves
> in the ia64 to ensure that we use the ia64 specific version of those
> rather than the generic one.
> 
> There should be no other effect than adding {read,write}s{b,w,l}()
> as well as {in,out}s{b,w,l}_p(), which were also not provided
> by ia64 but are provided by the generic header for historic reasons.
> 
> Signed-off-by: Arnd Bergmann <arnd@arndb.de>

As for the other patch, I compile-tested it and it fixes the
compilation errors reported by kbuild robots.

Tested-by: Boris Brezillon <boris.brezillon@bootlin.com>

If everyone is fine with that, we'll take the patch through the NAND
tree.

Thanks,

Boris

> ---
>  arch/ia64/include/asm/io.h | 13 ++++++++++++-
>  1 file changed, 12 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/ia64/include/asm/io.h b/arch/ia64/include/asm/io.h
> index fb0651961e2c..6f952171abf9 100644
> --- a/arch/ia64/include/asm/io.h
> +++ b/arch/ia64/include/asm/io.h
> @@ -83,12 +83,14 @@ virt_to_phys (volatile void *address)
>  {
>  	return (unsigned long) address - PAGE_OFFSET;
>  }
> +#define virt_to_phys virt_to_phys
>  
>  static inline void*
>  phys_to_virt (unsigned long address)
>  {
>  	return (void *) (address + PAGE_OFFSET);
>  }
> +#define phys_to_virt phys_to_virt
>  
>  #define ARCH_HAS_VALID_PHYS_ADDR_RANGE
>  extern u64 kern_mem_attribute (unsigned long phys_addr, unsigned long size);
> @@ -433,9 +435,11 @@ static inline void __iomem * ioremap_cache (unsigned long phys_addr, unsigned lo
>  {
>  	return ioremap(phys_addr, size);
>  }
> +#define ioremap ioremap
> +#define ioremap_nocache ioremap_nocache
>  #define ioremap_cache ioremap_cache
>  #define ioremap_uc ioremap_nocache
> -
> +#define iounmap iounmap
>  
>  /*
>   * String version of IO memory access ops:
> @@ -444,6 +448,13 @@ extern void memcpy_fromio(void *dst, const volatile void __iomem *src, long n);
>  extern void memcpy_toio(volatile void __iomem *dst, const void *src, long n);
>  extern void memset_io(volatile void __iomem *s, int c, long n);
>  
> +#define memcpy_fromio memcpy_fromio
> +#define memcpy_toio memcpy_toio
> +#define memset_io memset_io
> +#define xlate_dev_kmem_ptr xlate_dev_kmem_ptr
> +#define xlate_dev_mem_ptr xlate_dev_mem_ptr
> +#include <asm-generic/io.h>
> +
>  # endif /* __KERNEL__ */
>  
>  #endif /* _ASM_IA64_IO_H */

Re: [PATCH 1/2] ia64: use asm-generic/io.h

[Boris Brezillon]

+Miquel

On Wed, 11 Jul 2018 14:08:05 +0200
Arnd Bergmann <arnd@arndb.de> wrote:

> asm-generic/io.h provides a generic implementation of all I/O accessors,
> which the architectures can override.
> 
> Since ia64 does not provide readsl/writesl etc, any driver using those
> fails to build, and including asm-generic/io.h will provide the
> missing interfaces, as well as any other future interfaces that get
> added there. We need to #define a couple of symbols to themselves
> in the ia64 to ensure that we use the ia64 specific version of those
> rather than the generic one.
> 
> There should be no other effect than adding {read,write}s{b,w,l}()
> as well as {in,out}s{b,w,l}_p(), which were also not provided
> by ia64 but are provided by the generic header for historic reasons.
> 
> Signed-off-by: Arnd Bergmann <arnd@arndb.de>

As for the other patch, I compile-tested it and it fixes the
compilation errors reported by kbuild robots.

Tested-by: Boris Brezillon <boris.brezillon@bootlin.com>

If everyone is fine with that, we'll take the patch through the NAND
tree.

Thanks,

Boris

> ---
>  arch/ia64/include/asm/io.h | 13 ++++++++++++-
>  1 file changed, 12 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/ia64/include/asm/io.h b/arch/ia64/include/asm/io.h
> index fb0651961e2c..6f952171abf9 100644
> --- a/arch/ia64/include/asm/io.h
> +++ b/arch/ia64/include/asm/io.h
> @@ -83,12 +83,14 @@ virt_to_phys (volatile void *address)
>  {
>  	return (unsigned long) address - PAGE_OFFSET;
>  }
> +#define virt_to_phys virt_to_phys
>  
>  static inline void*
>  phys_to_virt (unsigned long address)
>  {
>  	return (void *) (address + PAGE_OFFSET);
>  }
> +#define phys_to_virt phys_to_virt
>  
>  #define ARCH_HAS_VALID_PHYS_ADDR_RANGE
>  extern u64 kern_mem_attribute (unsigned long phys_addr, unsigned long size);
> @@ -433,9 +435,11 @@ static inline void __iomem * ioremap_cache (unsigned long phys_addr, unsigned lo
>  {
>  	return ioremap(phys_addr, size);
>  }
> +#define ioremap ioremap
> +#define ioremap_nocache ioremap_nocache
>  #define ioremap_cache ioremap_cache
>  #define ioremap_uc ioremap_nocache
> -
> +#define iounmap iounmap
>  
>  /*
>   * String version of IO memory access ops:
> @@ -444,6 +448,13 @@ extern void memcpy_fromio(void *dst, const volatile void __iomem *src, long n);
>  extern void memcpy_toio(volatile void __iomem *dst, const void *src, long n);
>  extern void memset_io(volatile void __iomem *s, int c, long n);
>  
> +#define memcpy_fromio memcpy_fromio
> +#define memcpy_toio memcpy_toio
> +#define memset_io memset_io
> +#define xlate_dev_kmem_ptr xlate_dev_kmem_ptr
> +#define xlate_dev_mem_ptr xlate_dev_mem_ptr
> +#include <asm-generic/io.h>
> +
>  # endif /* __KERNEL__ */
>  
>  #endif /* _ASM_IA64_IO_H */

Re: [PATCH 2/2] sparc64: add reads{b,w,l}/writes{b,w,l}

[Miquel Raynal]

Hi Boris,

Boris Brezillon <boris.brezillon@bootlin.com> wrote on Fri, 20 Jul 2018
10:23:39 +0200:

> +Miquel who's in charge of the NAND tree for this release
> 
> On Wed, 11 Jul 2018 14:08:06 +0200
> Arnd Bergmann <arnd@arndb.de> wrote:
> 
> > Some drivers need these for compile-testing. On most architectures
> > they come from asm-generic/io.h, but not on sparc64, which has its
> > own definitions.
> > 
> > Since we already have ioread*_rep()/iowrite*_rep() that have the
> > same behavior on sparc64 (i.e. all PCI I/O space is memory mapped),
> > we can rename the existing helpers and add macros to define them
> > to the same implementation.
> > 
> > Signed-off-by: Arnd Bergmann <arnd@arndb.de>  
> 
> I tried to compile a sparc64 kernel with COMPILE_TEST=y plus the
> orion and s3c2410 NAND drivers enabled and it compiles fine (it does
> without this patch). So it seems to fix the compilation error reported
> by kbuild robots.
> 
> Tested-by: Boris Brezillon <boris.brezillon@bootlin>
> (only compile-tested)
> 
> Dave gave his A-b, so, if everyone is okay with that, I'd like this
> patch to go trough the NAND tree.

Applied to nand/next.

Thanks,
Miquèl

Re: [PATCH 2/2] sparc64: add reads{b,w,l}/writes{b,w,l}

[Miquel Raynal]

Hi Boris,

Boris Brezillon <boris.brezillon@bootlin.com> wrote on Fri, 20 Jul 2018
10:23:39 +0200:

> +Miquel who's in charge of the NAND tree for this release
> 
> On Wed, 11 Jul 2018 14:08:06 +0200
> Arnd Bergmann <arnd@arndb.de> wrote:
> 
> > Some drivers need these for compile-testing. On most architectures
> > they come from asm-generic/io.h, but not on sparc64, which has its
> > own definitions.
> > 
> > Since we already have ioread*_rep()/iowrite*_rep() that have the
> > same behavior on sparc64 (i.e. all PCI I/O space is memory mapped),
> > we can rename the existing helpers and add macros to define them
> > to the same implementation.
> > 
> > Signed-off-by: Arnd Bergmann <arnd@arndb.de>  
> 
> I tried to compile a sparc64 kernel with COMPILE_TEST=y plus the
> orion and s3c2410 NAND drivers enabled and it compiles fine (it does
> without this patch). So it seems to fix the compilation error reported
> by kbuild robots.
> 
> Tested-by: Boris Brezillon <boris.brezillon@bootlin>
> (only compile-tested)
> 
> Dave gave his A-b, so, if everyone is okay with that, I'd like this
> patch to go trough the NAND tree.

Applied to nand/next.

Thanks,
Miquèl

Re: [PATCH 2/2] sparc64: add reads{b,w,l}/writes{b,w,l}

[Miquel Raynal]

Hi Boris,

Boris Brezillon <boris.brezillon@bootlin.com> wrote on Fri, 20 Jul 2018
10:23:39 +0200:

> +Miquel who's in charge of the NAND tree for this release
> 
> On Wed, 11 Jul 2018 14:08:06 +0200
> Arnd Bergmann <arnd@arndb.de> wrote:
> 
> > Some drivers need these for compile-testing. On most architectures
> > they come from asm-generic/io.h, but not on sparc64, which has its
> > own definitions.
> > 
> > Since we already have ioread*_rep()/iowrite*_rep() that have the
> > same behavior on sparc64 (i.e. all PCI I/O space is memory mapped),
> > we can rename the existing helpers and add macros to define them
> > to the same implementation.
> > 
> > Signed-off-by: Arnd Bergmann <arnd@arndb.de>  
> 
> I tried to compile a sparc64 kernel with COMPILE_TEST=y plus the
> orion and s3c2410 NAND drivers enabled and it compiles fine (it does
> without this patch). So it seems to fix the compilation error reported
> by kbuild robots.
> 
> Tested-by: Boris Brezillon <boris.brezillon@bootlin>
> (only compile-tested)
> 
> Dave gave his A-b, so, if everyone is okay with that, I'd like this
> patch to go trough the NAND tree.

Applied to nand/next.

Thanks,
Miquèl

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Re: [PATCH 2/2] sparc64: add reads{b,w,l}/writes{b,w,l}

[Miquel Raynal]

Hi Boris,

Boris Brezillon <boris.brezillon@bootlin.com> wrote on Fri, 20 Jul 2018
10:23:39 +0200:

> +Miquel who's in charge of the NAND tree for this release
> 
> On Wed, 11 Jul 2018 14:08:06 +0200
> Arnd Bergmann <arnd@arndb.de> wrote:
> 
> > Some drivers need these for compile-testing. On most architectures
> > they come from asm-generic/io.h, but not on sparc64, which has its
> > own definitions.
> > 
> > Since we already have ioread*_rep()/iowrite*_rep() that have the
> > same behavior on sparc64 (i.e. all PCI I/O space is memory mapped),
> > we can rename the existing helpers and add macros to define them
> > to the same implementation.
> > 
> > Signed-off-by: Arnd Bergmann <arnd@arndb.de>  
> 
> I tried to compile a sparc64 kernel with COMPILE_TEST=y plus the
> orion and s3c2410 NAND drivers enabled and it compiles fine (it does
> without this patch). So it seems to fix the compilation error reported
> by kbuild robots.
> 
> Tested-by: Boris Brezillon <boris.brezillon@bootlin>
> (only compile-tested)
> 
> Dave gave his A-b, so, if everyone is okay with that, I'd like this
> patch to go trough the NAND tree.

Applied to nand/next.

Thanks,
Miquèl

Re: [PATCH 1/2] ia64: use asm-generic/io.h

[Miquel Raynal]

Hi Boris,

Boris Brezillon <boris.brezillon@bootlin.com> wrote on Fri, 20 Jul 2018
11:10:04 +0200:

> +Miquel
> 
> On Wed, 11 Jul 2018 14:08:05 +0200
> Arnd Bergmann <arnd@arndb.de> wrote:
> 
> > asm-generic/io.h provides a generic implementation of all I/O accessors,
> > which the architectures can override.
> > 
> > Since ia64 does not provide readsl/writesl etc, any driver using those
> > fails to build, and including asm-generic/io.h will provide the
> > missing interfaces, as well as any other future interfaces that get
> > added there. We need to #define a couple of symbols to themselves
> > in the ia64 to ensure that we use the ia64 specific version of those
> > rather than the generic one.
> > 
> > There should be no other effect than adding {read,write}s{b,w,l}()
> > as well as {in,out}s{b,w,l}_p(), which were also not provided
> > by ia64 but are provided by the generic header for historic reasons.
> > 
> > Signed-off-by: Arnd Bergmann <arnd@arndb.de>  
> 
> As for the other patch, I compile-tested it and it fixes the
> compilation errors reported by kbuild robots.
> 
> Tested-by: Boris Brezillon <boris.brezillon@bootlin.com>
> 
> If everyone is fine with that, we'll take the patch through the NAND
> tree.

Applied to nand/next.

Thanks,
Miquèl

Re: [PATCH 1/2] ia64: use asm-generic/io.h

[Miquel Raynal]

Hi Boris,

Boris Brezillon <boris.brezillon@bootlin.com> wrote on Fri, 20 Jul 2018
11:10:04 +0200:

> +Miquel
> 
> On Wed, 11 Jul 2018 14:08:05 +0200
> Arnd Bergmann <arnd@arndb.de> wrote:
> 
> > asm-generic/io.h provides a generic implementation of all I/O accessors,
> > which the architectures can override.
> > 
> > Since ia64 does not provide readsl/writesl etc, any driver using those
> > fails to build, and including asm-generic/io.h will provide the
> > missing interfaces, as well as any other future interfaces that get
> > added there. We need to #define a couple of symbols to themselves
> > in the ia64 to ensure that we use the ia64 specific version of those
> > rather than the generic one.
> > 
> > There should be no other effect than adding {read,write}s{b,w,l}()
> > as well as {in,out}s{b,w,l}_p(), which were also not provided
> > by ia64 but are provided by the generic header for historic reasons.
> > 
> > Signed-off-by: Arnd Bergmann <arnd@arndb.de>  
> 
> As for the other patch, I compile-tested it and it fixes the
> compilation errors reported by kbuild robots.
> 
> Tested-by: Boris Brezillon <boris.brezillon@bootlin.com>
> 
> If everyone is fine with that, we'll take the patch through the NAND
> tree.

Applied to nand/next.

Thanks,
Miquèl
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Re: [PATCH 1/2] ia64: use asm-generic/io.h

[Miquel Raynal]

Hi Boris,

Boris Brezillon <boris.brezillon@bootlin.com> wrote on Fri, 20 Jul 2018
11:10:04 +0200:

> +Miquel
> 
> On Wed, 11 Jul 2018 14:08:05 +0200
> Arnd Bergmann <arnd@arndb.de> wrote:
> 
> > asm-generic/io.h provides a generic implementation of all I/O accessors,
> > which the architectures can override.
> > 
> > Since ia64 does not provide readsl/writesl etc, any driver using those
> > fails to build, and including asm-generic/io.h will provide the
> > missing interfaces, as well as any other future interfaces that get
> > added there. We need to #define a couple of symbols to themselves
> > in the ia64 to ensure that we use the ia64 specific version of those
> > rather than the generic one.
> > 
> > There should be no other effect than adding {read,write}s{b,w,l}()
> > as well as {in,out}s{b,w,l}_p(), which were also not provided
> > by ia64 but are provided by the generic header for historic reasons.
> > 
> > Signed-off-by: Arnd Bergmann <arnd@arndb.de>  
> 
> As for the other patch, I compile-tested it and it fixes the
> compilation errors reported by kbuild robots.
> 
> Tested-by: Boris Brezillon <boris.brezillon@bootlin.com>
> 
> If everyone is fine with that, we'll take the patch through the NAND
> tree.

Applied to nand/next.

Thanks,
Miquèl

Re: [PATCH 1/2] ia64: use asm-generic/io.h

[Boris Brezillon]

Hi Arnd,

On Wed, 11 Jul 2018 14:08:05 +0200
Arnd Bergmann <arnd@arndb.de> wrote:

> asm-generic/io.h provides a generic implementation of all I/O accessors,
> which the architectures can override.
> 
> Since ia64 does not provide readsl/writesl etc, any driver using those
> fails to build, and including asm-generic/io.h will provide the
> missing interfaces, as well as any other future interfaces that get
> added there. We need to #define a couple of symbols to themselves
> in the ia64 to ensure that we use the ia64 specific version of those
> rather than the generic one.
> 
> There should be no other effect than adding {read,write}s{b,w,l}()
> as well as {in,out}s{b,w,l}_p(), which were also not provided
> by ia64 but are provided by the generic header for historic reasons.
> 

Kbuild robots reported the same problem on parisc an alpha :-/.

Regards,

Boris

Re: [PATCH 1/2] ia64: use asm-generic/io.h

[Boris Brezillon]

Hi Arnd,

On Wed, 11 Jul 2018 14:08:05 +0200
Arnd Bergmann <arnd@arndb.de> wrote:

> asm-generic/io.h provides a generic implementation of all I/O accessors,
> which the architectures can override.
> 
> Since ia64 does not provide readsl/writesl etc, any driver using those
> fails to build, and including asm-generic/io.h will provide the
> missing interfaces, as well as any other future interfaces that get
> added there. We need to #define a couple of symbols to themselves
> in the ia64 to ensure that we use the ia64 specific version of those
> rather than the generic one.
> 
> There should be no other effect than adding {read,write}s{b,w,l}()
> as well as {in,out}s{b,w,l}_p(), which were also not provided
> by ia64 but are provided by the generic header for historic reasons.
> 

Kbuild robots reported the same problem on parisc an alpha :-/.

Regards,

Boris

Re: [PATCH 1/2] ia64: use asm-generic/io.h

[Luck, Tony]

On Wed, Jul 11, 2018 at 02:08:05PM +0200, Arnd Bergmann wrote:
> asm-generic/io.h provides a generic implementation of all I/O accessors,
> which the architectures can override.
> 
> Since ia64 does not provide readsl/writesl etc, any driver using those
> fails to build, and including asm-generic/io.h will provide the
> missing interfaces, as well as any other future interfaces that get
> added there. We need to #define a couple of symbols to themselves
> in the ia64 to ensure that we use the ia64 specific version of those
> rather than the generic one.
> 
> There should be no other effect than adding {read,write}s{b,w,l}()
> as well as {in,out}s{b,w,l}_p(), which were also not provided
> by ia64 but are provided by the generic header for historic reasons.

Sorry. I should have tried this when you sent it to me a month ago.

There must be something subtle in there somewhere because ia64 panics
early in boot with this patch present.  Revert the patch and it boots
OK.

Snip from console log:


NET: Registered protocol family 16
ACPI: bus type PCI registered
acpiphp: ACPI Hot Plug PCI Controller Driver version: 0.5
HugeTLB registered 256 MiB page size, pre-allocated 0 pages
ACPI: Added _OSI(Module Device)
ACPI: Added _OSI(Processor Device)
ACPI: Added _OSI(3.0 _SCP Extensions)
ACPI: Added _OSI(Processor Aggregator Device)
ACPI: Added _OSI(Linux-Dell-Video)
ACPI: 1 ACPI AML tables successfully acquired and loaded
ACPI: Interpreter enabled
ACPI: (supports S0 S5)
ACPI: Using IOSAPIC for interrupt routing
ACPI: Enabled 11 GPEs in block 00 to 3F
ACPI: PCI Root Bridge [PCI0] (domain 0000 [bus 00-7f])
acpi PNP0A08:00: _OSC: OS supports [ExtendedConfig Segments MSI]
acpi PNP0A08:00: PCIe port services disabled; not requesting _OSC control
kernel BUG at lib/ioremap.c:72!
swapper/0[1]: bugcheck! 0 [1]
Modules linked in:

CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.18.0-rc3-bisect-00137-g0bbf47e #15
Hardware name: Supermicro I8QBH/I8QBH, BIOS I8QBH 15.006.004RAS 2010/05/10
psr : 00001010084a6010 ifs : 800000000000050d ip  : [<a000000100e6d830>]    Not tainted (4.18.0-rc3-bisect-00137-g0bbf47e)
ip is at ioremap_pte_range+0x190/0x1a0
unat: 0000000000000000 pfs : 000000000000050d rsc : 0000000000000003
rnat: fffffffffffc3358 bsps: 0000000000000000 pr  : 0000000000014745
ldrs: 0000000000000000 ccv : 00000000017c00be fpsr: 0009804c8a70433f
csd : 0930ffff00063000 ssd : 0930ffff00063000
b0  : a000000100e6d830 b6  : a000000100e91fa0 b7  : a000000100e91fa0
f6  : 1003e00000000000000a0 f7  : 1003e0000000000000000
f8  : 1003e0000000000000001 f9  : 1003efffffffffffffffc
f10 : 1001b80140227f7febfde f11 : 1003e20c49ba5e353f7cf
r1  : a000000101b3b7e0 r2  : a0000001018ca770 r3  : a00000010193c5d8
r8  : 000000000000001f r9  : 0000000000004000 r10 : fffffffffffc0408
r11 : 000000000000047e r12 : e000000301bdfca0 r13 : e000000301bd0000
r14 : a0000001018ca778 r15 : a0000001018ca778 r16 : 0000000000000000
r17 : 00000010084a2010 r18 : e000000301bdfc60 r19 : 0000000000000000
r20 : 000000000000047c r21 : 0000000000000000 r22 : 00000000000000ea
r23 : 000000000000017c r24 : 000000000000017c r25 : a0000001011d87b8
r26 : a000000100e91fa0 r27 : ffffffffffffffff r28 : a000000100e91fa0
r29 : a0000001011d87b8 r30 : a000000100e91fa0 r31 : a00000010198a300

Call Trace:
 [<a0000001000155e0>] show_stack+0x80/0xa0
                                sp=e000000301bdf880 bsp=e000000301bd17b8
Disabling lock debugging due to kernel taint
Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b

---[ end Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b

Here's the surrounding code to the "BUG at lib/ioremap.c"

 61 static int ioremap_pte_range(pmd_t *pmd, unsigned long addr,
 62                 unsigned long end, phys_addr_t phys_addr, pgprot_t prot)
 63 {
 64         pte_t *pte;
 65         u64 pfn;
 66
 67         pfn = phys_addr >> PAGE_SHIFT;
 68         pte = pte_alloc_kernel(pmd, addr);
 69         if (!pte)
 70                 return -ENOMEM;
 71         do {
 72                 BUG_ON(!pte_none(*pte));
 73                 set_pte_at(&init_mm, addr, pte, pfn_pte(pfn, prot));
 74                 pfn++;
 75         } while (pte++, addr += PAGE_SIZE, addr != end);
 76         return 0;
 77 }

Re: [PATCH 1/2] ia64: use asm-generic/io.h

[Luck, Tony]

On Wed, Jul 11, 2018 at 02:08:05PM +0200, Arnd Bergmann wrote:
> asm-generic/io.h provides a generic implementation of all I/O accessors,
> which the architectures can override.
> 
> Since ia64 does not provide readsl/writesl etc, any driver using those
> fails to build, and including asm-generic/io.h will provide the
> missing interfaces, as well as any other future interfaces that get
> added there. We need to #define a couple of symbols to themselves
> in the ia64 to ensure that we use the ia64 specific version of those
> rather than the generic one.
> 
> There should be no other effect than adding {read,write}s{b,w,l}()
> as well as {in,out}s{b,w,l}_p(), which were also not provided
> by ia64 but are provided by the generic header for historic reasons.

Sorry. I should have tried this when you sent it to me a month ago.

There must be something subtle in there somewhere because ia64 panics
early in boot with this patch present.  Revert the patch and it boots
OK.

Snip from console log:


NET: Registered protocol family 16
ACPI: bus type PCI registered
acpiphp: ACPI Hot Plug PCI Controller Driver version: 0.5
HugeTLB registered 256 MiB page size, pre-allocated 0 pages
ACPI: Added _OSI(Module Device)
ACPI: Added _OSI(Processor Device)
ACPI: Added _OSI(3.0 _SCP Extensions)
ACPI: Added _OSI(Processor Aggregator Device)
ACPI: Added _OSI(Linux-Dell-Video)
ACPI: 1 ACPI AML tables successfully acquired and loaded
ACPI: Interpreter enabled
ACPI: (supports S0 S5)
ACPI: Using IOSAPIC for interrupt routing
ACPI: Enabled 11 GPEs in block 00 to 3F
ACPI: PCI Root Bridge [PCI0] (domain 0000 [bus 00-7f])
acpi PNP0A08:00: _OSC: OS supports [ExtendedConfig Segments MSI]
acpi PNP0A08:00: PCIe port services disabled; not requesting _OSC control
kernel BUG at lib/ioremap.c:72!
swapper/0[1]: bugcheck! 0 [1]
Modules linked in:

CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.18.0-rc3-bisect-00137-g0bbf47e #15
Hardware name: Supermicro I8QBH/I8QBH, BIOS I8QBH 15.006.004RAS 2010/05/10
psr : 00001010084a6010 ifs : 800000000000050d ip  : [<a000000100e6d830>]    Not tainted (4.18.0-rc3-bisect-00137-g0bbf47e)
ip is at ioremap_pte_range+0x190/0x1a0
unat: 0000000000000000 pfs : 000000000000050d rsc : 0000000000000003
rnat: fffffffffffc3358 bsps: 0000000000000000 pr  : 0000000000014745
ldrs: 0000000000000000 ccv : 00000000017c00be fpsr: 0009804c8a70433f
csd : 0930ffff00063000 ssd : 0930ffff00063000
b0  : a000000100e6d830 b6  : a000000100e91fa0 b7  : a000000100e91fa0
f6  : 1003e00000000000000a0 f7  : 1003e0000000000000000
f8  : 1003e0000000000000001 f9  : 1003efffffffffffffffc
f10 : 1001b80140227f7febfde f11 : 1003e20c49ba5e353f7cf
r1  : a000000101b3b7e0 r2  : a0000001018ca770 r3  : a00000010193c5d8
r8  : 000000000000001f r9  : 0000000000004000 r10 : fffffffffffc0408
r11 : 000000000000047e r12 : e000000301bdfca0 r13 : e000000301bd0000
r14 : a0000001018ca778 r15 : a0000001018ca778 r16 : 0000000000000000
r17 : 00000010084a2010 r18 : e000000301bdfc60 r19 : 0000000000000000
r20 : 000000000000047c r21 : 0000000000000000 r22 : 00000000000000ea
r23 : 000000000000017c r24 : 000000000000017c r25 : a0000001011d87b8
r26 : a000000100e91fa0 r27 : ffffffffffffffff r28 : a000000100e91fa0
r29 : a0000001011d87b8 r30 : a000000100e91fa0 r31 : a00000010198a300

Call Trace:
 [<a0000001000155e0>] show_stack+0x80/0xa0
                                spà00000301bdf880 bspà00000301bd17b8
Disabling lock debugging due to kernel taint
Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b

---[ end Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b

Here's the surrounding code to the "BUG at lib/ioremap.c"

 61 static int ioremap_pte_range(pmd_t *pmd, unsigned long addr,
 62                 unsigned long end, phys_addr_t phys_addr, pgprot_t prot)
 63 {
 64         pte_t *pte;
 65         u64 pfn;
 66
 67         pfn = phys_addr >> PAGE_SHIFT;
 68         pte = pte_alloc_kernel(pmd, addr);
 69         if (!pte)
 70                 return -ENOMEM;
 71         do {
 72                 BUG_ON(!pte_none(*pte));
 73                 set_pte_at(&init_mm, addr, pte, pfn_pte(pfn, prot));
 74                 pfn++;
 75         } while (pte++, addr += PAGE_SIZE, addr != end);
 76         return 0;
 77 }