From: laurentiu.tudor at nxp.com <laurentiu.tudor@nxp.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v5 3/8] misc: fsl_portals: setup QMAN_BAR{E} also on ARM platforms
Date: Fri, 27 Jul 2018 12:57:37 +0300 [thread overview]
Message-ID: <20180727095742.17831-4-laurentiu.tudor@nxp.com> (raw)
In-Reply-To: <20180727095742.17831-1-laurentiu.tudor@nxp.com>
From: Laurentiu Tudor <laurentiu.tudor@nxp.com>
QMAN_BAR{E} register setup was disabled on ARM platforms, however the
register does need to be set. Enable the code also on ARMs and fix the
CONFIG_SYS_QMAN_MEM_PHYS define to the correct value so that the newly
enabled code works.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
---
arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h | 3 +--
drivers/misc/fsl_portals.c | 2 --
2 files changed, 1 insertion(+), 4 deletions(-)
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
index 644a16dd30..d22ec70aa5 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
@@ -57,8 +57,7 @@
#define CONFIG_SYS_BMAN_SWP_ISDR_REG 0x3E80
#define CONFIG_SYS_QMAN_NUM_PORTALS 10
#define CONFIG_SYS_QMAN_MEM_BASE 0x500000000
-#define CONFIG_SYS_QMAN_MEM_PHYS (0xf00000000ull + \
- CONFIG_SYS_QMAN_MEM_BASE)
+#define CONFIG_SYS_QMAN_MEM_PHYS CONFIG_SYS_QMAN_MEM_BASE
#define CONFIG_SYS_QMAN_MEM_SIZE 0x08000000
#define CONFIG_SYS_QMAN_SP_CENA_SIZE 0x10000
#define CONFIG_SYS_QMAN_SP_CINH_SIZE 0x10000
diff --git a/drivers/misc/fsl_portals.c b/drivers/misc/fsl_portals.c
index 7c22b8d209..22faf16751 100644
--- a/drivers/misc/fsl_portals.c
+++ b/drivers/misc/fsl_portals.c
@@ -24,7 +24,6 @@ void setup_qbman_portals(void)
CONFIG_SYS_BMAN_SWP_ISDR_REG;
void __iomem *qpaddr = (void *)CONFIG_SYS_QMAN_CINH_BASE +
CONFIG_SYS_QMAN_SWP_ISDR_REG;
-#ifdef CONFIG_PPC
struct ccsr_qman *qman = (void *)CONFIG_SYS_FSL_QMAN_ADDR;
/* Set the Qman initiator BAR to match the LAW (for DQRR stashing) */
@@ -32,7 +31,6 @@ void setup_qbman_portals(void)
out_be32(&qman->qcsp_bare, (u32)(CONFIG_SYS_QMAN_MEM_PHYS >> 32));
#endif
out_be32(&qman->qcsp_bar, (u32)CONFIG_SYS_QMAN_MEM_PHYS);
-#endif
#ifdef CONFIG_FSL_CORENET
int i;
--
2.17.1
next prev parent reply other threads:[~2018-07-27 9:57 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-07-27 9:57 [U-Boot] [PATCH v5 0/8] NXP LS1046A SMMU enabling patches laurentiu.tudor at nxp.com
2018-07-27 9:57 ` [U-Boot] [PATCH v5 1/8] armv8: fsl-layerscape: add missing register blocks base address defines laurentiu.tudor at nxp.com
2018-07-27 9:57 ` [U-Boot] [PATCH v5 2/8] armv8: ls1046a: advertise QMan v3 in configuration laurentiu.tudor at nxp.com
2018-07-27 9:57 ` laurentiu.tudor at nxp.com [this message]
2018-07-27 9:57 ` [U-Boot] [PATCH v5 4/8] armv8: fsl-layerscape: add missing debug stream ID laurentiu.tudor at nxp.com
2018-07-27 9:57 ` [U-Boot] [PATCH v5 5/8] armv8: ls1046a: initial icid setup support laurentiu.tudor at nxp.com
2018-07-27 9:57 ` [U-Boot] [PATCH v5 6/8] armv8: ls1046a: add icid setup for qman portals laurentiu.tudor at nxp.com
2018-07-27 9:57 ` [U-Boot] [PATCH v5 7/8] armv8: ls1046a: setup fman ports ICIDs and device tree laurentiu.tudor at nxp.com
2018-07-27 9:57 ` [U-Boot] [PATCH v5 8/8] armv8: ls1046a: setup SEC ICIDs and fix up " laurentiu.tudor at nxp.com
2018-07-27 11:18 ` Bharat Bhushan
2018-07-27 14:00 ` Horia Geanta
2018-07-30 13:58 ` Laurentiu Tudor
2018-07-30 14:33 ` Horia Geanta
2018-07-31 4:56 ` Bharat Bhushan
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