From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: "Kumar, Mahesh" <mahesh1.kumar@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 3/5] drm/i915: Implement 16GB dimm wa for latency level-0
Date: Fri, 27 Jul 2018 22:48:56 -0700 [thread overview]
Message-ID: <20180728054855.GF14046@intel.com> (raw)
In-Reply-To: <2f281507-b2ed-452a-5a70-2c584d01f00e@intel.com>
On Fri, Jul 27, 2018 at 11:40:14AM +0530, Kumar, Mahesh wrote:
> Hi Matt,
>
>
> On 7/27/2018 9:21 AM, Matt Turner wrote:
> > On Thu, Jul 26, 2018 at 7:14 AM, Mahesh Kumar <mahesh1.kumar@intel.com> wrote:
> > > Bspec: 4381
> > Do we know that these numbers are stable?
> yes these numbers are fixed in Bspec
> > I don't know if this form is common in the kernel, but in Mesa we
> > specify the name of the page which should always allow readers to find
> > it.
> This is common practice in kernel to give Bspec Number reference instead of
> name of the page.
Well, I believe Matt has a good point here.
It is stable for now and for a while, but we had seen changes
on the web interface in use. Also this number doesn't help devs who
don't use the web interface.
> -Mahesh
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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next prev parent reply other threads:[~2018-07-28 5:49 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-07-26 14:14 [PATCH 0/5] Decode memdev info and bandwidth and implemnt latency WA Mahesh Kumar
2018-07-26 14:14 ` [PATCH 1/5] drm/i915/bxt: Decode memory bandwidth and parameters Mahesh Kumar
2018-08-16 22:29 ` Rodrigo Vivi
2018-08-17 17:43 ` Rodrigo Vivi
2018-08-21 9:53 ` Kumar, Mahesh
2018-08-21 15:12 ` Rodrigo Vivi
2018-07-26 14:14 ` [PATCH 2/5] drm/i915/skl+: " Mahesh Kumar
2018-08-16 22:35 ` Rodrigo Vivi
2018-08-21 10:21 ` Kumar, Mahesh
2018-07-26 14:14 ` [PATCH 3/5] drm/i915: Implement 16GB dimm wa for latency level-0 Mahesh Kumar
2018-07-27 3:51 ` Matt Turner
2018-07-27 6:10 ` Kumar, Mahesh
2018-07-28 5:48 ` Rodrigo Vivi [this message]
2018-07-31 14:18 ` Kumar, Mahesh
2018-08-17 17:57 ` Rodrigo Vivi
2018-07-26 14:14 ` [PATCH 4/5] drm/i915/kbl+: Enable IPC only for symmetric memory configurations Mahesh Kumar
2018-08-17 18:20 ` Rodrigo Vivi
2018-08-21 14:57 ` Kumar, Mahesh
2018-08-21 16:00 ` Kumar, Mahesh
2018-08-21 18:56 ` Rodrigo Vivi
2018-08-22 13:02 ` Kumar, Mahesh
2018-08-22 15:39 ` Rodrigo Vivi
2018-07-26 14:14 ` [PATCH 5/5] drm/i915/skl+: don't trust IPC value set by BIOS Mahesh Kumar
2018-07-26 14:29 ` ✗ Fi.CI.SPARSE: warning for Decode memdev info and bandwidth and implemnt latency WA (rev2) Patchwork
2018-07-26 14:48 ` ✓ Fi.CI.BAT: success " Patchwork
2018-07-26 16:09 ` ✓ Fi.CI.IGT: " Patchwork
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