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From: marek.behun@nic.cz (Marek Behún)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v1 1/7] From: Ken Ma <make@marvell.com>
Date: Wed,  8 Aug 2018 17:27:00 +0200	[thread overview]
Message-ID: <20180808152706.21727-2-marek.behun@nic.cz> (raw)
In-Reply-To: <20180808152706.21727-1-marek.behun@nic.cz>

pinctrl: armada-37xx: Correct mpp definitions

This patch corrects below mpp definitions:
 - The sdio_sb group is composed of 6 pins and not 5;
 - The rgmii group contains pins mpp2[17:6] and not mpp2[19:6];
 - Pin of group "pmic0" is mpp1[6] but not mpp1[16];
 - Pin of group "pmic1" is mpp1[7] but not mpp1[17];
 - A new group "smi" is added in A0 with 2 pins - mpp2[19:18], its
   bitmask is bit4;
 - Group "pcie1" has 3 pins in A0 - mpp2[5:3], its bit mask is
   bit5 | bit9 | bit10 but not bit4;
 - Group "ptp" has 3 pins in A0 as Z1, but its bitmask is changed to
   bit11 | bit12 | bit13.

Signed-off-by: Marek Behun <marek.behun@nic.cz>

diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
index 53cf800688e9..95abadee8542 100644
--- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
+++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
@@ -157,8 +157,8 @@ static struct armada_37xx_pin_group armada_37xx_nb_groups[] = {
 	PIN_GRP_GPIO("pwm1", 12, 1, BIT(4), "pwm"),
 	PIN_GRP_GPIO("pwm2", 13, 1, BIT(5), "pwm"),
 	PIN_GRP_GPIO("pwm3", 14, 1, BIT(6), "pwm"),
-	PIN_GRP_GPIO("pmic1", 17, 1, BIT(7), "pmic"),
-	PIN_GRP_GPIO("pmic0", 16, 1, BIT(8), "pmic"),
+	PIN_GRP_GPIO("pmic1", 7, 1, BIT(7), "pmic"),
+	PIN_GRP_GPIO("pmic0", 6, 1, BIT(8), "pmic"),
 	PIN_GRP_GPIO("i2c2", 2, 2, BIT(9), "i2c"),
 	PIN_GRP_GPIO("i2c1", 0, 2, BIT(10), "i2c"),
 	PIN_GRP_GPIO("spi_cs1", 17, 1, BIT(12), "spi"),
@@ -182,8 +182,9 @@ static struct armada_37xx_pin_group armada_37xx_sb_groups[] = {
 	PIN_GRP_GPIO("usb2_drvvbus1", 1, 1, BIT(1), "drvbus"),
 	PIN_GRP_GPIO("sdio_sb", 24, 6, BIT(2), "sdio"),
 	PIN_GRP_GPIO("rgmii", 6, 12, BIT(3), "mii"),
-	PIN_GRP_GPIO("pcie1", 3, 2, BIT(4), "pcie"),
-	PIN_GRP_GPIO("ptp", 20, 3, BIT(5), "ptp"),
+	PIN_GRP_GPIO("smi", 18, 2, BIT(4), "smi"),
+	PIN_GRP_GPIO("pcie1", 3, 3, BIT(5) | BIT(9) | BIT(10), "pcie"),
+	PIN_GRP_GPIO("ptp", 20, 3, BIT(11) | BIT(12) | BIT(13), "ptp"),
 	PIN_GRP("ptp_clk", 21, 1, BIT(6), "ptp", "mii"),
 	PIN_GRP("ptp_trig", 22, 1, BIT(7), "ptp", "mii"),
 	PIN_GRP_GPIO_3("mii_col", 23, 1, BIT(8) | BIT(14), 0, BIT(8), BIT(14),
-- 
2.16.4

  reply	other threads:[~2018-08-08 15:27 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-08-08 15:26 [PATCH v1 0/7] Add support for the Turris Mox router Marek Behún
2018-08-08 15:27 ` Marek Behún [this message]
2018-08-08 16:49   ` [PATCH v1 1/7] From: Ken Ma <make@marvell.com> Andrew Lunn
2018-08-08 15:27 ` [PATCH v1 2/7] drivers: mfd: Add support for Moxtet bus Marek Behún
2018-08-08 15:32   ` Marek Behún
2018-08-08 15:27 ` [PATCH v1 3/7] drivers: gpio: Add support for Turris Mox SFP GPIOs Marek Behún
2018-08-08 16:55   ` Andrew Lunn
2018-08-08 20:40     ` Marek Behun
2018-08-08 15:27 ` [PATCH v1 4/7] watchdog: Add support for Armada 37xx CPU watchdog Marek Behún
2018-08-08 15:27 ` [PATCH v1 5/7] arm64: dts: marvell: armada-37xx: add nodes to support watchdog Marek Behún
2018-08-08 15:27 ` [PATCH v1 6/7] net: mvneta: Don't use GRO on Armada 3720 Marek Behún
2018-08-08 15:27   ` Marek Behún
2018-08-08 16:58   ` Andrew Lunn
2018-08-08 16:58     ` Andrew Lunn
2018-08-08 17:57     ` Dave Taht
2018-08-08 17:57       ` Dave Taht
2018-08-09  4:40   ` Jisheng Zhang
2018-08-09  4:40     ` Jisheng Zhang
2018-08-09 11:27     ` Jisheng Zhang
2018-08-09 11:27       ` Jisheng Zhang
2018-08-09 12:08       ` Jisheng Zhang
2018-08-09 12:08         ` Jisheng Zhang
2018-08-21 10:07         ` Marek Behún
2018-08-21 10:07           ` Marek Behún
2018-08-08 15:27 ` [PATCH v1 7/7] ARM64: dts: marvell: Add DTS files for Turris Mox Marek Behún

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