On Wed, Aug 01, 2018 at 07:32:03PM +0300, Aapo Vienamo wrote: > Implement polling with 10 ms timeout for automatic pad drive strength > calibration. > > Signed-off-by: Aapo Vienamo > --- > drivers/mmc/host/sdhci-tegra.c | 21 ++++++++++++++++----- > 1 file changed, 16 insertions(+), 5 deletions(-) > > diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c > index 7d98455..c8ff267 100644 > --- a/drivers/mmc/host/sdhci-tegra.c > +++ b/drivers/mmc/host/sdhci-tegra.c > @@ -16,6 +16,7 @@ > #include > #include > #include > +#include > #include > #include > #include > @@ -50,6 +51,9 @@ > #define SDHCI_AUTO_CAL_START BIT(31) > #define SDHCI_AUTO_CAL_ENABLE BIT(29) > > +#define SDHCI_TEGRA_AUTO_CAL_STATUS 0x1ec > +#define SDHCI_TEGRA_AUTO_CAL_ACTIVE BIT(31) > + > #define NVQUIRK_FORCE_SDHCI_SPEC_200 BIT(0) > #define NVQUIRK_ENABLE_BLOCK_GAP_DET BIT(1) > #define NVQUIRK_ENABLE_SDHCI_SPEC_300 BIT(2) > @@ -228,13 +232,20 @@ static void tegra_sdhci_reset(struct sdhci_host *host, u8 mask) > > static void tegra_sdhci_pad_autocalib(struct sdhci_host *host) > { > - u32 val; > + u32 reg; > + int ret; > + > + reg = sdhci_readl(host, SDHCI_TEGRA_AUTO_CAL_CONFIG); > + reg |= SDHCI_AUTO_CAL_ENABLE | SDHCI_AUTO_CAL_START; > + sdhci_writel(host, reg, SDHCI_TEGRA_AUTO_CAL_CONFIG); > I know this is preexisting, but I want to make sure we cover this so we don't run into this down the road: do these bits automatically clear on calibration completion? Can we run these multiple times and get everything properly calibrated? Thierry > - mdelay(1); > + /* 10 ms timeout */ > + ret = readl_poll_timeout(host->ioaddr + SDHCI_TEGRA_AUTO_CAL_STATUS, > + reg, !(reg & SDHCI_TEGRA_AUTO_CAL_ACTIVE), > + 1, 10000); > > - val = sdhci_readl(host, SDHCI_TEGRA_AUTO_CAL_CONFIG); > - val |= SDHCI_AUTO_CAL_ENABLE | SDHCI_AUTO_CAL_START; > - sdhci_writel(host,val, SDHCI_TEGRA_AUTO_CAL_CONFIG); > + if (ret) > + dev_err(mmc_dev(host->mmc), "Pad autocal timed out\n"); > } > > static void tegra_sdhci_set_clock(struct sdhci_host *host, unsigned int clock) > -- > 2.7.4 >