From mboxrd@z Thu Jan 1 00:00:00 1970 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 Subject: [v10,3/4] dmaengine: fsl-edma: fix macros From: Angelo Dureghello Message-Id: <20180819172716.32304-3-angelo@sysam.it> Date: Sun, 19 Aug 2018 19:27:15 +0200 To: vinod.koul@linaro.org Cc: dmaengine@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-m68k@vger.kernel.org, stefan@agner.ch, krzk@kernel.org, Angelo Dureghello List-ID: VGhpcyBwYXRjaCBmaXhlcyBtYWNyb3MgdG8gdXNlIEJJVCgpIGFuZCBHRU5NQVNLKCksIHJlbW92 aW5nCmFsc28gc29tZSB1bm5lZWRlZC4KClNpZ25lZC1vZmYtYnk6IEFuZ2VsbyBEdXJlZ2hlbGxv IDxhbmdlbG9Ac3lzYW0uaXQ+ClRlc3RlZC1ieTogS3J6eXN6dG9mIEtvemxvd3NraSA8a3J6a0Br ZXJuZWwub3JnPgotLS0KQ2hhbmdlcyBmb3Igdjk6Ci0gdGhpcyBwYXRjaCAoMy80KSBoYXMganVz dCBiZWVuIGFkZGVkLgoKQ2hhbmdlcyBmb3IgdjEwOgotIG5vbmUKLS0tCiBkcml2ZXJzL2RtYS9m c2wtZWRtYS1jb21tb24uaCB8IDUwICsrKysrKysrKysrKysrKy0tLS0tLS0tLS0tLS0tLS0tLS0t CiAxIGZpbGUgY2hhbmdlZCwgMjIgaW5zZXJ0aW9ucygrKSwgMjggZGVsZXRpb25zKC0pCgpkaWZm IC0tZ2l0IGEvZHJpdmVycy9kbWEvZnNsLWVkbWEtY29tbW9uLmggYi9kcml2ZXJzL2RtYS9mc2wt ZWRtYS1jb21tb24uaAppbmRleCBiMmVlODllYTg5NWEuLmE2ZjViOTllZTk1ZiAxMDA2NDQKLS0t IGEvZHJpdmVycy9kbWEvZnNsLWVkbWEtY29tbW9uLmgKKysrIGIvZHJpdmVycy9kbWEvZnNsLWVk bWEtY29tbW9uLmgKQEAgLTE4LDM0ICsxOCwyOCBAQAogI2RlZmluZSBFRE1BX0NSX0VDWAkJQklU KDE2KQogI2RlZmluZSBFRE1BX0NSX0NYCQlCSVQoMTcpCiAKLSNkZWZpbmUgRURNQV9TRUVJX1NF RUkoeCkJKCh4KSAmIDB4MUYpCi0jZGVmaW5lIEVETUFfQ0VFSV9DRUVJKHgpCSgoeCkgJiAweDFG KQotI2RlZmluZSBFRE1BX0NJTlRfQ0lOVCh4KQkoKHgpICYgMHgxRikKLSNkZWZpbmUgRURNQV9D RVJSX0NFUlIoeCkJKCh4KSAmIDB4MUYpCi0KLSNkZWZpbmUgRURNQV9UQ0RfQVRUUl9EU0laRSh4 KQkJKCgoeCkgJiAweDAwMDcpKQotI2RlZmluZSBFRE1BX1RDRF9BVFRSX0RNT0QoeCkJCSgoKHgp ICYgMHgwMDFGKSA8PCAzKQotI2RlZmluZSBFRE1BX1RDRF9BVFRSX1NTSVpFKHgpCQkoKCh4KSAm IDB4MDAwNykgPDwgOCkKLSNkZWZpbmUgRURNQV9UQ0RfQVRUUl9TTU9EKHgpCQkoKCh4KSAmIDB4 MDAxRikgPDwgMTEpCi0jZGVmaW5lIEVETUFfVENEX0FUVFJfU1NJWkVfOEJJVAkoMHgwMDAwKQot I2RlZmluZSBFRE1BX1RDRF9BVFRSX1NTSVpFXzE2QklUCSgweDAxMDApCi0jZGVmaW5lIEVETUFf VENEX0FUVFJfU1NJWkVfMzJCSVQJKDB4MDIwMCkKLSNkZWZpbmUgRURNQV9UQ0RfQVRUUl9TU0la RV82NEJJVAkoMHgwMzAwKQotI2RlZmluZSBFRE1BX1RDRF9BVFRSX1NTSVpFXzMyQllURQkoMHgw NTAwKQotI2RlZmluZSBFRE1BX1RDRF9BVFRSX0RTSVpFXzhCSVQJKDB4MDAwMCkKLSNkZWZpbmUg RURNQV9UQ0RfQVRUUl9EU0laRV8xNkJJVAkoMHgwMDAxKQotI2RlZmluZSBFRE1BX1RDRF9BVFRS X0RTSVpFXzMyQklUCSgweDAwMDIpCi0jZGVmaW5lIEVETUFfVENEX0FUVFJfRFNJWkVfNjRCSVQJ KDB4MDAwMykKLSNkZWZpbmUgRURNQV9UQ0RfQVRUUl9EU0laRV8zMkJZVEUJKDB4MDAwNSkKLQot I2RlZmluZSBFRE1BX1RDRF9TT0ZGX1NPRkYoeCkJCSh4KQotI2RlZmluZSBFRE1BX1RDRF9OQllU RVNfTkJZVEVTKHgpCSh4KQotI2RlZmluZSBFRE1BX1RDRF9TTEFTVF9TTEFTVCh4KQkJKHgpCi0j ZGVmaW5lIEVETUFfVENEX0RBRERSX0RBRERSKHgpCQkoeCkKLSNkZWZpbmUgRURNQV9UQ0RfQ0lU RVJfQ0lURVIoeCkJCSgoeCkgJiAweDdGRkYpCi0jZGVmaW5lIEVETUFfVENEX0RPRkZfRE9GRih4 KQkJKHgpCi0jZGVmaW5lIEVETUFfVENEX0RMQVNUX1NHQV9ETEFTVF9TR0EoeCkJKHgpCi0jZGVm aW5lIEVETUFfVENEX0JJVEVSX0JJVEVSKHgpCQkoKHgpICYgMHg3RkZGKQorI2RlZmluZSBFRE1B X1NFRUlfU0VFSSh4KQkoKHgpICYgR0VOTUFTSyg0LCAwKSkKKyNkZWZpbmUgRURNQV9DRUVJX0NF RUkoeCkJKCh4KSAmIEdFTk1BU0soNCwgMCkpCisjZGVmaW5lIEVETUFfQ0lOVF9DSU5UKHgpCSgo eCkgJiBHRU5NQVNLKDQsIDApKQorI2RlZmluZSBFRE1BX0NFUlJfQ0VSUih4KQkoKHgpICYgR0VO TUFTSyg0LCAwKSkKKworI2RlZmluZSBFRE1BX1RDRF9BVFRSX0RTSVpFKHgpCQkoKCh4KSAmIEdF Tk1BU0soMiwgMCkpKQorI2RlZmluZSBFRE1BX1RDRF9BVFRSX0RNT0QoeCkJCSgoKHgpICYgR0VO TUFTSyg0LCAwKSkgPDwgMykKKyNkZWZpbmUgRURNQV9UQ0RfQVRUUl9TU0laRSh4KQkJKCgoeCkg JiBHRU5NQVNLKDIsIDApKSA8PCA4KQorI2RlZmluZSBFRE1BX1RDRF9BVFRSX1NNT0QoeCkJCSgo KHgpICYgR0VOTUFTSyg0LCAwKSkgPDwgMTEpCisjZGVmaW5lIEVETUFfVENEX0FUVFJfRFNJWkVf OEJJVAkwCisjZGVmaW5lIEVETUFfVENEX0FUVFJfRFNJWkVfMTZCSVQJQklUKDApCisjZGVmaW5l IEVETUFfVENEX0FUVFJfRFNJWkVfMzJCSVQJQklUKDEpCisjZGVmaW5lIEVETUFfVENEX0FUVFJf RFNJWkVfNjRCSVQJKEJJVCgwKSB8IEJJVCgxKSkKKyNkZWZpbmUgRURNQV9UQ0RfQVRUUl9EU0la RV8zMkJZVEUJKEJJVCgzKSB8IEJJVCgwKSkKKyNkZWZpbmUgRURNQV9UQ0RfQVRUUl9TU0laRV84 QklUCTAKKyNkZWZpbmUgRURNQV9UQ0RfQVRUUl9TU0laRV8xNkJJVAkoRURNQV9UQ0RfQVRUUl9E U0laRV8xNkJJVCA8PCA4KQorI2RlZmluZSBFRE1BX1RDRF9BVFRSX1NTSVpFXzMyQklUCShFRE1B X1RDRF9BVFRSX0RTSVpFXzMyQklUIDw8IDgpCisjZGVmaW5lIEVETUFfVENEX0FUVFJfU1NJWkVf NjRCSVQJKEVETUFfVENEX0FUVFJfRFNJWkVfNjRCSVQgPDwgOCkKKyNkZWZpbmUgRURNQV9UQ0Rf QVRUUl9TU0laRV8zMkJZVEUJKEVETUFfVENEX0FUVFJfRFNJWkVfMzJCWVRFIDw8IDgpCisKKyNk ZWZpbmUgRURNQV9UQ0RfQ0lURVJfQ0lURVIoeCkJCSgoeCkgJiBHRU5NQVNLKDE0LCAwKSkKKyNk ZWZpbmUgRURNQV9UQ0RfQklURVJfQklURVIoeCkJCSgoeCkgJiBHRU5NQVNLKDE0LCAwKSkKIAog I2RlZmluZSBFRE1BX1RDRF9DU1JfU1RBUlQJCUJJVCgwKQogI2RlZmluZSBFRE1BX1RDRF9DU1Jf SU5UX01BSk9SCQlCSVQoMSkK From mboxrd@z Thu Jan 1 00:00:00 1970 From: Angelo Dureghello Subject: [PATCH v10 3/4] dmaengine: fsl-edma: fix macros Date: Sun, 19 Aug 2018 19:27:15 +0200 Message-ID: <20180819172716.32304-3-angelo@sysam.it> References: <20180819172716.32304-1-angelo@sysam.it> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <20180819172716.32304-1-angelo@sysam.it> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: vinod.koul@linaro.org Cc: linux-m68k@vger.kernel.org, Angelo Dureghello , krzk@kernel.org, stefan@agner.ch, dmaengine@vger.kernel.org, linux-arm-kernel@lists.infradead.org List-Id: linux-m68k@vger.kernel.org This patch fixes macros to use BIT() and GENMASK(), removing also some unneeded. Signed-off-by: Angelo Dureghello Tested-by: Krzysztof Kozlowski --- Changes for v9: - this patch (3/4) has just been added. Changes for v10: - none --- drivers/dma/fsl-edma-common.h | 50 +++++++++++++++-------------------- 1 file changed, 22 insertions(+), 28 deletions(-) diff --git a/drivers/dma/fsl-edma-common.h b/drivers/dma/fsl-edma-common.h index b2ee89ea895a..a6f5b99ee95f 100644 --- a/drivers/dma/fsl-edma-common.h +++ b/drivers/dma/fsl-edma-common.h @@ -18,34 +18,28 @@ #define EDMA_CR_ECX BIT(16) #define EDMA_CR_CX BIT(17) -#define EDMA_SEEI_SEEI(x) ((x) & 0x1F) -#define EDMA_CEEI_CEEI(x) ((x) & 0x1F) -#define EDMA_CINT_CINT(x) ((x) & 0x1F) -#define EDMA_CERR_CERR(x) ((x) & 0x1F) - -#define EDMA_TCD_ATTR_DSIZE(x) (((x) & 0x0007)) -#define EDMA_TCD_ATTR_DMOD(x) (((x) & 0x001F) << 3) -#define EDMA_TCD_ATTR_SSIZE(x) (((x) & 0x0007) << 8) -#define EDMA_TCD_ATTR_SMOD(x) (((x) & 0x001F) << 11) -#define EDMA_TCD_ATTR_SSIZE_8BIT (0x0000) -#define EDMA_TCD_ATTR_SSIZE_16BIT (0x0100) -#define EDMA_TCD_ATTR_SSIZE_32BIT (0x0200) -#define EDMA_TCD_ATTR_SSIZE_64BIT (0x0300) -#define EDMA_TCD_ATTR_SSIZE_32BYTE (0x0500) -#define EDMA_TCD_ATTR_DSIZE_8BIT (0x0000) -#define EDMA_TCD_ATTR_DSIZE_16BIT (0x0001) -#define EDMA_TCD_ATTR_DSIZE_32BIT (0x0002) -#define EDMA_TCD_ATTR_DSIZE_64BIT (0x0003) -#define EDMA_TCD_ATTR_DSIZE_32BYTE (0x0005) - -#define EDMA_TCD_SOFF_SOFF(x) (x) -#define EDMA_TCD_NBYTES_NBYTES(x) (x) -#define EDMA_TCD_SLAST_SLAST(x) (x) -#define EDMA_TCD_DADDR_DADDR(x) (x) -#define EDMA_TCD_CITER_CITER(x) ((x) & 0x7FFF) -#define EDMA_TCD_DOFF_DOFF(x) (x) -#define EDMA_TCD_DLAST_SGA_DLAST_SGA(x) (x) -#define EDMA_TCD_BITER_BITER(x) ((x) & 0x7FFF) +#define EDMA_SEEI_SEEI(x) ((x) & GENMASK(4, 0)) +#define EDMA_CEEI_CEEI(x) ((x) & GENMASK(4, 0)) +#define EDMA_CINT_CINT(x) ((x) & GENMASK(4, 0)) +#define EDMA_CERR_CERR(x) ((x) & GENMASK(4, 0)) + +#define EDMA_TCD_ATTR_DSIZE(x) (((x) & GENMASK(2, 0))) +#define EDMA_TCD_ATTR_DMOD(x) (((x) & GENMASK(4, 0)) << 3) +#define EDMA_TCD_ATTR_SSIZE(x) (((x) & GENMASK(2, 0)) << 8) +#define EDMA_TCD_ATTR_SMOD(x) (((x) & GENMASK(4, 0)) << 11) +#define EDMA_TCD_ATTR_DSIZE_8BIT 0 +#define EDMA_TCD_ATTR_DSIZE_16BIT BIT(0) +#define EDMA_TCD_ATTR_DSIZE_32BIT BIT(1) +#define EDMA_TCD_ATTR_DSIZE_64BIT (BIT(0) | BIT(1)) +#define EDMA_TCD_ATTR_DSIZE_32BYTE (BIT(3) | BIT(0)) +#define EDMA_TCD_ATTR_SSIZE_8BIT 0 +#define EDMA_TCD_ATTR_SSIZE_16BIT (EDMA_TCD_ATTR_DSIZE_16BIT << 8) +#define EDMA_TCD_ATTR_SSIZE_32BIT (EDMA_TCD_ATTR_DSIZE_32BIT << 8) +#define EDMA_TCD_ATTR_SSIZE_64BIT (EDMA_TCD_ATTR_DSIZE_64BIT << 8) +#define EDMA_TCD_ATTR_SSIZE_32BYTE (EDMA_TCD_ATTR_DSIZE_32BYTE << 8) + +#define EDMA_TCD_CITER_CITER(x) ((x) & GENMASK(14, 0)) +#define EDMA_TCD_BITER_BITER(x) ((x) & GENMASK(14, 0)) #define EDMA_TCD_CSR_START BIT(0) #define EDMA_TCD_CSR_INT_MAJOR BIT(1) -- 2.18.0 From mboxrd@z Thu Jan 1 00:00:00 1970 From: angelo@sysam.it (Angelo Dureghello) Date: Sun, 19 Aug 2018 19:27:15 +0200 Subject: [PATCH v10 3/4] dmaengine: fsl-edma: fix macros In-Reply-To: <20180819172716.32304-1-angelo@sysam.it> References: <20180819172716.32304-1-angelo@sysam.it> Message-ID: <20180819172716.32304-3-angelo@sysam.it> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org This patch fixes macros to use BIT() and GENMASK(), removing also some unneeded. Signed-off-by: Angelo Dureghello Tested-by: Krzysztof Kozlowski --- Changes for v9: - this patch (3/4) has just been added. Changes for v10: - none --- drivers/dma/fsl-edma-common.h | 50 +++++++++++++++-------------------- 1 file changed, 22 insertions(+), 28 deletions(-) diff --git a/drivers/dma/fsl-edma-common.h b/drivers/dma/fsl-edma-common.h index b2ee89ea895a..a6f5b99ee95f 100644 --- a/drivers/dma/fsl-edma-common.h +++ b/drivers/dma/fsl-edma-common.h @@ -18,34 +18,28 @@ #define EDMA_CR_ECX BIT(16) #define EDMA_CR_CX BIT(17) -#define EDMA_SEEI_SEEI(x) ((x) & 0x1F) -#define EDMA_CEEI_CEEI(x) ((x) & 0x1F) -#define EDMA_CINT_CINT(x) ((x) & 0x1F) -#define EDMA_CERR_CERR(x) ((x) & 0x1F) - -#define EDMA_TCD_ATTR_DSIZE(x) (((x) & 0x0007)) -#define EDMA_TCD_ATTR_DMOD(x) (((x) & 0x001F) << 3) -#define EDMA_TCD_ATTR_SSIZE(x) (((x) & 0x0007) << 8) -#define EDMA_TCD_ATTR_SMOD(x) (((x) & 0x001F) << 11) -#define EDMA_TCD_ATTR_SSIZE_8BIT (0x0000) -#define EDMA_TCD_ATTR_SSIZE_16BIT (0x0100) -#define EDMA_TCD_ATTR_SSIZE_32BIT (0x0200) -#define EDMA_TCD_ATTR_SSIZE_64BIT (0x0300) -#define EDMA_TCD_ATTR_SSIZE_32BYTE (0x0500) -#define EDMA_TCD_ATTR_DSIZE_8BIT (0x0000) -#define EDMA_TCD_ATTR_DSIZE_16BIT (0x0001) -#define EDMA_TCD_ATTR_DSIZE_32BIT (0x0002) -#define EDMA_TCD_ATTR_DSIZE_64BIT (0x0003) -#define EDMA_TCD_ATTR_DSIZE_32BYTE (0x0005) - -#define EDMA_TCD_SOFF_SOFF(x) (x) -#define EDMA_TCD_NBYTES_NBYTES(x) (x) -#define EDMA_TCD_SLAST_SLAST(x) (x) -#define EDMA_TCD_DADDR_DADDR(x) (x) -#define EDMA_TCD_CITER_CITER(x) ((x) & 0x7FFF) -#define EDMA_TCD_DOFF_DOFF(x) (x) -#define EDMA_TCD_DLAST_SGA_DLAST_SGA(x) (x) -#define EDMA_TCD_BITER_BITER(x) ((x) & 0x7FFF) +#define EDMA_SEEI_SEEI(x) ((x) & GENMASK(4, 0)) +#define EDMA_CEEI_CEEI(x) ((x) & GENMASK(4, 0)) +#define EDMA_CINT_CINT(x) ((x) & GENMASK(4, 0)) +#define EDMA_CERR_CERR(x) ((x) & GENMASK(4, 0)) + +#define EDMA_TCD_ATTR_DSIZE(x) (((x) & GENMASK(2, 0))) +#define EDMA_TCD_ATTR_DMOD(x) (((x) & GENMASK(4, 0)) << 3) +#define EDMA_TCD_ATTR_SSIZE(x) (((x) & GENMASK(2, 0)) << 8) +#define EDMA_TCD_ATTR_SMOD(x) (((x) & GENMASK(4, 0)) << 11) +#define EDMA_TCD_ATTR_DSIZE_8BIT 0 +#define EDMA_TCD_ATTR_DSIZE_16BIT BIT(0) +#define EDMA_TCD_ATTR_DSIZE_32BIT BIT(1) +#define EDMA_TCD_ATTR_DSIZE_64BIT (BIT(0) | BIT(1)) +#define EDMA_TCD_ATTR_DSIZE_32BYTE (BIT(3) | BIT(0)) +#define EDMA_TCD_ATTR_SSIZE_8BIT 0 +#define EDMA_TCD_ATTR_SSIZE_16BIT (EDMA_TCD_ATTR_DSIZE_16BIT << 8) +#define EDMA_TCD_ATTR_SSIZE_32BIT (EDMA_TCD_ATTR_DSIZE_32BIT << 8) +#define EDMA_TCD_ATTR_SSIZE_64BIT (EDMA_TCD_ATTR_DSIZE_64BIT << 8) +#define EDMA_TCD_ATTR_SSIZE_32BYTE (EDMA_TCD_ATTR_DSIZE_32BYTE << 8) + +#define EDMA_TCD_CITER_CITER(x) ((x) & GENMASK(14, 0)) +#define EDMA_TCD_BITER_BITER(x) ((x) & GENMASK(14, 0)) #define EDMA_TCD_CSR_START BIT(0) #define EDMA_TCD_CSR_INT_MAJOR BIT(1) -- 2.18.0