From mboxrd@z Thu Jan  1 00:00:00 1970
From: Eugeniu Rosca <erosca@de.adit-jv.com>
Date: Mon, 20 Aug 2018 15:24:34 +0200
Subject: [U-Boot] [PATCH 3/8] armv8: mmu: Fix "left shift in type int"
 undefined behavior
In-Reply-To: <20180820015142.GG11769@bill-the-cat>
References: <20180820000033.25519-1-erosca@de.adit-jv.com>
 <20180820000033.25519-4-erosca@de.adit-jv.com>
 <20180820015142.GG11769@bill-the-cat>
Message-ID: <20180820132434.GA8095@vmlxhi-102.adit-jv.com>
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To: u-boot@lists.denx.de

Hi Tom,

On Sun, Aug 19, 2018 at 09:51:42PM -0400, Tom Rini wrote:
> On Mon, Aug 20, 2018 at 02:00:27AM +0200, Eugeniu Rosca wrote:
[..]
> > diff --git a/arch/arm/include/asm/armv8/mmu.h b/arch/arm/include/asm/armv8/mmu.h
> > index 62d00d15c26d..b2ce13db0d2b 100644
> > --- a/arch/arm/include/asm/armv8/mmu.h
> > +++ b/arch/arm/include/asm/armv8/mmu.h
> > @@ -94,11 +94,11 @@
> >  #define TCR_TG0_4K		(0 << 14)
> >  #define TCR_TG0_64K		(1 << 14)
> >  #define TCR_TG0_16K		(2 << 14)
> > -#define TCR_EPD1_DISABLE	(1 << 23)
> > +#define TCR_EPD1_DISABLE	BIT(23)
> >  
> > -#define TCR_EL1_RSVD		(1 << 31)
> > -#define TCR_EL2_RSVD		(1 << 31 | 1 << 23)
> > -#define TCR_EL3_RSVD		(1 << 31 | 1 << 23)
> > +#define TCR_EL1_RSVD		BIT(31)
> > +#define TCR_EL2_RSVD		(BIT(31) | BIT(23))
> > +#define TCR_EL3_RSVD		(BIT(31) | BIT(23))
> >  
> >  #ifndef __ASSEMBLY__
> >  static inline void set_ttbr_tcr_mair(int el, u64 table, u64 tcr, u64 attr)
> 
> For consistency within the file, spell it out as 1UL ?  I don't like
> mixing shifts and BITS in a file, and I really don't like being
> inconsistent, so I'd also be OK with BIT() in all of the bits.

I will use (1UL << i) in v2, unless there is some strong preference
to use BIT() macro. In the latter case, a simple definition like
(7 << N) will require conversion to (BIT(N+2) | BIT(N+1) | BIT(N)),
which looks more complicated to me.

> -- 
> Tom

Thanks,
Eugeniu.