From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.2 required=3.0 tests=DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_PASS,T_DKIM_INVALID, URIBL_BLOCKED,USER_AGENT_MUTT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D6980C433F4 for ; Fri, 31 Aug 2018 08:17:42 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 7D1212083C for ; Fri, 31 Aug 2018 08:17:42 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=ffwll.ch header.i=@ffwll.ch header.b="YR/w3Cfo" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 7D1212083C Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=ffwll.ch Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727768AbeHaMX5 (ORCPT ); Fri, 31 Aug 2018 08:23:57 -0400 Received: from mail-ed1-f66.google.com ([209.85.208.66]:45282 "EHLO mail-ed1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727704AbeHaMXw (ORCPT ); Fri, 31 Aug 2018 08:23:52 -0400 Received: by mail-ed1-f66.google.com with SMTP id p52-v6so8411979eda.12 for ; Fri, 31 Aug 2018 01:17:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=sender:date:from:to:cc:subject:message-id:mail-followup-to :references:mime-version:content-disposition:in-reply-to:user-agent; bh=mRtPTQYJgZhS7zaHnrfjv01XM0VrGxtJGydDcnhy69M=; b=YR/w3Cfofs9DVyLyHtGzMs2HSxjICKt0jrKpP1RcQg4Kr+mhnAH3FDJJkhcWNslRQQ ruxaBF5Oj+Ej35S6eMY9aMg2B1UOHzNTChHIn57cq3Hf41n+qEPlFLrqgtIG6detlPRR p5r0ZKMxVRi86bMQKRpubgpvLicwc9Ajc0N4w= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:date:from:to:cc:subject:message-id :mail-followup-to:references:mime-version:content-disposition :in-reply-to:user-agent; bh=mRtPTQYJgZhS7zaHnrfjv01XM0VrGxtJGydDcnhy69M=; b=BEFbpgJU5Bkv5NRjkcYMuRlywUP3FsnhMvwmeke3oulK6VCrNro0ivqA5sg5j6Zzd/ 1bWvH2+ZgY9EfNXpCWSdC6Zh3UkK/rkoj7iraM8zSMaXCkiFu8gVVT11Z+aBOi6thLRy gK41ARWcDR9rqd2Ur/+8rx2UCsXQcKzPuUTLakaKFqC6VMiwKfvXXEczULG+htlAFJH5 TJm6mzlKWvMXjqv3N051L8vVkknUc01ozkT0VSmRCJwQIjBWuuuL9+AR9qo98sI86rnS ZtUAPn6s8b1O2BcYjSpkWtlNTtYo6CaBJY3Qb8Fw7dXJwHy2U6/rJ+3PB1QMASqbKiFG /Q6w== X-Gm-Message-State: APzg51BZaeCN/BTnci5CRoXgqj6k0cdm3w5T5JyIZRq2mQBgt+a0kLqw dDdTqQSwY89B8o3H8SKc8osu1w== X-Google-Smtp-Source: ANB0VdZoeqzzb1UGo9w+fo/EiUEm+oPEs9SA4SzOQk6lGu9AYKDuMfjv33vjZsQ/bqRjKc3fcgPZ8g== X-Received: by 2002:a05:6402:1348:: with SMTP id y8mr16710351edw.222.1535703453418; Fri, 31 Aug 2018 01:17:33 -0700 (PDT) Received: from phenom.ffwll.local (212-51-149-109.fiber7.init7.net. [212.51.149.109]) by smtp.gmail.com with ESMTPSA id f26-v6sm3997296edb.28.2018.08.31.01.17.31 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 31 Aug 2018 01:17:32 -0700 (PDT) Date: Fri, 31 Aug 2018 10:17:30 +0200 From: Daniel Vetter To: Brian Starkey Cc: dri-devel@lists.freedesktop.org, daniel.vetter@ffwll.ch, daniel@fooishbar.org, airlied@linux.ie, gustavo@padovan.org, maarten.lankhorst@linux.intel.com, seanpaul@chromium.org, linux-kernel@vger.kernel.org, alexandru-cosmin.gheorghe@arm.com, liviu.dudau@arm.com, ayan.halder@arm.com, tfiga@chromium.org, hoegsberg@chromium.org Subject: Re: [RFC PATCH v2 1/3] drm/fourcc: Add 'bpp' field for formats with non-integer bytes-per-pixel Message-ID: <20180831081730.GM21634@phenom.ffwll.local> Mail-Followup-To: Brian Starkey , dri-devel@lists.freedesktop.org, daniel@fooishbar.org, airlied@linux.ie, gustavo@padovan.org, maarten.lankhorst@linux.intel.com, seanpaul@chromium.org, linux-kernel@vger.kernel.org, alexandru-cosmin.gheorghe@arm.com, liviu.dudau@arm.com, ayan.halder@arm.com, tfiga@chromium.org, hoegsberg@chromium.org References: <20180823152343.6474-1-brian.starkey@arm.com> <20180823152343.6474-2-brian.starkey@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20180823152343.6474-2-brian.starkey@arm.com> X-Operating-System: Linux phenom 4.14.0-3-amd64 User-Agent: Mutt/1.10.0 (2018-05-17) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Aug 23, 2018 at 04:23:41PM +0100, Brian Starkey wrote: > Some formats have a non-integer number of bytes per pixel, which can't > be handled with the existing 'cpp' field in drm_format_info. To handle > these formats, add a 'bpp' field, which is only used if cpp[0] == 0. > > This updates all the users of format->cpp in the core DRM code, > converting them to use a new function to get the bits-per-pixel for any > format. > > It's assumed that drivers will use the 'bpp' field when they add support > for pixel formats with non-integer bytes-per-pixel. > > Signed-off-by: Brian Starkey I assume you still require that stuff is eventually aligned to bytes? In that case, can we subsume this into the tile work Alex is doing? It's essentially just another special case of having storage-size units measured in bytes which span more than 1x1 pixel. And I kinda don't want a metric pile of special cases here in the format code, because that just means every driver handles a different subset, with different bugs. -Daniel > --- > drivers/gpu/drm/drm_fb_cma_helper.c | 6 +++- > drivers/gpu/drm/drm_fb_helper.c | 8 +++-- > drivers/gpu/drm/drm_fourcc.c | 50 ++++++++++++++++++++++++++++ > drivers/gpu/drm/drm_framebuffer.c | 8 ++--- > drivers/gpu/drm/drm_gem_framebuffer_helper.c | 3 +- > include/drm/drm_fourcc.h | 4 +++ > 6 files changed, 70 insertions(+), 9 deletions(-) > > diff --git a/drivers/gpu/drm/drm_fb_cma_helper.c b/drivers/gpu/drm/drm_fb_cma_helper.c > index 186d00adfb5f..e279d70d3e60 100644 > --- a/drivers/gpu/drm/drm_fb_cma_helper.c > +++ b/drivers/gpu/drm/drm_fb_cma_helper.c > @@ -118,13 +118,17 @@ dma_addr_t drm_fb_cma_get_gem_addr(struct drm_framebuffer *fb, > { > struct drm_gem_cma_object *obj; > dma_addr_t paddr; > + u8 bpp = drm_format_info_plane_bpp(fb->format, plane); > + > + /* This can't work for non-integer bytes-per-pixel */ > + WARN_ON(bpp % 8); > > obj = drm_fb_cma_get_gem_obj(fb, plane); > if (!obj) > return 0; > > paddr = obj->paddr + fb->offsets[plane]; > - paddr += fb->format->cpp[plane] * (state->src_x >> 16); > + paddr += (bpp / 8) * (state->src_x >> 16); > paddr += fb->pitches[plane] * (state->src_y >> 16); > > return paddr; > diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c > index 0646b108030b..ab369f250af4 100644 > --- a/drivers/gpu/drm/drm_fb_helper.c > +++ b/drivers/gpu/drm/drm_fb_helper.c > @@ -1572,6 +1572,7 @@ int drm_fb_helper_check_var(struct fb_var_screeninfo *var, > struct drm_fb_helper *fb_helper = info->par; > struct drm_framebuffer *fb = fb_helper->fb; > int depth; > + u8 bpp = drm_format_info_plane_bpp(fb->format, 0); > > if (var->pixclock != 0 || in_dbg_master()) > return -EINVAL; > @@ -1580,14 +1581,14 @@ int drm_fb_helper_check_var(struct fb_var_screeninfo *var, > * Changes struct fb_var_screeninfo are currently not pushed back > * to KMS, hence fail if different settings are requested. > */ > - if (var->bits_per_pixel != fb->format->cpp[0] * 8 || > + if (var->bits_per_pixel != bpp || > var->xres > fb->width || var->yres > fb->height || > var->xres_virtual > fb->width || var->yres_virtual > fb->height) { > DRM_DEBUG("fb requested width/height/bpp can't fit in current fb " > "request %dx%d-%d (virtual %dx%d) > %dx%d-%d\n", > var->xres, var->yres, var->bits_per_pixel, > var->xres_virtual, var->yres_virtual, > - fb->width, fb->height, fb->format->cpp[0] * 8); > + fb->width, fb->height, bpp); > return -EINVAL; > } > > @@ -1949,11 +1950,12 @@ void drm_fb_helper_fill_var(struct fb_info *info, struct drm_fb_helper *fb_helpe > uint32_t fb_width, uint32_t fb_height) > { > struct drm_framebuffer *fb = fb_helper->fb; > + u8 bpp = drm_format_info_plane_bpp(fb->format, 0); > > info->pseudo_palette = fb_helper->pseudo_palette; > info->var.xres_virtual = fb->width; > info->var.yres_virtual = fb->height; > - info->var.bits_per_pixel = fb->format->cpp[0] * 8; > + info->var.bits_per_pixel = bpp; > info->var.accel_flags = FB_ACCELF_TEXT; > info->var.xoffset = 0; > info->var.yoffset = 0; > diff --git a/drivers/gpu/drm/drm_fourcc.c b/drivers/gpu/drm/drm_fourcc.c > index 3b42c25bd58d..bb28919c32f3 100644 > --- a/drivers/gpu/drm/drm_fourcc.c > +++ b/drivers/gpu/drm/drm_fourcc.c > @@ -272,10 +272,60 @@ int drm_format_plane_cpp(uint32_t format, int plane) > if (!info || plane >= info->num_planes) > return 0; > > + /* > + * Not valid for formats with non-integer cpp, > + * use drm_format{_info}_plane_bpp instead > + */ > + WARN_ON(!info->cpp[0]); > + > return info->cpp[plane]; > } > EXPORT_SYMBOL(drm_format_plane_cpp); > > +/** > + * drm_format_plane_bpp - determine the bits per pixel value > + * @format: pixel format (DRM_FORMAT_*) > + * @plane: plane index > + * > + * Returns: > + * The bits per pixel value for the specified plane. > + */ > +int drm_format_plane_bpp(uint32_t format, int plane) > +{ > + const struct drm_format_info *info; > + > + info = drm_format_info(format); > + if (!info) > + return 0; > + > + return drm_format_info_plane_bpp(info, plane); > +} > +EXPORT_SYMBOL(drm_format_plane_bpp); > + > +/** > + * drm_format_info_plane_bpp - determine the bits per pixel value > + * > + * Convenience function which handles formats with both integer > + * and non-integer bytes-per-pixel. > + * > + * @format: pixel format info structure > + * @plane: plane index > + * > + * Returns: > + * The bits per pixel value for the specified plane. > + */ > +int drm_format_info_plane_bpp(const struct drm_format_info *info, int plane) > +{ > + if (plane >= info->num_planes) > + return 0; > + > + if (info->cpp[0]) > + return info->cpp[plane] * 8; > + > + return info->bpp[plane]; > +} > +EXPORT_SYMBOL(drm_format_info_plane_bpp); > + > /** > * drm_format_horz_chroma_subsampling - get the horizontal chroma subsampling factor > * @format: pixel format (DRM_FORMAT_*) > diff --git a/drivers/gpu/drm/drm_framebuffer.c b/drivers/gpu/drm/drm_framebuffer.c > index 8c4d32adcc17..7e00360ff70d 100644 > --- a/drivers/gpu/drm/drm_framebuffer.c > +++ b/drivers/gpu/drm/drm_framebuffer.c > @@ -185,20 +185,20 @@ static int framebuffer_check(struct drm_device *dev, > for (i = 0; i < info->num_planes; i++) { > unsigned int width = fb_plane_width(r->width, info, i); > unsigned int height = fb_plane_height(r->height, info, i); > - unsigned int cpp = info->cpp[i]; > + unsigned int bpp = drm_format_info_plane_bpp(info, i); > > if (!r->handles[i]) { > DRM_DEBUG_KMS("no buffer object handle for plane %d\n", i); > return -EINVAL; > } > > - if ((uint64_t) width * cpp > UINT_MAX) > + if ((uint64_t) DIV_ROUND_UP(width * bpp, 8) > UINT_MAX) > return -ERANGE; > > if ((uint64_t) height * r->pitches[i] + r->offsets[i] > UINT_MAX) > return -ERANGE; > > - if (r->pitches[i] < width * cpp) { > + if ((uint64_t) r->pitches[i] * 8 < (uint64_t) width * bpp) { > DRM_DEBUG_KMS("bad pitch %u for plane %d\n", r->pitches[i], i); > return -EINVAL; > } > @@ -476,7 +476,7 @@ int drm_mode_getfb(struct drm_device *dev, > r->height = fb->height; > r->width = fb->width; > r->depth = fb->format->depth; > - r->bpp = fb->format->cpp[0] * 8; > + r->bpp = drm_format_info_plane_bpp(fb->format, 0); > r->pitch = fb->pitches[0]; > > /* GET_FB() is an unprivileged ioctl so we must not return a > diff --git a/drivers/gpu/drm/drm_gem_framebuffer_helper.c b/drivers/gpu/drm/drm_gem_framebuffer_helper.c > index acfbc0641a06..dfe224ccaeba 100644 > --- a/drivers/gpu/drm/drm_gem_framebuffer_helper.c > +++ b/drivers/gpu/drm/drm_gem_framebuffer_helper.c > @@ -161,6 +161,7 @@ drm_gem_fb_create_with_funcs(struct drm_device *dev, struct drm_file *file, > unsigned int width = mode_cmd->width / (i ? info->hsub : 1); > unsigned int height = mode_cmd->height / (i ? info->vsub : 1); > unsigned int min_size; > + u8 bpp = drm_format_info_plane_bpp(fb->format, i); > > objs[i] = drm_gem_object_lookup(file, mode_cmd->handles[i]); > if (!objs[i]) { > @@ -170,7 +171,7 @@ drm_gem_fb_create_with_funcs(struct drm_device *dev, struct drm_file *file, > } > > min_size = (height - 1) * mode_cmd->pitches[i] > - + width * info->cpp[i] > + + DIV_ROUND_UP(width * bpp, 8) > + mode_cmd->offsets[i]; > > if (objs[i]->size < min_size) { > diff --git a/include/drm/drm_fourcc.h b/include/drm/drm_fourcc.h > index 3e86408dac9f..d4af4dab1623 100644 > --- a/include/drm/drm_fourcc.h > +++ b/include/drm/drm_fourcc.h > @@ -36,6 +36,7 @@ struct drm_mode_fb_cmd2; > * use in new code and set to 0 for new formats. > * @num_planes: Number of color planes (1 to 3) > * @cpp: Number of bytes per pixel (per plane) > + * @bpp: Number of bits per pixel (per plane), only valid if cpp[0] == 0. > * @hsub: Horizontal chroma subsampling factor > * @vsub: Vertical chroma subsampling factor > * @has_alpha: Does the format embeds an alpha component? > @@ -45,6 +46,7 @@ struct drm_format_info { > u8 depth; > u8 num_planes; > u8 cpp[3]; > + u8 bpp[3]; > u8 hsub; > u8 vsub; > bool has_alpha; > @@ -66,6 +68,8 @@ drm_get_format_info(struct drm_device *dev, > uint32_t drm_mode_legacy_fb_format(uint32_t bpp, uint32_t depth); > int drm_format_num_planes(uint32_t format); > int drm_format_plane_cpp(uint32_t format, int plane); > +int drm_format_plane_bpp(uint32_t format, int plane); > +int drm_format_info_plane_bpp(const struct drm_format_info *format, int plane); > int drm_format_horz_chroma_subsampling(uint32_t format); > int drm_format_vert_chroma_subsampling(uint32_t format); > int drm_format_plane_width(int width, uint32_t format, int plane); > -- > 2.16.1 > -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [RFC PATCH v2 1/3] drm/fourcc: Add 'bpp' field for formats with non-integer bytes-per-pixel Date: Fri, 31 Aug 2018 10:17:30 +0200 Message-ID: <20180831081730.GM21634@phenom.ffwll.local> References: <20180823152343.6474-1-brian.starkey@arm.com> <20180823152343.6474-2-brian.starkey@arm.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mail-ed1-x541.google.com (mail-ed1-x541.google.com [IPv6:2a00:1450:4864:20::541]) by gabe.freedesktop.org (Postfix) with ESMTPS id CC1C26E0B7 for ; Fri, 31 Aug 2018 08:17:34 +0000 (UTC) Received: by mail-ed1-x541.google.com with SMTP id z27-v6so8407163edb.10 for ; Fri, 31 Aug 2018 01:17:34 -0700 (PDT) Content-Disposition: inline In-Reply-To: <20180823152343.6474-2-brian.starkey@arm.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Brian Starkey Cc: airlied@linux.ie, daniel.vetter@ffwll.ch, alexandru-cosmin.gheorghe@arm.com, linux-kernel@vger.kernel.org, tfiga@chromium.org, seanpaul@chromium.org, dri-devel@lists.freedesktop.org, liviu.dudau@arm.com, ayan.halder@arm.com, hoegsberg@chromium.org List-Id: dri-devel@lists.freedesktop.org T24gVGh1LCBBdWcgMjMsIDIwMTggYXQgMDQ6MjM6NDFQTSArMDEwMCwgQnJpYW4gU3RhcmtleSB3 cm90ZToKPiBTb21lIGZvcm1hdHMgaGF2ZSBhIG5vbi1pbnRlZ2VyIG51bWJlciBvZiBieXRlcyBw ZXIgcGl4ZWwsIHdoaWNoIGNhbid0Cj4gYmUgaGFuZGxlZCB3aXRoIHRoZSBleGlzdGluZyAnY3Bw JyBmaWVsZCBpbiBkcm1fZm9ybWF0X2luZm8uIFRvIGhhbmRsZQo+IHRoZXNlIGZvcm1hdHMsIGFk ZCBhICdicHAnIGZpZWxkLCB3aGljaCBpcyBvbmx5IHVzZWQgaWYgY3BwWzBdID09IDAuCj4gCj4g VGhpcyB1cGRhdGVzIGFsbCB0aGUgdXNlcnMgb2YgZm9ybWF0LT5jcHAgaW4gdGhlIGNvcmUgRFJN IGNvZGUsCj4gY29udmVydGluZyB0aGVtIHRvIHVzZSBhIG5ldyBmdW5jdGlvbiB0byBnZXQgdGhl IGJpdHMtcGVyLXBpeGVsIGZvciBhbnkKPiBmb3JtYXQuCj4gCj4gSXQncyBhc3N1bWVkIHRoYXQg ZHJpdmVycyB3aWxsIHVzZSB0aGUgJ2JwcCcgZmllbGQgd2hlbiB0aGV5IGFkZCBzdXBwb3J0Cj4g Zm9yIHBpeGVsIGZvcm1hdHMgd2l0aCBub24taW50ZWdlciBieXRlcy1wZXItcGl4ZWwuCj4gCj4g U2lnbmVkLW9mZi1ieTogQnJpYW4gU3RhcmtleSA8YnJpYW4uc3RhcmtleUBhcm0uY29tPgoKSSBh c3N1bWUgeW91IHN0aWxsIHJlcXVpcmUgdGhhdCBzdHVmZiBpcyBldmVudHVhbGx5IGFsaWduZWQg dG8gYnl0ZXM/IEluCnRoYXQgY2FzZSwgY2FuIHdlIHN1YnN1bWUgdGhpcyBpbnRvIHRoZSB0aWxl IHdvcmsgQWxleCBpcyBkb2luZz8gSXQncwplc3NlbnRpYWxseSBqdXN0IGFub3RoZXIgc3BlY2lh bCBjYXNlIG9mIGhhdmluZyBzdG9yYWdlLXNpemUgdW5pdHMKbWVhc3VyZWQgaW4gYnl0ZXMgd2hp Y2ggc3BhbiBtb3JlIHRoYW4gMXgxIHBpeGVsLiBBbmQgSSBraW5kYSBkb24ndCB3YW50IGEKbWV0 cmljIHBpbGUgb2Ygc3BlY2lhbCBjYXNlcyBoZXJlIGluIHRoZSBmb3JtYXQgY29kZSwgYmVjYXVz ZSB0aGF0IGp1c3QKbWVhbnMgZXZlcnkgZHJpdmVyIGhhbmRsZXMgYSBkaWZmZXJlbnQgc3Vic2V0 LCB3aXRoIGRpZmZlcmVudCBidWdzLgotRGFuaWVsCgo+IC0tLQo+ICBkcml2ZXJzL2dwdS9kcm0v ZHJtX2ZiX2NtYV9oZWxwZXIuYyAgICAgICAgICB8ICA2ICsrKy0KPiAgZHJpdmVycy9ncHUvZHJt L2RybV9mYl9oZWxwZXIuYyAgICAgICAgICAgICAgfCAgOCArKystLQo+ICBkcml2ZXJzL2dwdS9k cm0vZHJtX2ZvdXJjYy5jICAgICAgICAgICAgICAgICB8IDUwICsrKysrKysrKysrKysrKysrKysr KysrKysrKysKPiAgZHJpdmVycy9ncHUvZHJtL2RybV9mcmFtZWJ1ZmZlci5jICAgICAgICAgICAg fCAgOCArKy0tLQo+ICBkcml2ZXJzL2dwdS9kcm0vZHJtX2dlbV9mcmFtZWJ1ZmZlcl9oZWxwZXIu YyB8ICAzICstCj4gIGluY2x1ZGUvZHJtL2RybV9mb3VyY2MuaCAgICAgICAgICAgICAgICAgICAg IHwgIDQgKysrCj4gIDYgZmlsZXMgY2hhbmdlZCwgNzAgaW5zZXJ0aW9ucygrKSwgOSBkZWxldGlv bnMoLSkKPiAKPiBkaWZmIC0tZ2l0IGEvZHJpdmVycy9ncHUvZHJtL2RybV9mYl9jbWFfaGVscGVy LmMgYi9kcml2ZXJzL2dwdS9kcm0vZHJtX2ZiX2NtYV9oZWxwZXIuYwo+IGluZGV4IDE4NmQwMGFk ZmI1Zi4uZTI3OWQ3MGQzZTYwIDEwMDY0NAo+IC0tLSBhL2RyaXZlcnMvZ3B1L2RybS9kcm1fZmJf Y21hX2hlbHBlci5jCj4gKysrIGIvZHJpdmVycy9ncHUvZHJtL2RybV9mYl9jbWFfaGVscGVyLmMK PiBAQCAtMTE4LDEzICsxMTgsMTcgQEAgZG1hX2FkZHJfdCBkcm1fZmJfY21hX2dldF9nZW1fYWRk cihzdHJ1Y3QgZHJtX2ZyYW1lYnVmZmVyICpmYiwKPiAgewo+ICAJc3RydWN0IGRybV9nZW1fY21h X29iamVjdCAqb2JqOwo+ICAJZG1hX2FkZHJfdCBwYWRkcjsKPiArCXU4IGJwcCA9IGRybV9mb3Jt YXRfaW5mb19wbGFuZV9icHAoZmItPmZvcm1hdCwgcGxhbmUpOwo+ICsKPiArCS8qIFRoaXMgY2Fu J3Qgd29yayBmb3Igbm9uLWludGVnZXIgYnl0ZXMtcGVyLXBpeGVsICovCj4gKwlXQVJOX09OKGJw cCAlIDgpOwo+ICAKPiAgCW9iaiA9IGRybV9mYl9jbWFfZ2V0X2dlbV9vYmooZmIsIHBsYW5lKTsK PiAgCWlmICghb2JqKQo+ICAJCXJldHVybiAwOwo+ICAKPiAgCXBhZGRyID0gb2JqLT5wYWRkciAr IGZiLT5vZmZzZXRzW3BsYW5lXTsKPiAtCXBhZGRyICs9IGZiLT5mb3JtYXQtPmNwcFtwbGFuZV0g KiAoc3RhdGUtPnNyY194ID4+IDE2KTsKPiArCXBhZGRyICs9IChicHAgLyA4KSAqIChzdGF0ZS0+ c3JjX3ggPj4gMTYpOwo+ICAJcGFkZHIgKz0gZmItPnBpdGNoZXNbcGxhbmVdICogKHN0YXRlLT5z cmNfeSA+PiAxNik7Cj4gIAo+ICAJcmV0dXJuIHBhZGRyOwo+IGRpZmYgLS1naXQgYS9kcml2ZXJz L2dwdS9kcm0vZHJtX2ZiX2hlbHBlci5jIGIvZHJpdmVycy9ncHUvZHJtL2RybV9mYl9oZWxwZXIu Ywo+IGluZGV4IDA2NDZiMTA4MDMwYi4uYWIzNjlmMjUwYWY0IDEwMDY0NAo+IC0tLSBhL2RyaXZl cnMvZ3B1L2RybS9kcm1fZmJfaGVscGVyLmMKPiArKysgYi9kcml2ZXJzL2dwdS9kcm0vZHJtX2Zi X2hlbHBlci5jCj4gQEAgLTE1NzIsNiArMTU3Miw3IEBAIGludCBkcm1fZmJfaGVscGVyX2NoZWNr X3ZhcihzdHJ1Y3QgZmJfdmFyX3NjcmVlbmluZm8gKnZhciwKPiAgCXN0cnVjdCBkcm1fZmJfaGVs cGVyICpmYl9oZWxwZXIgPSBpbmZvLT5wYXI7Cj4gIAlzdHJ1Y3QgZHJtX2ZyYW1lYnVmZmVyICpm YiA9IGZiX2hlbHBlci0+ZmI7Cj4gIAlpbnQgZGVwdGg7Cj4gKwl1OCBicHAgPSBkcm1fZm9ybWF0 X2luZm9fcGxhbmVfYnBwKGZiLT5mb3JtYXQsIDApOwo+ICAKPiAgCWlmICh2YXItPnBpeGNsb2Nr ICE9IDAgfHwgaW5fZGJnX21hc3RlcigpKQo+ICAJCXJldHVybiAtRUlOVkFMOwo+IEBAIC0xNTgw LDE0ICsxNTgxLDE0IEBAIGludCBkcm1fZmJfaGVscGVyX2NoZWNrX3ZhcihzdHJ1Y3QgZmJfdmFy X3NjcmVlbmluZm8gKnZhciwKPiAgCSAqIENoYW5nZXMgc3RydWN0IGZiX3Zhcl9zY3JlZW5pbmZv IGFyZSBjdXJyZW50bHkgbm90IHB1c2hlZCBiYWNrCj4gIAkgKiB0byBLTVMsIGhlbmNlIGZhaWwg aWYgZGlmZmVyZW50IHNldHRpbmdzIGFyZSByZXF1ZXN0ZWQuCj4gIAkgKi8KPiAtCWlmICh2YXIt PmJpdHNfcGVyX3BpeGVsICE9IGZiLT5mb3JtYXQtPmNwcFswXSAqIDggfHwKPiArCWlmICh2YXIt PmJpdHNfcGVyX3BpeGVsICE9IGJwcCB8fAo+ICAJICAgIHZhci0+eHJlcyA+IGZiLT53aWR0aCB8 fCB2YXItPnlyZXMgPiBmYi0+aGVpZ2h0IHx8Cj4gIAkgICAgdmFyLT54cmVzX3ZpcnR1YWwgPiBm Yi0+d2lkdGggfHwgdmFyLT55cmVzX3ZpcnR1YWwgPiBmYi0+aGVpZ2h0KSB7Cj4gIAkJRFJNX0RF QlVHKCJmYiByZXF1ZXN0ZWQgd2lkdGgvaGVpZ2h0L2JwcCBjYW4ndCBmaXQgaW4gY3VycmVudCBm YiAiCj4gIAkJCSAgInJlcXVlc3QgJWR4JWQtJWQgKHZpcnR1YWwgJWR4JWQpID4gJWR4JWQtJWRc biIsCj4gIAkJCSAgdmFyLT54cmVzLCB2YXItPnlyZXMsIHZhci0+Yml0c19wZXJfcGl4ZWwsCj4g IAkJCSAgdmFyLT54cmVzX3ZpcnR1YWwsIHZhci0+eXJlc192aXJ0dWFsLAo+IC0JCQkgIGZiLT53 aWR0aCwgZmItPmhlaWdodCwgZmItPmZvcm1hdC0+Y3BwWzBdICogOCk7Cj4gKwkJCSAgZmItPndp ZHRoLCBmYi0+aGVpZ2h0LCBicHApOwo+ICAJCXJldHVybiAtRUlOVkFMOwo+ICAJfQo+ICAKPiBA QCAtMTk0OSwxMSArMTk1MCwxMiBAQCB2b2lkIGRybV9mYl9oZWxwZXJfZmlsbF92YXIoc3RydWN0 IGZiX2luZm8gKmluZm8sIHN0cnVjdCBkcm1fZmJfaGVscGVyICpmYl9oZWxwZQo+ICAJCQkgICAg dWludDMyX3QgZmJfd2lkdGgsIHVpbnQzMl90IGZiX2hlaWdodCkKPiAgewo+ICAJc3RydWN0IGRy bV9mcmFtZWJ1ZmZlciAqZmIgPSBmYl9oZWxwZXItPmZiOwo+ICsJdTggYnBwID0gZHJtX2Zvcm1h dF9pbmZvX3BsYW5lX2JwcChmYi0+Zm9ybWF0LCAwKTsKPiAgCj4gIAlpbmZvLT5wc2V1ZG9fcGFs ZXR0ZSA9IGZiX2hlbHBlci0+cHNldWRvX3BhbGV0dGU7Cj4gIAlpbmZvLT52YXIueHJlc192aXJ0 dWFsID0gZmItPndpZHRoOwo+ICAJaW5mby0+dmFyLnlyZXNfdmlydHVhbCA9IGZiLT5oZWlnaHQ7 Cj4gLQlpbmZvLT52YXIuYml0c19wZXJfcGl4ZWwgPSBmYi0+Zm9ybWF0LT5jcHBbMF0gKiA4Owo+ ICsJaW5mby0+dmFyLmJpdHNfcGVyX3BpeGVsID0gYnBwOwo+ICAJaW5mby0+dmFyLmFjY2VsX2Zs YWdzID0gRkJfQUNDRUxGX1RFWFQ7Cj4gIAlpbmZvLT52YXIueG9mZnNldCA9IDA7Cj4gIAlpbmZv LT52YXIueW9mZnNldCA9IDA7Cj4gZGlmZiAtLWdpdCBhL2RyaXZlcnMvZ3B1L2RybS9kcm1fZm91 cmNjLmMgYi9kcml2ZXJzL2dwdS9kcm0vZHJtX2ZvdXJjYy5jCj4gaW5kZXggM2I0MmMyNWJkNThk Li5iYjI4OTE5YzMyZjMgMTAwNjQ0Cj4gLS0tIGEvZHJpdmVycy9ncHUvZHJtL2RybV9mb3VyY2Mu Ywo+ICsrKyBiL2RyaXZlcnMvZ3B1L2RybS9kcm1fZm91cmNjLmMKPiBAQCAtMjcyLDEwICsyNzIs NjAgQEAgaW50IGRybV9mb3JtYXRfcGxhbmVfY3BwKHVpbnQzMl90IGZvcm1hdCwgaW50IHBsYW5l KQo+ICAJaWYgKCFpbmZvIHx8IHBsYW5lID49IGluZm8tPm51bV9wbGFuZXMpCj4gIAkJcmV0dXJu IDA7Cj4gIAo+ICsJLyoKPiArCSAqIE5vdCB2YWxpZCBmb3IgZm9ybWF0cyB3aXRoIG5vbi1pbnRl Z2VyIGNwcCwKPiArCSAqIHVzZSBkcm1fZm9ybWF0e19pbmZvfV9wbGFuZV9icHAgaW5zdGVhZAo+ ICsJICovCj4gKwlXQVJOX09OKCFpbmZvLT5jcHBbMF0pOwo+ICsKPiAgCXJldHVybiBpbmZvLT5j cHBbcGxhbmVdOwo+ICB9Cj4gIEVYUE9SVF9TWU1CT0woZHJtX2Zvcm1hdF9wbGFuZV9jcHApOwo+ ICAKPiArLyoqCj4gKyAqIGRybV9mb3JtYXRfcGxhbmVfYnBwIC0gZGV0ZXJtaW5lIHRoZSBiaXRz IHBlciBwaXhlbCB2YWx1ZQo+ICsgKiBAZm9ybWF0OiBwaXhlbCBmb3JtYXQgKERSTV9GT1JNQVRf KikKPiArICogQHBsYW5lOiBwbGFuZSBpbmRleAo+ICsgKgo+ICsgKiBSZXR1cm5zOgo+ICsgKiBU aGUgYml0cyBwZXIgcGl4ZWwgdmFsdWUgZm9yIHRoZSBzcGVjaWZpZWQgcGxhbmUuCj4gKyAqLwo+ ICtpbnQgZHJtX2Zvcm1hdF9wbGFuZV9icHAodWludDMyX3QgZm9ybWF0LCBpbnQgcGxhbmUpCj4g K3sKPiArCWNvbnN0IHN0cnVjdCBkcm1fZm9ybWF0X2luZm8gKmluZm87Cj4gKwo+ICsJaW5mbyA9 IGRybV9mb3JtYXRfaW5mbyhmb3JtYXQpOwo+ICsJaWYgKCFpbmZvKQo+ICsJCXJldHVybiAwOwo+ ICsKPiArCXJldHVybiBkcm1fZm9ybWF0X2luZm9fcGxhbmVfYnBwKGluZm8sIHBsYW5lKTsKPiAr fQo+ICtFWFBPUlRfU1lNQk9MKGRybV9mb3JtYXRfcGxhbmVfYnBwKTsKPiArCj4gKy8qKgo+ICsg KiBkcm1fZm9ybWF0X2luZm9fcGxhbmVfYnBwIC0gZGV0ZXJtaW5lIHRoZSBiaXRzIHBlciBwaXhl bCB2YWx1ZQo+ICsgKgo+ICsgKiBDb252ZW5pZW5jZSBmdW5jdGlvbiB3aGljaCBoYW5kbGVzIGZv cm1hdHMgd2l0aCBib3RoIGludGVnZXIKPiArICogYW5kIG5vbi1pbnRlZ2VyIGJ5dGVzLXBlci1w aXhlbC4KPiArICoKPiArICogQGZvcm1hdDogcGl4ZWwgZm9ybWF0IGluZm8gc3RydWN0dXJlCj4g KyAqIEBwbGFuZTogcGxhbmUgaW5kZXgKPiArICoKPiArICogUmV0dXJuczoKPiArICogVGhlIGJp dHMgcGVyIHBpeGVsIHZhbHVlIGZvciB0aGUgc3BlY2lmaWVkIHBsYW5lLgo+ICsgKi8KPiAraW50 IGRybV9mb3JtYXRfaW5mb19wbGFuZV9icHAoY29uc3Qgc3RydWN0IGRybV9mb3JtYXRfaW5mbyAq aW5mbywgaW50IHBsYW5lKQo+ICt7Cj4gKwlpZiAocGxhbmUgPj0gaW5mby0+bnVtX3BsYW5lcykK PiArCQlyZXR1cm4gMDsKPiArCj4gKwlpZiAoaW5mby0+Y3BwWzBdKQo+ICsJCXJldHVybiBpbmZv LT5jcHBbcGxhbmVdICogODsKPiArCj4gKwlyZXR1cm4gaW5mby0+YnBwW3BsYW5lXTsKPiArfQo+ ICtFWFBPUlRfU1lNQk9MKGRybV9mb3JtYXRfaW5mb19wbGFuZV9icHApOwo+ICsKPiAgLyoqCj4g ICAqIGRybV9mb3JtYXRfaG9yel9jaHJvbWFfc3Vic2FtcGxpbmcgLSBnZXQgdGhlIGhvcml6b250 YWwgY2hyb21hIHN1YnNhbXBsaW5nIGZhY3Rvcgo+ICAgKiBAZm9ybWF0OiBwaXhlbCBmb3JtYXQg KERSTV9GT1JNQVRfKikKPiBkaWZmIC0tZ2l0IGEvZHJpdmVycy9ncHUvZHJtL2RybV9mcmFtZWJ1 ZmZlci5jIGIvZHJpdmVycy9ncHUvZHJtL2RybV9mcmFtZWJ1ZmZlci5jCj4gaW5kZXggOGM0ZDMy YWRjYzE3Li43ZTAwMzYwZmY3MGQgMTAwNjQ0Cj4gLS0tIGEvZHJpdmVycy9ncHUvZHJtL2RybV9m cmFtZWJ1ZmZlci5jCj4gKysrIGIvZHJpdmVycy9ncHUvZHJtL2RybV9mcmFtZWJ1ZmZlci5jCj4g QEAgLTE4NSwyMCArMTg1LDIwIEBAIHN0YXRpYyBpbnQgZnJhbWVidWZmZXJfY2hlY2soc3RydWN0 IGRybV9kZXZpY2UgKmRldiwKPiAgCWZvciAoaSA9IDA7IGkgPCBpbmZvLT5udW1fcGxhbmVzOyBp KyspIHsKPiAgCQl1bnNpZ25lZCBpbnQgd2lkdGggPSBmYl9wbGFuZV93aWR0aChyLT53aWR0aCwg aW5mbywgaSk7Cj4gIAkJdW5zaWduZWQgaW50IGhlaWdodCA9IGZiX3BsYW5lX2hlaWdodChyLT5o ZWlnaHQsIGluZm8sIGkpOwo+IC0JCXVuc2lnbmVkIGludCBjcHAgPSBpbmZvLT5jcHBbaV07Cj4g KwkJdW5zaWduZWQgaW50IGJwcCA9IGRybV9mb3JtYXRfaW5mb19wbGFuZV9icHAoaW5mbywgaSk7 Cj4gIAo+ICAJCWlmICghci0+aGFuZGxlc1tpXSkgewo+ICAJCQlEUk1fREVCVUdfS01TKCJubyBi dWZmZXIgb2JqZWN0IGhhbmRsZSBmb3IgcGxhbmUgJWRcbiIsIGkpOwo+ICAJCQlyZXR1cm4gLUVJ TlZBTDsKPiAgCQl9Cj4gIAo+IC0JCWlmICgodWludDY0X3QpIHdpZHRoICogY3BwID4gVUlOVF9N QVgpCj4gKwkJaWYgKCh1aW50NjRfdCkgRElWX1JPVU5EX1VQKHdpZHRoICogYnBwLCA4KSA+IFVJ TlRfTUFYKQo+ICAJCQlyZXR1cm4gLUVSQU5HRTsKPiAgCj4gIAkJaWYgKCh1aW50NjRfdCkgaGVp Z2h0ICogci0+cGl0Y2hlc1tpXSArIHItPm9mZnNldHNbaV0gPiBVSU5UX01BWCkKPiAgCQkJcmV0 dXJuIC1FUkFOR0U7Cj4gIAo+IC0JCWlmIChyLT5waXRjaGVzW2ldIDwgd2lkdGggKiBjcHApIHsK PiArCQlpZiAoKHVpbnQ2NF90KSByLT5waXRjaGVzW2ldICogOCA8ICh1aW50NjRfdCkgd2lkdGgg KiBicHApIHsKPiAgCQkJRFJNX0RFQlVHX0tNUygiYmFkIHBpdGNoICV1IGZvciBwbGFuZSAlZFxu Iiwgci0+cGl0Y2hlc1tpXSwgaSk7Cj4gIAkJCXJldHVybiAtRUlOVkFMOwo+ICAJCX0KPiBAQCAt NDc2LDcgKzQ3Niw3IEBAIGludCBkcm1fbW9kZV9nZXRmYihzdHJ1Y3QgZHJtX2RldmljZSAqZGV2 LAo+ICAJci0+aGVpZ2h0ID0gZmItPmhlaWdodDsKPiAgCXItPndpZHRoID0gZmItPndpZHRoOwo+ ICAJci0+ZGVwdGggPSBmYi0+Zm9ybWF0LT5kZXB0aDsKPiAtCXItPmJwcCA9IGZiLT5mb3JtYXQt PmNwcFswXSAqIDg7Cj4gKwlyLT5icHAgPSBkcm1fZm9ybWF0X2luZm9fcGxhbmVfYnBwKGZiLT5m b3JtYXQsIDApOwo+ICAJci0+cGl0Y2ggPSBmYi0+cGl0Y2hlc1swXTsKPiAgCj4gIAkvKiBHRVRf RkIoKSBpcyBhbiB1bnByaXZpbGVnZWQgaW9jdGwgc28gd2UgbXVzdCBub3QgcmV0dXJuIGEKPiBk aWZmIC0tZ2l0IGEvZHJpdmVycy9ncHUvZHJtL2RybV9nZW1fZnJhbWVidWZmZXJfaGVscGVyLmMg Yi9kcml2ZXJzL2dwdS9kcm0vZHJtX2dlbV9mcmFtZWJ1ZmZlcl9oZWxwZXIuYwo+IGluZGV4IGFj ZmJjMDY0MWEwNi4uZGZlMjI0Y2NhZWJhIDEwMDY0NAo+IC0tLSBhL2RyaXZlcnMvZ3B1L2RybS9k cm1fZ2VtX2ZyYW1lYnVmZmVyX2hlbHBlci5jCj4gKysrIGIvZHJpdmVycy9ncHUvZHJtL2RybV9n ZW1fZnJhbWVidWZmZXJfaGVscGVyLmMKPiBAQCAtMTYxLDYgKzE2MSw3IEBAIGRybV9nZW1fZmJf Y3JlYXRlX3dpdGhfZnVuY3Moc3RydWN0IGRybV9kZXZpY2UgKmRldiwgc3RydWN0IGRybV9maWxl ICpmaWxlLAo+ICAJCXVuc2lnbmVkIGludCB3aWR0aCA9IG1vZGVfY21kLT53aWR0aCAvIChpID8g aW5mby0+aHN1YiA6IDEpOwo+ICAJCXVuc2lnbmVkIGludCBoZWlnaHQgPSBtb2RlX2NtZC0+aGVp Z2h0IC8gKGkgPyBpbmZvLT52c3ViIDogMSk7Cj4gIAkJdW5zaWduZWQgaW50IG1pbl9zaXplOwo+ ICsJCXU4IGJwcCA9IGRybV9mb3JtYXRfaW5mb19wbGFuZV9icHAoZmItPmZvcm1hdCwgaSk7Cj4g IAo+ICAJCW9ianNbaV0gPSBkcm1fZ2VtX29iamVjdF9sb29rdXAoZmlsZSwgbW9kZV9jbWQtPmhh bmRsZXNbaV0pOwo+ICAJCWlmICghb2Jqc1tpXSkgewo+IEBAIC0xNzAsNyArMTcxLDcgQEAgZHJt X2dlbV9mYl9jcmVhdGVfd2l0aF9mdW5jcyhzdHJ1Y3QgZHJtX2RldmljZSAqZGV2LCBzdHJ1Y3Qg ZHJtX2ZpbGUgKmZpbGUsCj4gIAkJfQo+ICAKPiAgCQltaW5fc2l6ZSA9IChoZWlnaHQgLSAxKSAq IG1vZGVfY21kLT5waXRjaGVzW2ldCj4gLQkJCSArIHdpZHRoICogaW5mby0+Y3BwW2ldCj4gKwkJ CSArIERJVl9ST1VORF9VUCh3aWR0aCAqIGJwcCwgOCkKPiAgCQkJICsgbW9kZV9jbWQtPm9mZnNl dHNbaV07Cj4gIAo+ICAJCWlmIChvYmpzW2ldLT5zaXplIDwgbWluX3NpemUpIHsKPiBkaWZmIC0t Z2l0IGEvaW5jbHVkZS9kcm0vZHJtX2ZvdXJjYy5oIGIvaW5jbHVkZS9kcm0vZHJtX2ZvdXJjYy5o Cj4gaW5kZXggM2U4NjQwOGRhYzlmLi5kNGFmNGRhYjE2MjMgMTAwNjQ0Cj4gLS0tIGEvaW5jbHVk ZS9kcm0vZHJtX2ZvdXJjYy5oCj4gKysrIGIvaW5jbHVkZS9kcm0vZHJtX2ZvdXJjYy5oCj4gQEAg LTM2LDYgKzM2LDcgQEAgc3RydWN0IGRybV9tb2RlX2ZiX2NtZDI7Cj4gICAqCXVzZSBpbiBuZXcg Y29kZSBhbmQgc2V0IHRvIDAgZm9yIG5ldyBmb3JtYXRzLgo+ICAgKiBAbnVtX3BsYW5lczogTnVt YmVyIG9mIGNvbG9yIHBsYW5lcyAoMSB0byAzKQo+ICAgKiBAY3BwOiBOdW1iZXIgb2YgYnl0ZXMg cGVyIHBpeGVsIChwZXIgcGxhbmUpCj4gKyAqIEBicHA6IE51bWJlciBvZiBiaXRzIHBlciBwaXhl bCAocGVyIHBsYW5lKSwgb25seSB2YWxpZCBpZiBjcHBbMF0gPT0gMC4KPiAgICogQGhzdWI6IEhv cml6b250YWwgY2hyb21hIHN1YnNhbXBsaW5nIGZhY3Rvcgo+ICAgKiBAdnN1YjogVmVydGljYWwg Y2hyb21hIHN1YnNhbXBsaW5nIGZhY3Rvcgo+ICAgKiBAaGFzX2FscGhhOiBEb2VzIHRoZSBmb3Jt YXQgZW1iZWRzIGFuIGFscGhhIGNvbXBvbmVudD8KPiBAQCAtNDUsNiArNDYsNyBAQCBzdHJ1Y3Qg ZHJtX2Zvcm1hdF9pbmZvIHsKPiAgCXU4IGRlcHRoOwo+ICAJdTggbnVtX3BsYW5lczsKPiAgCXU4 IGNwcFszXTsKPiArCXU4IGJwcFszXTsKPiAgCXU4IGhzdWI7Cj4gIAl1OCB2c3ViOwo+ICAJYm9v bCBoYXNfYWxwaGE7Cj4gQEAgLTY2LDYgKzY4LDggQEAgZHJtX2dldF9mb3JtYXRfaW5mbyhzdHJ1 Y3QgZHJtX2RldmljZSAqZGV2LAo+ICB1aW50MzJfdCBkcm1fbW9kZV9sZWdhY3lfZmJfZm9ybWF0 KHVpbnQzMl90IGJwcCwgdWludDMyX3QgZGVwdGgpOwo+ICBpbnQgZHJtX2Zvcm1hdF9udW1fcGxh bmVzKHVpbnQzMl90IGZvcm1hdCk7Cj4gIGludCBkcm1fZm9ybWF0X3BsYW5lX2NwcCh1aW50MzJf dCBmb3JtYXQsIGludCBwbGFuZSk7Cj4gK2ludCBkcm1fZm9ybWF0X3BsYW5lX2JwcCh1aW50MzJf dCBmb3JtYXQsIGludCBwbGFuZSk7Cj4gK2ludCBkcm1fZm9ybWF0X2luZm9fcGxhbmVfYnBwKGNv bnN0IHN0cnVjdCBkcm1fZm9ybWF0X2luZm8gKmZvcm1hdCwgaW50IHBsYW5lKTsKPiAgaW50IGRy bV9mb3JtYXRfaG9yel9jaHJvbWFfc3Vic2FtcGxpbmcodWludDMyX3QgZm9ybWF0KTsKPiAgaW50 IGRybV9mb3JtYXRfdmVydF9jaHJvbWFfc3Vic2FtcGxpbmcodWludDMyX3QgZm9ybWF0KTsKPiAg aW50IGRybV9mb3JtYXRfcGxhbmVfd2lkdGgoaW50IHdpZHRoLCB1aW50MzJfdCBmb3JtYXQsIGlu dCBwbGFuZSk7Cj4gLS0gCj4gMi4xNi4xCj4gCgotLSAKRGFuaWVsIFZldHRlcgpTb2Z0d2FyZSBF bmdpbmVlciwgSW50ZWwgQ29ycG9yYXRpb24KaHR0cDovL2Jsb2cuZmZ3bGwuY2gKX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KZHJpLWRldmVsIG1haWxpbmcg bGlzdApkcmktZGV2ZWxAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0dHBzOi8vbGlzdHMuZnJlZWRl c2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vZHJpLWRldmVsCg==