[PATCH] drm/i915: Fix up FORCE_GPU_RELOC (debug) to flush CPU write domains

[PATCH] drm/i915: Fix up FORCE_GPU_RELOC (debug) to flush CPU write domains

[Chris Wilson]

We currently assert that if the target is in a CPU write domain, we use
a CPU path rather than the GPU path. However, we have a debug override
to force the GPU path and that unfortunately hits the assert. Include
the async clflush under the debug option.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/i915_gem_execbuffer.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 43706c1db31a..7d0b3a2c30e2 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1127,6 +1127,13 @@ static int __reloc_gpu_alloc(struct i915_execbuffer *eb,
 	u32 *cmd;
 	int err;
 
+	if (DBG_FORCE_RELOC == FORCE_GPU_RELOC) {
+		obj = vma->obj;
+		if (obj->cache_dirty & ~obj->cache_coherent)
+			i915_gem_clflush_object(obj, 0);
+		obj->write_domain = 0;
+	}
+
 	GEM_BUG_ON(vma->obj->write_domain & I915_GEM_DOMAIN_CPU);
 
 	obj = i915_gem_batch_pool_get(&eb->engine->batch_pool, PAGE_SIZE);
-- 
2.19.0.rc1

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✗ Fi.CI.BAT: failure for drm/i915: Fix up FORCE_GPU_RELOC (debug) to flush CPU write domains

[Patchwork]

== Series Details ==

Series: drm/i915: Fix up FORCE_GPU_RELOC (debug) to flush CPU write domains
URL   : https://patchwork.freedesktop.org/series/49084/
State : failure

== Summary ==

= CI Bug Log - changes from CI_DRM_4757 -> Patchwork_10073 =

== Summary - FAILURE ==

  Serious unknown changes coming with Patchwork_10073 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_10073, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/49084/revisions/1/mbox/

== Possible new issues ==

  Here are the unknown changes that may have been introduced in Patchwork_10073:

  === IGT changes ===

    ==== Possible regressions ====

    igt@drv_selftest@live_hangcheck:
      fi-icl-u:           PASS -> INCOMPLETE

    
== Known issues ==

  Here are the changes found in Patchwork_10073 that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@amdgpu/amd_basic@userptr:
      fi-kbl-8809g:       PASS -> INCOMPLETE (fdo#107402)

    {igt@pm_rpm@module-reload}:
      fi-cnl-psr:         PASS -> WARN (fdo#107602, fdo#107708)

    
    ==== Possible fixes ====

    igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
      fi-bxt-dsi:         INCOMPLETE (fdo#103927) -> PASS

    
    ==== Warnings ====

    {igt@pm_rpm@module-reload}:
      fi-bsw-n3050:       DMESG-WARN (fdo#107704) -> DMESG-FAIL (fdo#107704)

    
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927
  fdo#107402 https://bugs.freedesktop.org/show_bug.cgi?id=107402
  fdo#107602 https://bugs.freedesktop.org/show_bug.cgi?id=107602
  fdo#107704 https://bugs.freedesktop.org/show_bug.cgi?id=107704
  fdo#107708 https://bugs.freedesktop.org/show_bug.cgi?id=107708


== Participating hosts (53 -> 48) ==

  Missing    (5): fi-ctg-p8600 fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-hsw-4200u 


== Build changes ==

    * Linux: CI_DRM_4757 -> Patchwork_10073

  CI_DRM_4757: 1465de895e2b5d9e74e9a85189c9075155efa30d @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4621: 125eee6e981eac0a004aeb4f327439a132ceac5c @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_10073: ff5e223ebdc09a4ceb959fcc4a47464d06616571 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

ff5e223ebdc0 drm/i915: Fix up FORCE_GPU_RELOC (debug) to flush CPU write domains

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10073/issues.html
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Re: [PATCH] drm/i915: Fix up FORCE_GPU_RELOC (debug) to flush CPU write domains

[Matthew Auld]

On Mon, 3 Sep 2018 at 16:04, Chris Wilson <chris@chris-wilson.co.uk> wrote:
>
> We currently assert that if the target is in a CPU write domain, we use
> a CPU path rather than the GPU path. However, we have a debug override
> to force the GPU path and that unfortunately hits the assert. Include
> the async clflush under the debug option.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
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