All of lore.kernel.org
 help / color / mirror / Atom feed
From: "Roger Pau Monné" <roger.pau@citrix.com>
To: Andrew Cooper <andrew.cooper3@citrix.com>
Cc: Kevin Tian <kevin.tian@intel.com>, Wei Liu <wei.liu2@citrix.com>,
	Jun Nakajima <jun.nakajima@intel.com>,
	Jan Beulich <JBeulich@suse.com>,
	Xen-devel <xen-devel@lists.xen.org>
Subject: Re: [PATCH v2 3/5] x86: Fix APIC MSR constant names
Date: Mon, 10 Sep 2018 16:39:33 +0200	[thread overview]
Message-ID: <20180910143933.rvm2fnmucy634bld@mac.bytemobile.com> (raw)
In-Reply-To: <1520449116-15443-4-git-send-email-andrew.cooper3@citrix.com>

On Wed, Mar 07, 2018 at 06:58:34PM +0000, Andrew Cooper wrote:
> We currently have MSR_IA32_APICBASE and MSR_IA32_APICBASE_MSR which are
> synonymous from a naming point of view, but refer to very different things.
> 
> Rename the x2APIC MSRs to MSR_X2APIC_*, which are shorter constants and
> visually separate the register function from the generic APIC name.  For the
> case ranges, introduce MSR_X2APIC_LAST, rather than relying on the knowledge
> that there are 0x3ff MSRs architecturally reserved for x2APIC functionality.
> 
> For functionality relating to the APIC_BASE MSR, use MSR_APIC_BASE for the MSR
> itself, but drop the MSR prefix from the other constants to shorten the names.
> In all cases, the fact that we are dealing with the APIC_BASE MSR is obvious
> from the context.
> 
> No functional change (the combined binary is identical).
> 
> Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>

Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>

> diff --git a/xen/include/asm-x86/msr-index.h b/xen/include/asm-x86/msr-index.h
> index 2b4014c..07f2209 100644
> --- a/xen/include/asm-x86/msr-index.h
> +++ b/xen/include/asm-x86/msr-index.h
> @@ -312,18 +312,21 @@
>  
>  #define MSR_IA32_TSC_ADJUST		0x0000003b
>  
> -#define MSR_IA32_APICBASE		0x0000001b
> -#define MSR_IA32_APICBASE_BSP		(1<<8)
> -#define MSR_IA32_APICBASE_EXTD		(1<<10)
> -#define MSR_IA32_APICBASE_ENABLE	(1<<11)
> -#define MSR_IA32_APICBASE_BASE		0x000ffffffffff000ul
> -#define MSR_IA32_APICBASE_MSR           0x800
> -#define MSR_IA32_APICTPR_MSR            0x808
> -#define MSR_IA32_APICPPR_MSR            0x80a
> -#define MSR_IA32_APICEOI_MSR            0x80b
> -#define MSR_IA32_APICTMICT_MSR          0x838
> -#define MSR_IA32_APICTMCCT_MSR          0x839
> -#define MSR_IA32_APICSELF_MSR           0x83f
> +#define MSR_APIC_BASE                   0x0000001b
> +#define APIC_BASE_BSP                   (1<<8)
> +#define APIC_BASE_EXTD                  (1<<10)
> +#define APIC_BASE_ENABLE                (1<<11)
> +#define APIC_BASE_BASE                  0x000ffffffffff000ul

Maybe those could be indented like:

#define MSR_FOO
#define  FOO_BAR

Thanks, Roger.

_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel

  parent reply	other threads:[~2018-09-10 14:39 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-03-07 18:58 [PATCH v2 0/5] x86: Switch some bits of MSR handing over to the new infrastructure Andrew Cooper
2018-03-07 18:58 ` [PATCH v2 1/5] x86/hvm: Handle viridian MSRs via the new guest_{rd, wr}msr() infrastructure Andrew Cooper
2018-03-13 15:00   ` Jan Beulich
2018-03-13 15:20   ` Jan Beulich
2018-03-13 15:47     ` Andrew Cooper
2018-03-13 16:25       ` Jan Beulich
2018-03-07 18:58 ` [PATCH v2 2/5] x86: Handle the Xen " Andrew Cooper
2018-03-13 15:04   ` Jan Beulich
2018-09-07 14:30     ` Andrew Cooper
2018-09-07 15:47       ` Jan Beulich
2018-09-07 16:01         ` Andrew Cooper
2018-09-10  9:44           ` Jan Beulich
2018-03-07 18:58 ` [PATCH v2 3/5] x86: Fix APIC MSR constant names Andrew Cooper
2018-03-07 20:59   ` Konrad Rzeszutek Wilk
2018-03-08  1:26   ` Tian, Kevin
2018-03-13 15:15   ` Jan Beulich
2018-09-10 14:39   ` Roger Pau Monné [this message]
2018-03-07 18:58 ` [PATCH v2 4/5] x86/hvm: Handle x2apic MSRs via the new guest_{rd, wr}msr() infrastructure Andrew Cooper
2018-03-07 20:59   ` Konrad Rzeszutek Wilk
2018-03-13 15:21     ` Jan Beulich
2018-09-10 14:45   ` Roger Pau Monné
2018-03-07 18:58 ` [PATCH v2 5/5] x86/msr: Blacklist various MSRs which guests definitely shouldn't be using Andrew Cooper
2018-03-07 21:01   ` Konrad Rzeszutek Wilk
2018-03-13 15:35   ` Jan Beulich

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20180910143933.rvm2fnmucy634bld@mac.bytemobile.com \
    --to=roger.pau@citrix.com \
    --cc=JBeulich@suse.com \
    --cc=andrew.cooper3@citrix.com \
    --cc=jun.nakajima@intel.com \
    --cc=kevin.tian@intel.com \
    --cc=wei.liu2@citrix.com \
    --cc=xen-devel@lists.xen.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.