[Qemu-devel] [PATCH v3 0/2] 40p: fix PCI interrupt routing

[Qemu-devel] [PATCH v3 0/2] 40p: fix PCI interrupt routing

[Mark Cave-Ayland]

According to the PReP specification section 6.1.6 "System Interrupt
Assignments", all PCI interrupts are routed via IRQ 15.

In the case of the 40p machine this isn't quite true in that it has a routing
quirk: the LSI SCSI device is always routed to IRQ 13. At least Linux and
NetBSD compare the model name presented by the firmware to "IBM PPS Model
6015", and if it matches will active this quirk.

In order for guest OSs to make use of the fixed IRQ routing, the model name
in the residual data must be changed in OpenBIOS using the diff below:

diff --git a/arch/ppc/qemu/context.c b/arch/ppc/qemu/context.c
index 06e0122..5815895 100644
--- a/arch/ppc/qemu/context.c
+++ b/arch/ppc/qemu/context.c
@@ -111,7 +111,7 @@ static void *
 residual_build(uint32_t memsize, uint32_t load_base, uint32_t load_size)
 {
     residual_t *res;
-    const unsigned char model[] = "Qemu\0PPC\0";
+    const unsigned char model[] = "IBM PPS Model 6015\0";
     int i;
 
     res = malloc(sizeof(residual_t));

With the above OpenBIOS patch applied as well as this patchset, it is now
possible to boot the sandalfoot zImage all the way through to a working
userspace when using OpenBIOS.

(Note: this patchset requires the changes in my previous patchset "scsi:
replace lsi53c895a_create() and lsi53c810_create() functions)

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Based-on: <20180907125653.5010-1-mark.cave-ayland@ilande.co.uk>

v3:
- Add external IRQ to LSI SCSI device instead of hacking the PCI interrupt
  routing as suggested by David
- Rebase onto the patches from v2 already applied to ppc-for-3.1

v2:
- Add OR gate as recommended by Zoltan and implement routing quirk by hacking
  the raven PCI interrupt routing


Mark Cave-Ayland (2):
  lsi53c895a: add optional external IRQ via qdev
  40p: add fixed IRQ routing for LSI SCSI device

 hw/ppc/prep.c        | 11 ++++++-----
 hw/scsi/lsi53c895a.c | 16 ++++++++++++++--
 2 files changed, 20 insertions(+), 7 deletions(-)

-- 
2.11.0

[Qemu-devel] [PATCH v3 1/2] lsi53c895a: add optional external IRQ via qdev

[Mark Cave-Ayland]

On some early machines the on-board PCI devices IRQs are wired directly to
the interrupt controller instead of via the PCI host bridge.

Add an optional external IRQ that if wired up via qdev will replace the
in-built PCI IRQ.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
---
 hw/scsi/lsi53c895a.c | 16 ++++++++++++++--
 1 file changed, 14 insertions(+), 2 deletions(-)

diff --git a/hw/scsi/lsi53c895a.c b/hw/scsi/lsi53c895a.c
index f5cbbf653c..996b40650d 100644
--- a/hw/scsi/lsi53c895a.c
+++ b/hw/scsi/lsi53c895a.c
@@ -207,6 +207,7 @@ typedef struct {
     PCIDevice parent_obj;
     /*< public >*/
 
+    qemu_irq ext_irq;
     MemoryRegion mmio_io;
     MemoryRegion ram_io;
     MemoryRegion io_io;
@@ -443,9 +444,19 @@ static void lsi_stop_script(LSIState *s)
     s->istat1 &= ~LSI_ISTAT1_SRUN;
 }
 
-static void lsi_update_irq(LSIState *s)
+static void lsi_set_irq(LSIState *s, int level)
 {
     PCIDevice *d = PCI_DEVICE(s);
+
+    if (s->ext_irq) {
+        qemu_set_irq(s->ext_irq, level);
+    } else {
+        pci_set_irq(d, level);
+    }
+}
+
+static void lsi_update_irq(LSIState *s)
+{
     int level;
     static int last_level;
     lsi_request *p;
@@ -477,7 +488,7 @@ static void lsi_update_irq(LSIState *s)
                 level, s->dstat, s->sist1, s->sist0);
         last_level = level;
     }
-    pci_set_irq(d, level);
+    lsi_set_irq(s, level);
 
     if (!level && lsi_irq_on_rsl(s) && !(s->scntl1 & LSI_SCNTL1_CON)) {
         DPRINTF("Handled IRQs & disconnected, looking for pending "
@@ -2213,6 +2224,7 @@ static void lsi_scsi_realize(PCIDevice *dev, Error **errp)
                           "lsi-io", 256);
 
     address_space_init(&s->pci_io_as, pci_address_space_io(dev), "lsi-pci-io");
+    qdev_init_gpio_out(d, &s->ext_irq, 1);
 
     pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &s->io_io);
     pci_register_bar(dev, 1, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->mmio_io);
-- 
2.11.0

[Qemu-devel] [PATCH v3 2/2] 40p: add fixed IRQ routing for LSI SCSI device

[Mark Cave-Ayland]

Whilst the PReP specification describes how all PCI IRQs are routed via IRQ
15 on the interrupt controller, the real 40p machine has a routing quirk in
that the LSI SCSI device is routed directly to IRQ 13.

Enable the external IRQ for the LSI SCSI device by wiring up the IRQ with
qdev to the relevant interrupt controller gpio.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
---
 hw/ppc/prep.c | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/hw/ppc/prep.c b/hw/ppc/prep.c
index 615865e46c..94fc36b7ef 100644
--- a/hw/ppc/prep.c
+++ b/hw/ppc/prep.c
@@ -621,7 +621,7 @@ static void ibm_40p_init(MachineState *machine)
     CPUPPCState *env = NULL;
     uint16_t cmos_checksum;
     PowerPCCPU *cpu;
-    DeviceState *dev;
+    DeviceState *dev, *i82378_dev;
     SysBusDevice *pcihost, *s;
     Nvram *m48t59 = NULL;
     PCIBus *pci_bus;
@@ -666,11 +666,11 @@ static void ibm_40p_init(MachineState *machine)
     }
 
     /* PCI -> ISA bridge */
-    dev = DEVICE(pci_create_simple(pci_bus, PCI_DEVFN(11, 0), "i82378"));
-    qdev_connect_gpio_out(dev, 0,
+    i82378_dev = DEVICE(pci_create_simple(pci_bus, PCI_DEVFN(11, 0), "i82378"));
+    qdev_connect_gpio_out(i82378_dev, 0,
                           cpu->env.irq_inputs[PPC6xx_INPUT_INT]);
-    sysbus_connect_irq(pcihost, 0, qdev_get_gpio_in(dev, 15));
-    isa_bus = ISA_BUS(qdev_get_child_bus(dev, "isa.0"));
+    sysbus_connect_irq(pcihost, 0, qdev_get_gpio_in(i82378_dev, 15));
+    isa_bus = ISA_BUS(qdev_get_child_bus(i82378_dev, "isa.0"));
 
     /* Memory controller */
     dev = DEVICE(isa_create(isa_bus, "rs6000-mc"));
@@ -703,6 +703,7 @@ static void ibm_40p_init(MachineState *machine)
         dev = DEVICE(pci_create_simple(pci_bus, PCI_DEVFN(1, 0),
                                        "lsi53c810"));
         lsi53c8xx_handle_legacy_cmdline(dev);
+        qdev_connect_gpio_out(dev, 0, qdev_get_gpio_in(i82378_dev, 13));
 
         /* XXX: s3-trio at PCI_DEVFN(2, 0) */
         pci_vga_init(pci_bus);
-- 
2.11.0

Re: [Qemu-devel] [PATCH v3 1/2] lsi53c895a: add optional external IRQ via qdev

[David Gibson]

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On Mon, Sep 10, 2018 at 09:46:30PM +0100, Mark Cave-Ayland wrote:
> On some early machines the on-board PCI devices IRQs are wired directly to
> the interrupt controller instead of via the PCI host bridge.
> 
> Add an optional external IRQ that if wired up via qdev will replace the
> in-built PCI IRQ.
> 
> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>

Reviewed-by: David Gibson <david@gibson.dropbear.id.au>

Fam, if I get an Acked-by from you I'm happy to take this through my tree.

> ---
>  hw/scsi/lsi53c895a.c | 16 ++++++++++++++--
>  1 file changed, 14 insertions(+), 2 deletions(-)
> 
> diff --git a/hw/scsi/lsi53c895a.c b/hw/scsi/lsi53c895a.c
> index f5cbbf653c..996b40650d 100644
> --- a/hw/scsi/lsi53c895a.c
> +++ b/hw/scsi/lsi53c895a.c
> @@ -207,6 +207,7 @@ typedef struct {
>      PCIDevice parent_obj;
>      /*< public >*/
>  
> +    qemu_irq ext_irq;
>      MemoryRegion mmio_io;
>      MemoryRegion ram_io;
>      MemoryRegion io_io;
> @@ -443,9 +444,19 @@ static void lsi_stop_script(LSIState *s)
>      s->istat1 &= ~LSI_ISTAT1_SRUN;
>  }
>  
> -static void lsi_update_irq(LSIState *s)
> +static void lsi_set_irq(LSIState *s, int level)
>  {
>      PCIDevice *d = PCI_DEVICE(s);
> +
> +    if (s->ext_irq) {
> +        qemu_set_irq(s->ext_irq, level);
> +    } else {
> +        pci_set_irq(d, level);
> +    }
> +}
> +
> +static void lsi_update_irq(LSIState *s)
> +{
>      int level;
>      static int last_level;
>      lsi_request *p;
> @@ -477,7 +488,7 @@ static void lsi_update_irq(LSIState *s)
>                  level, s->dstat, s->sist1, s->sist0);
>          last_level = level;
>      }
> -    pci_set_irq(d, level);
> +    lsi_set_irq(s, level);
>  
>      if (!level && lsi_irq_on_rsl(s) && !(s->scntl1 & LSI_SCNTL1_CON)) {
>          DPRINTF("Handled IRQs & disconnected, looking for pending "
> @@ -2213,6 +2224,7 @@ static void lsi_scsi_realize(PCIDevice *dev, Error **errp)
>                            "lsi-io", 256);
>  
>      address_space_init(&s->pci_io_as, pci_address_space_io(dev), "lsi-pci-io");
> +    qdev_init_gpio_out(d, &s->ext_irq, 1);
>  
>      pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &s->io_io);
>      pci_register_bar(dev, 1, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->mmio_io);

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

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Re: [Qemu-devel] [PATCH v3 2/2] 40p: add fixed IRQ routing for LSI SCSI device

[David Gibson]

[-- Attachment #1: Type: text/plain, Size: 2499 bytes --]

On Mon, Sep 10, 2018 at 09:46:31PM +0100, Mark Cave-Ayland wrote:
> Whilst the PReP specification describes how all PCI IRQs are routed via IRQ
> 15 on the interrupt controller, the real 40p machine has a routing quirk in
> that the LSI SCSI device is routed directly to IRQ 13.
> 
> Enable the external IRQ for the LSI SCSI device by wiring up the IRQ with
> qdev to the relevant interrupt controller gpio.
> 
> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>

Acked-by: David Gibson <david@gibson.dropbear.id.au>

> ---
>  hw/ppc/prep.c | 11 ++++++-----
>  1 file changed, 6 insertions(+), 5 deletions(-)
> 
> diff --git a/hw/ppc/prep.c b/hw/ppc/prep.c
> index 615865e46c..94fc36b7ef 100644
> --- a/hw/ppc/prep.c
> +++ b/hw/ppc/prep.c
> @@ -621,7 +621,7 @@ static void ibm_40p_init(MachineState *machine)
>      CPUPPCState *env = NULL;
>      uint16_t cmos_checksum;
>      PowerPCCPU *cpu;
> -    DeviceState *dev;
> +    DeviceState *dev, *i82378_dev;
>      SysBusDevice *pcihost, *s;
>      Nvram *m48t59 = NULL;
>      PCIBus *pci_bus;
> @@ -666,11 +666,11 @@ static void ibm_40p_init(MachineState *machine)
>      }
>  
>      /* PCI -> ISA bridge */
> -    dev = DEVICE(pci_create_simple(pci_bus, PCI_DEVFN(11, 0), "i82378"));
> -    qdev_connect_gpio_out(dev, 0,
> +    i82378_dev = DEVICE(pci_create_simple(pci_bus, PCI_DEVFN(11, 0), "i82378"));
> +    qdev_connect_gpio_out(i82378_dev, 0,
>                            cpu->env.irq_inputs[PPC6xx_INPUT_INT]);
> -    sysbus_connect_irq(pcihost, 0, qdev_get_gpio_in(dev, 15));
> -    isa_bus = ISA_BUS(qdev_get_child_bus(dev, "isa.0"));
> +    sysbus_connect_irq(pcihost, 0, qdev_get_gpio_in(i82378_dev, 15));
> +    isa_bus = ISA_BUS(qdev_get_child_bus(i82378_dev, "isa.0"));
>  
>      /* Memory controller */
>      dev = DEVICE(isa_create(isa_bus, "rs6000-mc"));
> @@ -703,6 +703,7 @@ static void ibm_40p_init(MachineState *machine)
>          dev = DEVICE(pci_create_simple(pci_bus, PCI_DEVFN(1, 0),
>                                         "lsi53c810"));
>          lsi53c8xx_handle_legacy_cmdline(dev);
> +        qdev_connect_gpio_out(dev, 0, qdev_get_gpio_in(i82378_dev, 13));
>  
>          /* XXX: s3-trio at PCI_DEVFN(2, 0) */
>          pci_vga_init(pci_bus);

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

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Re: [Qemu-devel] [PATCH v3 1/2] lsi53c895a: add optional external IRQ via qdev

[Fam Zheng]

On Tue, 09/11 11:27, David Gibson wrote:
> On Mon, Sep 10, 2018 at 09:46:30PM +0100, Mark Cave-Ayland wrote:
> > On some early machines the on-board PCI devices IRQs are wired directly to
> > the interrupt controller instead of via the PCI host bridge.
> > 
> > Add an optional external IRQ that if wired up via qdev will replace the
> > in-built PCI IRQ.
> > 
> > Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
> 
> Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
> 
> Fam, if I get an Acked-by from you I'm happy to take this through my tree.

This looks good to me, but I'm only 'R:' of scsi code. You'd perhaps need Paolo
to ack.  But anyway:

Reviewed-by: Fam Zheng <famz@redhat.com>

> 
> > ---
> >  hw/scsi/lsi53c895a.c | 16 ++++++++++++++--
> >  1 file changed, 14 insertions(+), 2 deletions(-)
> > 
> > diff --git a/hw/scsi/lsi53c895a.c b/hw/scsi/lsi53c895a.c
> > index f5cbbf653c..996b40650d 100644
> > --- a/hw/scsi/lsi53c895a.c
> > +++ b/hw/scsi/lsi53c895a.c
> > @@ -207,6 +207,7 @@ typedef struct {
> >      PCIDevice parent_obj;
> >      /*< public >*/
> >  
> > +    qemu_irq ext_irq;
> >      MemoryRegion mmio_io;
> >      MemoryRegion ram_io;
> >      MemoryRegion io_io;
> > @@ -443,9 +444,19 @@ static void lsi_stop_script(LSIState *s)
> >      s->istat1 &= ~LSI_ISTAT1_SRUN;
> >  }
> >  
> > -static void lsi_update_irq(LSIState *s)
> > +static void lsi_set_irq(LSIState *s, int level)
> >  {
> >      PCIDevice *d = PCI_DEVICE(s);
> > +
> > +    if (s->ext_irq) {
> > +        qemu_set_irq(s->ext_irq, level);
> > +    } else {
> > +        pci_set_irq(d, level);
> > +    }
> > +}
> > +
> > +static void lsi_update_irq(LSIState *s)
> > +{
> >      int level;
> >      static int last_level;
> >      lsi_request *p;
> > @@ -477,7 +488,7 @@ static void lsi_update_irq(LSIState *s)
> >                  level, s->dstat, s->sist1, s->sist0);
> >          last_level = level;
> >      }
> > -    pci_set_irq(d, level);
> > +    lsi_set_irq(s, level);
> >  
> >      if (!level && lsi_irq_on_rsl(s) && !(s->scntl1 & LSI_SCNTL1_CON)) {
> >          DPRINTF("Handled IRQs & disconnected, looking for pending "
> > @@ -2213,6 +2224,7 @@ static void lsi_scsi_realize(PCIDevice *dev, Error **errp)
> >                            "lsi-io", 256);
> >  
> >      address_space_init(&s->pci_io_as, pci_address_space_io(dev), "lsi-pci-io");
> > +    qdev_init_gpio_out(d, &s->ext_irq, 1);
> >  
> >      pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &s->io_io);
> >      pci_register_bar(dev, 1, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->mmio_io);
> 
> -- 
> David Gibson			| I'll have my music baroque, and my code
> david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
> 				| _way_ _around_!
> http://www.ozlabs.org/~dgibson

Re: [Qemu-devel] [PATCH v3 1/2] lsi53c895a: add optional external IRQ via qdev

[Paolo Bonzini]

On 11/09/2018 08:38, Fam Zheng wrote:
> On Tue, 09/11 11:27, David Gibson wrote:
>> On Mon, Sep 10, 2018 at 09:46:30PM +0100, Mark Cave-Ayland wrote:
>>> On some early machines the on-board PCI devices IRQs are wired directly to
>>> the interrupt controller instead of via the PCI host bridge.
>>>
>>> Add an optional external IRQ that if wired up via qdev will replace the
>>> in-built PCI IRQ.
>>>
>>> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
>>
>> Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
>>
>> Fam, if I get an Acked-by from you I'm happy to take this through my tree.
> 
> This looks good to me, but I'm only 'R:' of scsi code. You'd perhaps need Paolo
> to ack.

Not really. :)  Mark, go ahead!

Paolo

Re: [Qemu-devel] [PATCH v3 0/2] 40p: fix PCI interrupt routing

[Hervé Poussineau]

Le 10/09/2018 à 22:46, Mark Cave-Ayland a écrit :
> According to the PReP specification section 6.1.6 "System Interrupt
> Assignments", all PCI interrupts are routed via IRQ 15.
> 
> In the case of the 40p machine this isn't quite true in that it has a routing
> quirk: the LSI SCSI device is always routed to IRQ 13. At least Linux and
> NetBSD compare the model name presented by the firmware to "IBM PPS Model
> 6015", and if it matches will active this quirk.
> 
> In order for guest OSs to make use of the fixed IRQ routing, the model name
> in the residual data must be changed in OpenBIOS using the diff below:
> 
> diff --git a/arch/ppc/qemu/context.c b/arch/ppc/qemu/context.c
> index 06e0122..5815895 100644
> --- a/arch/ppc/qemu/context.c
> +++ b/arch/ppc/qemu/context.c
> @@ -111,7 +111,7 @@ static void *
>   residual_build(uint32_t memsize, uint32_t load_base, uint32_t load_size)
>   {
>       residual_t *res;
> -    const unsigned char model[] = "Qemu\0PPC\0";
> +    const unsigned char model[] = "IBM PPS Model 6015\0";
>       int i;
>   
>       res = malloc(sizeof(residual_t));
> 
> With the above OpenBIOS patch applied as well as this patchset, it is now
> possible to boot the sandalfoot zImage all the way through to a working
> userspace when using OpenBIOS.
> 
> (Note: this patchset requires the changes in my previous patchset "scsi:
> replace lsi53c895a_create() and lsi53c810_create() functions)
> 
> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
> Based-on: <20180907125653.5010-1-mark.cave-ayland@ilande.co.uk>
> 
> v3:
> - Add external IRQ to LSI SCSI device instead of hacking the PCI interrupt
>    routing as suggested by David
> - Rebase onto the patches from v2 already applied to ppc-for-3.1
> 
> v2:
> - Add OR gate as recommended by Zoltan and implement routing quirk by hacking
>    the raven PCI interrupt routing
> 
> 
> Mark Cave-Ayland (2):
>    lsi53c895a: add optional external IRQ via qdev
>    40p: add fixed IRQ routing for LSI SCSI device
> 
>   hw/ppc/prep.c        | 11 ++++++-----
>   hw/scsi/lsi53c895a.c | 16 ++++++++++++++--
>   2 files changed, 20 insertions(+), 7 deletions(-)
> 

Reviewed-by: Hervé Poussineau <hpoussin@reactos.org>
Tested-by: Hervé Poussineau <hpoussin@reactos.org>

Re: [Qemu-devel] [PATCH v3 2/2] 40p: add fixed IRQ routing for LSI SCSI device

[David Gibson]

[-- Attachment #1: Type: text/plain, Size: 2494 bytes --]

On Mon, Sep 10, 2018 at 09:46:31PM +0100, Mark Cave-Ayland wrote:
> Whilst the PReP specification describes how all PCI IRQs are routed via IRQ
> 15 on the interrupt controller, the real 40p machine has a routing quirk in
> that the LSI SCSI device is routed directly to IRQ 13.
> 
> Enable the external IRQ for the LSI SCSI device by wiring up the IRQ with
> qdev to the relevant interrupt controller gpio.
> 
> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>

This doesn't apply clean to ppc-for-3.1 for me.

> ---
>  hw/ppc/prep.c | 11 ++++++-----
>  1 file changed, 6 insertions(+), 5 deletions(-)
> 
> diff --git a/hw/ppc/prep.c b/hw/ppc/prep.c
> index 615865e46c..94fc36b7ef 100644
> --- a/hw/ppc/prep.c
> +++ b/hw/ppc/prep.c
> @@ -621,7 +621,7 @@ static void ibm_40p_init(MachineState *machine)
>      CPUPPCState *env = NULL;
>      uint16_t cmos_checksum;
>      PowerPCCPU *cpu;
> -    DeviceState *dev;
> +    DeviceState *dev, *i82378_dev;
>      SysBusDevice *pcihost, *s;
>      Nvram *m48t59 = NULL;
>      PCIBus *pci_bus;
> @@ -666,11 +666,11 @@ static void ibm_40p_init(MachineState *machine)
>      }
>  
>      /* PCI -> ISA bridge */
> -    dev = DEVICE(pci_create_simple(pci_bus, PCI_DEVFN(11, 0), "i82378"));
> -    qdev_connect_gpio_out(dev, 0,
> +    i82378_dev = DEVICE(pci_create_simple(pci_bus, PCI_DEVFN(11, 0), "i82378"));
> +    qdev_connect_gpio_out(i82378_dev, 0,
>                            cpu->env.irq_inputs[PPC6xx_INPUT_INT]);
> -    sysbus_connect_irq(pcihost, 0, qdev_get_gpio_in(dev, 15));
> -    isa_bus = ISA_BUS(qdev_get_child_bus(dev, "isa.0"));
> +    sysbus_connect_irq(pcihost, 0, qdev_get_gpio_in(i82378_dev, 15));
> +    isa_bus = ISA_BUS(qdev_get_child_bus(i82378_dev, "isa.0"));
>  
>      /* Memory controller */
>      dev = DEVICE(isa_create(isa_bus, "rs6000-mc"));
> @@ -703,6 +703,7 @@ static void ibm_40p_init(MachineState *machine)
>          dev = DEVICE(pci_create_simple(pci_bus, PCI_DEVFN(1, 0),
>                                         "lsi53c810"));
>          lsi53c8xx_handle_legacy_cmdline(dev);
> +        qdev_connect_gpio_out(dev, 0, qdev_get_gpio_in(i82378_dev, 13));
>  
>          /* XXX: s3-trio at PCI_DEVFN(2, 0) */
>          pci_vga_init(pci_bus);

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

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Re: [Qemu-devel] [PATCH v3 2/2] 40p: add fixed IRQ routing for LSI SCSI device

[Mark Cave-Ayland]

On 13/09/18 01:24, David Gibson wrote:

> On Mon, Sep 10, 2018 at 09:46:31PM +0100, Mark Cave-Ayland wrote:
>> Whilst the PReP specification describes how all PCI IRQs are routed via IRQ
>> 15 on the interrupt controller, the real 40p machine has a routing quirk in
>> that the LSI SCSI device is routed directly to IRQ 13.
>>
>> Enable the external IRQ for the LSI SCSI device by wiring up the IRQ with
>> qdev to the relevant interrupt controller gpio.
>>
>> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
> 
> This doesn't apply clean to ppc-for-3.1 for me.

Indeed, see the Based-on header attached to the cover letter: it is
dependent upon the lsi53c8xx_create() removal patchset at
https://lists.gnu.org/archive/html/qemu-devel/2018-09/msg00797.html
which Paolo has queued here:
https://lists.gnu.org/archive/html/qemu-devel/2018-09/msg01209.html.

Rather than having to juggle the order of pull requests, would it make
sense for you to take the the lsi53c8xx_create() removal patchset via
ppc-for-3.1 aswell?


ATB,

Mark.

>> ---
>>  hw/ppc/prep.c | 11 ++++++-----
>>  1 file changed, 6 insertions(+), 5 deletions(-)
>>
>> diff --git a/hw/ppc/prep.c b/hw/ppc/prep.c
>> index 615865e46c..94fc36b7ef 100644
>> --- a/hw/ppc/prep.c
>> +++ b/hw/ppc/prep.c
>> @@ -621,7 +621,7 @@ static void ibm_40p_init(MachineState *machine)
>>      CPUPPCState *env = NULL;
>>      uint16_t cmos_checksum;
>>      PowerPCCPU *cpu;
>> -    DeviceState *dev;
>> +    DeviceState *dev, *i82378_dev;
>>      SysBusDevice *pcihost, *s;
>>      Nvram *m48t59 = NULL;
>>      PCIBus *pci_bus;
>> @@ -666,11 +666,11 @@ static void ibm_40p_init(MachineState *machine)
>>      }
>>  
>>      /* PCI -> ISA bridge */
>> -    dev = DEVICE(pci_create_simple(pci_bus, PCI_DEVFN(11, 0), "i82378"));
>> -    qdev_connect_gpio_out(dev, 0,
>> +    i82378_dev = DEVICE(pci_create_simple(pci_bus, PCI_DEVFN(11, 0), "i82378"));
>> +    qdev_connect_gpio_out(i82378_dev, 0,
>>                            cpu->env.irq_inputs[PPC6xx_INPUT_INT]);
>> -    sysbus_connect_irq(pcihost, 0, qdev_get_gpio_in(dev, 15));
>> -    isa_bus = ISA_BUS(qdev_get_child_bus(dev, "isa.0"));
>> +    sysbus_connect_irq(pcihost, 0, qdev_get_gpio_in(i82378_dev, 15));
>> +    isa_bus = ISA_BUS(qdev_get_child_bus(i82378_dev, "isa.0"));
>>  
>>      /* Memory controller */
>>      dev = DEVICE(isa_create(isa_bus, "rs6000-mc"));
>> @@ -703,6 +703,7 @@ static void ibm_40p_init(MachineState *machine)
>>          dev = DEVICE(pci_create_simple(pci_bus, PCI_DEVFN(1, 0),
>>                                         "lsi53c810"));
>>          lsi53c8xx_handle_legacy_cmdline(dev);
>> +        qdev_connect_gpio_out(dev, 0, qdev_get_gpio_in(i82378_dev, 13));
>>  
>>          /* XXX: s3-trio at PCI_DEVFN(2, 0) */
>>          pci_vga_init(pci_bus);
> 

Re: [Qemu-devel] [PATCH v3 2/2] 40p: add fixed IRQ routing for LSI SCSI device

[Paolo Bonzini]

On 13/09/2018 06:21, Mark Cave-Ayland wrote:
> Indeed, see the Based-on header attached to the cover letter: it is
> dependent upon the lsi53c8xx_create() removal patchset at
> https://lists.gnu.org/archive/html/qemu-devel/2018-09/msg00797.html
> which Paolo has queued here:
> https://lists.gnu.org/archive/html/qemu-devel/2018-09/msg01209.html.
> 
> Rather than having to juggle the order of pull requests, would it make
> sense for you to take the the lsi53c8xx_create() removal patchset via
> ppc-for-3.1 aswell?
> 

No objections from me.

Paolo

Re: [Qemu-devel] [PATCH v3 2/2] 40p: add fixed IRQ routing for LSI SCSI device

[Philippe Mathieu-Daudé]

On 9/10/18 10:46 PM, Mark Cave-Ayland wrote:
> Whilst the PReP specification describes how all PCI IRQs are routed via IRQ
> 15 on the interrupt controller, the real 40p machine has a routing quirk in
> that the LSI SCSI device is routed directly to IRQ 13.
> 
> Enable the external IRQ for the LSI SCSI device by wiring up the IRQ with
> qdev to the relevant interrupt controller gpio.
> 
> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

> ---
>  hw/ppc/prep.c | 11 ++++++-----
>  1 file changed, 6 insertions(+), 5 deletions(-)
> 
> diff --git a/hw/ppc/prep.c b/hw/ppc/prep.c
> index 615865e46c..94fc36b7ef 100644
> --- a/hw/ppc/prep.c
> +++ b/hw/ppc/prep.c
> @@ -621,7 +621,7 @@ static void ibm_40p_init(MachineState *machine)
>      CPUPPCState *env = NULL;
>      uint16_t cmos_checksum;
>      PowerPCCPU *cpu;
> -    DeviceState *dev;
> +    DeviceState *dev, *i82378_dev;
>      SysBusDevice *pcihost, *s;
>      Nvram *m48t59 = NULL;
>      PCIBus *pci_bus;
> @@ -666,11 +666,11 @@ static void ibm_40p_init(MachineState *machine)
>      }
>  
>      /* PCI -> ISA bridge */
> -    dev = DEVICE(pci_create_simple(pci_bus, PCI_DEVFN(11, 0), "i82378"));
> -    qdev_connect_gpio_out(dev, 0,
> +    i82378_dev = DEVICE(pci_create_simple(pci_bus, PCI_DEVFN(11, 0), "i82378"));
> +    qdev_connect_gpio_out(i82378_dev, 0,
>                            cpu->env.irq_inputs[PPC6xx_INPUT_INT]);
> -    sysbus_connect_irq(pcihost, 0, qdev_get_gpio_in(dev, 15));
> -    isa_bus = ISA_BUS(qdev_get_child_bus(dev, "isa.0"));
> +    sysbus_connect_irq(pcihost, 0, qdev_get_gpio_in(i82378_dev, 15));
> +    isa_bus = ISA_BUS(qdev_get_child_bus(i82378_dev, "isa.0"));
>  
>      /* Memory controller */
>      dev = DEVICE(isa_create(isa_bus, "rs6000-mc"));
> @@ -703,6 +703,7 @@ static void ibm_40p_init(MachineState *machine)
>          dev = DEVICE(pci_create_simple(pci_bus, PCI_DEVFN(1, 0),
>                                         "lsi53c810"));
>          lsi53c8xx_handle_legacy_cmdline(dev);
> +        qdev_connect_gpio_out(dev, 0, qdev_get_gpio_in(i82378_dev, 13));
>  
>          /* XXX: s3-trio at PCI_DEVFN(2, 0) */
>          pci_vga_init(pci_bus);
>