All of lore.kernel.org
 help / color / mirror / Atom feed
From: David Gibson <david@gibson.dropbear.id.au>
To: "Cédric Le Goater" <clg@kaod.org>
Cc: Greg Kurz <groug@kaod.org>, qemu-ppc@nongnu.org, qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH 0/3] spapr: introduce a new sPAPRIrq backend
Date: Tue, 11 Sep 2018 11:52:46 +1000	[thread overview]
Message-ID: <20180911015246.GH7978@umbus.fritz.box> (raw)
In-Reply-To: <90b8c81e-bd7b-8516-7e27-69d77ba59b72@kaod.org>

[-- Attachment #1: Type: text/plain, Size: 2849 bytes --]

On Mon, Sep 10, 2018 at 07:24:47PM +0200, Cédric Le Goater wrote:
> On 09/10/2018 05:02 PM, Greg Kurz wrote:
> > On Mon, 10 Sep 2018 13:02:19 +0200
> > Cédric Le Goater <clg@kaod.org> wrote:
> > 
> >> Hello,
> >>
> >> This series adds a new sPAPRIrq backend increasing the number of
> >> available IRQ numbers in pseries-3.1 machines. This change is an
> >> opportunity to also fix the "ibm,pe-total-#msi" and remove the old
> >> XICS_IRQS_SPAPR definition.
> >>
> > 
> > This cleanup looks sane but I still have a concern with the semantics of
> > "ibm,pe-total-#msi".
> > 
> > According to LoPAPR:
> > 
> > "ibm,pe-total-#msi"
> > 
> > property name defines the maximum number of Message Signaled Interrupts (MSI plus MSI-X) that are available
> > to the PE below this device tree node. This number only indicates the number of available interrupts, not the num-
> > ber assigned. The number assigned for an IOA may be obtained by Function 0 (Query only) of the ibm,change-msi
> > RTAS call.
> > prop-encoded-array: Maximum number of interrupts encoded as with encode-int.
> > 
> > IIUC, the PHB is given ibm,pe-total-#msi MSIs that it can assign to devices.
> > 
> > But we currently have only one global allocator in the machine, so having
> > each PHB advertising the full range of the allocator still looks weird.
> 
> yes. Multiple PHBs share the same IRQ number space and in this
> case the advertised number "ibm,pe-total-#msi" does not reflect 
> the maximum number of allocatable interrupts per PHB.
> 
> The patch improves only the value for one PHB and, as of today, 
> it is still wrong when Multiple PHBs are involved.
> 
> > Shouldn't this be divided by the number of PHBs ? Or should we have one
> > separate allocator for each PHB ?
> 
> That would mean segmenting the IRQ number space and I am not 
> fond of this solution because we have plenty of space to share:
> 
> 	0xd00 MSIs
> 
> When we find a scenario reaching this limit, I think what we 
> should do is to dynamically extend the IRQ number space in QEMU 
> and in KVM. It should not be a problem.
> 
> We could also downsize "ibm,pe-total-#msi". It is quite big
> today. some controllers do have a lot of IRQs but no more 
> that a hundred. I might be wrong.

Yeah, this is my take as well.  The spec sort of implies, but doesn't
explicitly state a per-PHB allocation of MSIs.  But there's not really
a good reason to partition the irqs that way.  So it may be a bit fast
and loose w.r.t. PAPR, but as long as we have plenty of MSIs available
I think using a shared pool is unlikely to cause problems in practice.

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]

  reply	other threads:[~2018-09-11  2:03 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-09-10 11:02 [Qemu-devel] [PATCH 0/3] spapr: introduce a new sPAPRIrq backend Cédric Le Goater
2018-09-10 11:02 ` [Qemu-devel] [PATCH 1/3] spapr: introduce a spapr_irq class 'nr_msis' attribute Cédric Le Goater
2018-09-11  1:48   ` David Gibson
2018-09-11  4:41     ` Cédric Le Goater
2018-09-13  6:11       ` David Gibson
2018-09-10 11:02 ` [Qemu-devel] [PATCH 2/3] spapr: increase the size of the IRQ number space Cédric Le Goater
2018-09-11  1:49   ` David Gibson
2018-09-10 11:02 ` [Qemu-devel] [PATCH 3/3] spapr_pci: fix "ibm,pe-total-#msi" value Cédric Le Goater
2018-09-11  1:50   ` [Qemu-devel] [PATCH 3/3] spapr_pci: fix "ibm, pe-total-#msi" value David Gibson
2018-09-11  4:42     ` Cédric Le Goater
2018-09-10 15:02 ` [Qemu-devel] [PATCH 0/3] spapr: introduce a new sPAPRIrq backend Greg Kurz
2018-09-10 17:24   ` Cédric Le Goater
2018-09-11  1:52     ` David Gibson [this message]
2018-09-11  7:22       ` Greg Kurz

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20180911015246.GH7978@umbus.fritz.box \
    --to=david@gibson.dropbear.id.au \
    --cc=clg@kaod.org \
    --cc=groug@kaod.org \
    --cc=qemu-devel@nongnu.org \
    --cc=qemu-ppc@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.