From: leo.yan@linaro.org (leo.yan at linaro.org)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/2] coresight: tmc: Fix writing barrier packets for ring buffer
Date: Tue, 11 Sep 2018 15:58:35 +0800 [thread overview]
Message-ID: <20180911075835.GB6110@leoy-ThinkPad-X240s> (raw)
In-Reply-To: <CANLsYkxACMEfzLJ7MfWiwA8+GnsQBz885T8GT+ujOtCsAT0=bg@mail.gmail.com>
Hi Mathieu,
On Mon, Sep 10, 2018 at 01:42:31PM -0600, Mathieu Poirier wrote:
[...]
> > diff --git a/drivers/hwtracing/coresight/coresight-tmc-etf.c b/drivers/hwtracing/coresight/coresight-tmc-etf.c
> > index e310613..9c599c9 100644
> > --- a/drivers/hwtracing/coresight/coresight-tmc-etf.c
> > +++ b/drivers/hwtracing/coresight/coresight-tmc-etf.c
> > @@ -387,7 +387,7 @@ static void tmc_update_etf_buffer(struct coresight_device *csdev,
> > const u32 *barrier;
> > u32 *buf_ptr;
> > u64 read_ptr, write_ptr;
> > - u32 status, to_read;
> > + u32 status, to_read, barrier_sz = 0;
>
> This doesn't apply on my next branch. Please rebase and send both
> patches again.
Done. Rebased these two patches against to CoreSight next branch [1];
please review the patch series v2 which has been sent out.
[...]
Thanks,
Leo Yan
[1] https://git.linaro.org/kernel/coresight.git/log/?h=next
prev parent reply other threads:[~2018-09-11 7:58 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-09-05 7:55 [PATCH 1/2] coresight: tmc: Fix byte-address alignment for RRP Leo Yan
2018-09-05 7:55 ` [PATCH 2/2] coresight: tmc: Fix writing barrier packets for ring buffer Leo Yan
2018-09-10 19:42 ` Mathieu Poirier
2018-09-11 7:58 ` leo.yan at linaro.org [this message]
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