From: Lucas De Marchi <lucas.demarchi@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>,
Rodrigo Vivi <rodrigo.vivi@intel.com>
Subject: [PATCH] drm/i915/icl: apply Display WA #1178 to fix type C dongles
Date: Mon, 24 Sep 2018 09:54:35 -0700 [thread overview]
Message-ID: <20180924165435.2674-1-lucas.demarchi@intel.com> (raw)
Display WA #1178 is meant to fix Aux channel voltage swing too low with
some type C dongles. Although it is for type C, of ICL it only applies
to combo phy and not to eDP. This means we need to apply the WA only on
Aux B.
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
drivers/gpu/drm/i915/i915_reg.h | 4 ++++
drivers/gpu/drm/i915/intel_runtime_pm.c | 7 +++++++
2 files changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index e7e6ca7f9665..1e92112d23de 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -8928,6 +8928,10 @@ enum skl_power_gate {
#define CNL_AUX_ANAOVRD1_ENABLE (1 << 16)
#define CNL_AUX_ANAOVRD1_LDO_BYPASS (1 << 23)
+#define ICL_AUX_ANAOVRD1_B _MMIO(0x6C398)
+#define ICL_AUX_ANAOVRD1_LDO_BYPASS (1 << 7)
+#define ICL_AUX_ANAOVRD1_ENABLE (1 << 0)
+
/* HDCP Key Registers */
#define HDCP_KEY_CONF _MMIO(0x66c00)
#define HDCP_AKSV_SEND_TRIGGER BIT(31)
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
index 0fdabce647ab..a97d2f762b77 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -436,6 +436,13 @@ icl_combo_phy_aux_power_well_enable(struct drm_i915_private *dev_priv,
I915_WRITE(ICL_PORT_CL_DW12(port), val | ICL_LANE_ENABLE_AUX);
hsw_wait_for_power_well_enable(dev_priv, power_well);
+
+ /* Display WA #1178: icl */
+ if (IS_ICELAKE(dev_priv) && pw_idx == ICL_PW_CTL_IDX_AUX_B) {
+ val = I915_READ(ICL_AUX_ANAOVRD1_B);
+ val |= ICL_AUX_ANAOVRD1_ENABLE | ICL_AUX_ANAOVRD1_LDO_BYPASS;
+ I915_WRITE(ICL_AUX_ANAOVRD1_B, val);
+ }
}
static void
--
2.17.1
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next reply other threads:[~2018-09-24 16:54 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-09-24 16:54 Lucas De Marchi [this message]
2018-09-24 17:25 ` ✗ Fi.CI.BAT: failure for drm/i915/icl: apply Display WA #1178 to fix type C dongles Patchwork
2018-10-03 23:30 ` [PATCH] " Rodrigo Vivi
2018-10-03 23:43 ` Lucas De Marchi
2018-10-04 0:23 ` Rodrigo Vivi
2018-10-04 10:45 ` Ville Syrjälä
2018-10-04 10:42 ` Ville Syrjälä
2018-10-12 21:57 ` [PATCH v2] " Lucas De Marchi
2018-10-12 22:28 ` Rodrigo Vivi
2018-10-16 10:12 ` Imre Deak
2018-10-04 0:06 ` ✓ Fi.CI.BAT: success for " Patchwork
2018-10-04 10:26 ` ✓ Fi.CI.IGT: " Patchwork
2018-10-12 22:48 ` ✓ Fi.CI.BAT: success for drm/i915/icl: apply Display WA #1178 to fix type C dongles (rev2) Patchwork
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